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📄 adsp-bf561_c.ldf

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            ___l1_data_cache_a = 0;
#endif /* } DATAA_CACHE */
            INPUT_SECTIONS( $OBJECTS_CORE_A(L1_data_a) $LIBRARIES_CORE_A(L1_data_a))
            INPUT_SECTIONS( $OBJECTS_CORE_A(bsz_init) $LIBRARIES_CORE_A(bsz_init))
            INPUT_SECTIONS( $OBJECTS_CORE_A(cplb_data) $LIBRARIES_CORE_A(cplb_data))
            INPUT_SECTIONS($OBJECTS_CORE_A(voldata) $LIBRARIES_CORE_A(voldata))
            INPUT_SECTIONS($OBJECTS_CORE_A(constdata) $LIBRARIES_CORE_A(constdata))
            INPUT_SECTIONS($OBJECTS_CORE_A(data1) $LIBRARIES_CORE_A(data1))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS_CORE_A(.edt) $LIBRARIES_CORE_A(.edt) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(.cht) $LIBRARIES_CORE_A(.cht) )
#endif	/* } */
        } >MEM_A_L1_DATA_A
        .meminit{ ALIGN(4) } >MEM_A_L1_DATA_A

#if DATAB_CACHE /* { */
        l1_data_b_cache
        {
            INPUT_SECTION_ALIGN(4)
            ___l1_data_cache_b = 1;
        } >MEM_A_L1_DATA_B_CACHE
#endif /* DATAB_CACHE } */

        l1_data_b
        {
            INPUT_SECTION_ALIGN(4)
#if !DATAB_CACHE /* { */
            ___l1_data_cache_b = 0;
#endif /* DATAB_CACHE } */
            INPUT_SECTIONS( $OBJECTS_CORE_A(L1_data_b) $LIBRARIES_CORE_A(L1_data_b))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS_CORE_A(ctor) $LIBRARIES_CORE_A(ctor) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(ctorl) $LIBRARIES_CORE_A(ctorl) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(.gdt) $LIBRARIES_CORE_A(.gdt) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(.gdtl) $LIBRARIES_CORE_A(.gdtl) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(vtbl) $LIBRARIES_CORE_A(vtbl) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(.frt) $LIBRARIES_CORE_A(.frt) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(.frtl) $LIBRARIES_CORE_A(.frtl) )
#endif	/* } */
            INPUT_SECTIONS($OBJECTS_CORE_A(data1) $LIBRARIES_CORE_A(data1))
            INPUT_SECTIONS( $OBJECTS_CORE_A(cplb_data) $LIBRARIES_CORE_A(cplb_data))
            INPUT_SECTIONS($OBJECTS_CORE_A(voldata) $LIBRARIES_CORE_A(voldata))
            INPUT_SECTIONS($OBJECTS_CORE_A(constdata) $LIBRARIES_CORE_A(constdata))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS_CORE_A(.edt) $LIBRARIES_CORE_A(.edt) )
            INPUT_SECTIONS( $OBJECTS_CORE_A(.cht) $LIBRARIES_CORE_A(.cht) )
#endif	/* } */
        } >MEM_A_L1_DATA_B

        bsz_L1_data_a ZERO_INIT
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS_CORE_A(bsz) $LIBRARIES_CORE_A(bsz))
        } >MEM_A_L1_DATA_A

        bsz_L1_data_b ZERO_INIT
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS_CORE_A(bsz) $LIBRARIES_CORE_A(bsz))
        } >MEM_A_L1_DATA_B

        stack
        {
            ldf_stack_space = .;
            ldf_stack_end = ldf_stack_space + MEMORY_SIZEOF(MEM_A_L1_STACK);
        } >MEM_A_L1_STACK

#if !defined(__ADI_MULTICORE)
        heap
        {
            // Allocate a heap for the application
            ldf_heap_space = .;
            ldf_heap_end = ldf_heap_space + MEMORY_SIZEOF(MEM_SDRAM0_HEAP_A) - 1;
            ldf_heap_length = ldf_heap_end - ldf_heap_space;
        } >MEM_SDRAM0_HEAP_A
#endif
    }
}

/* Core B */
PROCESSOR p1
{
MEMORY {
/* ----- Core B ----- */
//MEM_B_L1_SCRATCH {		/* L1 Scratchpad - 4K */
//	TYPE(RAM) WIDTH(8)
//	START(0xFF700000) END(0xFF700FFF)
//}
MEM_B_L1_CODE_CACHE  {	/* L1 Instruction SRAM/Cache - 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF610000) END(0xFF613FFF)
}
MEM_B_L1_CODE {		/* L1 Instruction SRAM - 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF600000) END(0xFF603FFF)
}
#if DATAB_CACHE /* { */
MEM_B_L1_DATA_B_CACHE {	/* L1 Data Bank B SRAM/Cache - 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF504000) END(0xFF507FFF)
}
MEM_B_L1_DATA_B   {		/* L1 Data Bank B SRAM - 12K of 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF501000) END(0xFF503FFF)
}
#else  /* } {  DATAB_CACHE */
MEM_B_L1_DATA_B   {		/* L1 Data Bank B SRAM - 28K of 32K */
	TYPE(RAM) WIDTH(8)
	START(0xFF501000) END(0xFF507FFF)
}
#endif /* } DATAB_CACHE */
MEM_B_L1_STACK    {		/* L1 Data Bank B SRAM - 4K of 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF500000) END(0xFF500FFF)
}
#if DATAA_CACHE /* { */
MEM_B_L1_DATA_A_CACHE {	/* L1 Data Bank A SRAM/Cache - 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF404000) END(0xFF407FFF)
}
MEM_B_L1_DATA_A   {		/* L1 Data Bank A SRAM - 16K */
	TYPE(RAM) WIDTH(8)
	START(0xFF400000) END(0xFF403FFF)
}
#else  /* } {  DATAA_CACHE */
MEM_B_L1_DATA_A   {		/* L1 Data Bank A SRAM - 32K */
	TYPE(RAM) WIDTH(8)
	START(0xFF400000) END(0xFF407FFF)
}
#endif /* } DATAA_CACHE */
MEM_L2_SRAM_COREA   {		TYPE(RAM) WIDTH(8)	START(0xFEB10000) END(0xFEB1FBEF) }
}
    OUTPUT( $COMMAND_LINE_OUTPUT_DIRECTORY/p1.dxe )

	/* Following address must match start of MEM_B_L1_PROGRAM */
	RESOLVE(start,0xFF600000)
	KEEP(start,_main)
	LINK_AGAINST($COMMAND_LINE_OUTPUT_DIRECTORY/sml2.sm)

   SECTIONS
   {
#if defined(__WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES) /* { */
    /* Workaround for hardware errata 05-00-0189 -
    ** "Speculative (and fetches made at boundary of reserved memory
    ** space) for instruction or data fetches may cause false
    ** protection exceptions".
    **
    ** Done by avoiding use of 76 bytes from at the end of blocks
    ** that are adjacent to reserved memory. Workaround is enabled
    ** for appropriate silicon revisions (-si-revision switch).
    */
 //   RESERVE(___wabb0=0xFF700FFF - 75,___lb0=76)   /* scratchpad */
#  if !INSTR_CACHE
    RESERVE(___wabb1=0xFF613FFF - 75,___lb1=76)   /* l1 instr sram/cache */
#  endif
    RESERVE(___wabb2=0xFF603FFF - 75,___lb2=76)   /* l1 instr sram */
#  if DATAB_CACHE
    RESERVE(___wabb3=0xFF503FFF - 75,___lb3=76)   /* data B sram */
#  else
    RESERVE(___wabb4=0xFF507FFF - 75,___lb4=76)   /* data B sram/cache */
#  endif
#  if DATAA_CACHE
    RESERVE(___wabb5=0xFF403FFF - 75,___lb5=76)   /* data A sram */
#  else
    RESERVE(___wabb6=0xFF407FFF - 75,___lb6=76)   /* data A sram/cache */
#  endif
#endif /*} __WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES */

        l1_code
        {
            INPUT_SECTION_ALIGN(4)
            __CORE = 1;
            INPUT_SECTIONS( $OBJECTS_CORE_B(L1_code) $LIBRARIES_CORE_B(L1_code))
            INPUT_SECTIONS( $OBJECTS_CORE_B(cplb) $LIBRARIES_CORE_B(cplb))
            INPUT_SECTIONS( $OBJECTS_CORE_B(cplb_code) $LIBRARIES_CORE_B(cplb_code))
            INPUT_SECTIONS( $OBJECTS_CORE_B(noncache_code) $LIBRARIES_CORE_B(noncache_code))
            INPUT_SECTIONS( $OBJECTS_CORE_B(program) $LIBRARIES_CORE_B(program))
        } >MEM_B_L1_CODE

        l1_code_cache
        {
            INPUT_SECTION_ALIGN(4)
#if INSTR_CACHE /* { */
            ___l1_code_cache = 1;
#else
            ___l1_code_cache = 0;
            INPUT_SECTIONS( $OBJECTS_CORE_B(L1_code) $LIBRARIES_CORE_B(L1_code))
            INPUT_SECTIONS( $OBJECTS_CORE_B(cplb_code) $LIBRARIES_CORE_B(cplb_code))
            INPUT_SECTIONS( $OBJECTS_CORE_B(cplb) $LIBRARIES_CORE_B(cplb))
            INPUT_SECTIONS( $OBJECTS_CORE_B(program) $LIBRARIES_CORE_B(program))
#endif /* INSTR_CACHE } */
        } >MEM_B_L1_CODE_CACHE

#if DATAA_CACHE /* { */
        l1_data_a_cache
        {
            INPUT_SECTION_ALIGN(4)
            ___l1_data_cache_a = 1;
        } >MEM_B_L1_DATA_A_CACHE
#endif /* DATAA_CACHE } */

        l1_data_a
        {
            INPUT_SECTION_ALIGN(4)
#if !DATAA_CACHE /* { */
            ___l1_data_cache_a = 0;
#endif /* } DATAA_CACHE */
            INPUT_SECTIONS( $OBJECTS_CORE_B(L1_data_a) $LIBRARIES_CORE_B(L1_data_a))
            INPUT_SECTIONS( $OBJECTS_CORE_B(bsz_init) $LIBRARIES_CORE_B(bsz_init))
            INPUT_SECTIONS( $OBJECTS_CORE_B(cplb_data) $LIBRARIES_CORE_B(cplb_data))
            INPUT_SECTIONS($OBJECTS_CORE_B(constdata) $LIBRARIES_CORE_B(constdata))
            INPUT_SECTIONS($OBJECTS_CORE_B(voldata) $LIBRARIES_CORE_B(voldata))
            INPUT_SECTIONS($OBJECTS_CORE_B(data1) $LIBRARIES_CORE_B(data1))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS_CORE_B(.edt) $LIBRARIES_CORE_B(.edt) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(.cht) $LIBRARIES_CORE_B(.cht) )
#endif	/* } */
        } >MEM_B_L1_DATA_A
        .meminit{ ALIGN(4) } >MEM_B_L1_DATA_A

        bsz_L1_data_a ZERO_INIT
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS_CORE_B(bsz) $LIBRARIES_CORE_B(bsz))
        } >MEM_B_L1_DATA_A

#if DATAB_CACHE /* { */
        l1_data_b_cache
        {
            INPUT_SECTION_ALIGN(4)
            ___l1_data_cache_b = 1;
        } >MEM_B_L1_DATA_B_CACHE
#endif /* DATAB_CACHE } */

        l1_data_b
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS_CORE_B(L1_data_b) $LIBRARIES_CORE_B(L1_data_b))
#if !DATAB_CACHE /* { */
            ___l1_data_cache_b = 0;
#endif /* } DATAB_CACHE */
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS_CORE_B(ctor) $LIBRARIES_CORE_B(ctor) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(ctorl) $LIBRARIES_CORE_B(ctorl) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(.gdt) $LIBRARIES_CORE_B(.gdt) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(.gdtl) $LIBRARIES_CORE_B(.gdtl) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(vtbl) $LIBRARIES_CORE_B(vtbl) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(.frt) $LIBRARIES_CORE_B(.frt) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(.frtl) $LIBRARIES_CORE_B(.frtl) )
#endif	/* } */
            INPUT_SECTIONS($OBJECTS_CORE_B(data1) $LIBRARIES_CORE_B(data1))
            INPUT_SECTIONS( $OBJECTS_CORE_B(cplb_data) $LIBRARIES_CORE_B(cplb_data))
            INPUT_SECTIONS($OBJECTS_CORE_B(constdata) $LIBRARIES_CORE_B(constdata))
            INPUT_SECTIONS($OBJECTS_CORE_B(voldata) $LIBRARIES_CORE_B(voldata))
#if defined(__cplusplus) || defined(USER_CRT)   /* { */
            INPUT_SECTIONS( $OBJECTS_CORE_B(.edt) $LIBRARIES_CORE_B(.edt) )
            INPUT_SECTIONS( $OBJECTS_CORE_B(.cht) $LIBRARIES_CORE_B(.cht) )
#endif	/* } */
        } >MEM_B_L1_DATA_B

        bsz_L1_data_b ZERO_INIT
        {
            INPUT_SECTION_ALIGN(4)
            INPUT_SECTIONS( $OBJECTS_CORE_B(bsz) $LIBRARIES_CORE_B(bsz))
        } >MEM_B_L1_DATA_B

        stack
        {
            ldf_stack_space = .;
            ldf_stack_end = ldf_stack_space + MEMORY_SIZEOF(MEM_B_L1_STACK);
        } >MEM_B_L1_STACK

        l2_sram_coreA
        {
            INPUT_SECTION_ALIGN(4)
          	INPUT_SECTIONS( $OBJECTS_CORE_B(program) $LIBRARIES_CORE_B(program))
        } >MEM_L2_SRAM_COREA
        
#if !defined(__ADI_MULTICORE)
        heap
        {
            // Allocate a heap for the application
            ldf_heap_space = .;
            ldf_heap_end = ldf_heap_space + MEMORY_SIZEOF(MEM_SDRAM0_HEAP_B) - 1;
            ldf_heap_length = ldf_heap_end - ldf_heap_space;
        } >MEM_SDRAM0_HEAP_B
#endif
    }
}

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