confphy6.inc

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;*******************************************************************
; Definitions for SYSCON Register of 80C166:
;*******************************************************************
;
; MCTC: Memory Cycle Time (SYSCON.0 .. SYSCON.3):
; Note: if RDYEN == 1 a maximum number of 7 waitstates can be selected
_MCTC   EQU     1       ; Memory wait states is 1 (MCTC = 0EH).
;                       ; (Reset Value = 15 additional state times)
;
; RWDC: Read/Write Signal Delay (SYSCON.4):
_RWDC   EQU     1       ; 0 = Delay Time     0.5 States (Reset Value)  
;                       ; 1 = No Delay Time  0   States
;
; MTTC: Memory Tri-state Time (SYSCON.5):
_MTTC   EQU     0       ; 0 = Delay Time     0.5 States (Reset Value)
;                       ; 1 = No Delay Time  0   States
;
; BTYP_ENABLE: Enable External Bus Configuration Control Bits
; --- Set BTYP_ENABLE = 1 to allow modification of BTYP and BUSACT field
;                         in the SYSCON register.
$SET (BTYP_ENABLE = 0)
;
; BTYP: External Bus Configuration Control (SYSCON.7 .. SYSCON.6):
; Note: These bits are only valid if _BUSACT == 1.
_BTYP   EQU     3       ; 0 = 8 Bit Non Multiplexed
;                       ; 1 = 8 Bit Multiplexed
;                       ; 2 = 16 Bit Multiplexed
;                       ; 3 = 16 Bit Non Multiplexed
;
; CLKEN: System Clock Output Enable bit (SYSCON.8):
_CLKEN  EQU     0       ; 0 = disabled    (Reset Value)
;                       ; 1 = enabled
;
; BYTDIS: Byte High Enable pin control bit (SYSCON.9):
_BYTDIS EQU     0       ; 0 = enabled     (Reset Value)
;                       ; 1 = disabled
;
; BUSACT: Bus Active Control Bit (SYSCON.10):
_BUSACT EQU     1       ; 0 = disabled
;                       ; 1 = enabled     (Reset Value)
;
; SGTDIS: Segmentation Disable control bit (SYSCON.11):
_SGTDIS EQU     0       ; 0 = enable segmented mode (Reset Value)
;                       ; 1 = disable segmented mode
;
; RDYEN: READY# Input Enable control bit (SYSCON.12):
_RDYEN  EQU     0       ; 0 = disabled    (Reset Value)
;                       ; 1 = enabled
;
; RDY_AS: Synchronous / Asynchronous READY# Input (SYSCON.3):
; Note: This bit is only valid if _RDYEN == 1.
_RDY_AS EQU     0       ; 0 = synchronous READY# input
;                       ; 1 = asynchronous READY# input
;
; STKSZ: Maximum System Stack Size selection  (SYSCON.13 .. SYSCON.14)
_STKSZ  EQU     0       ; System stack sizes
;                       ; 0 = 256 words (Reset Value)
;                       ; 1 = 128 words
;                       ; 2 =  64 words
;                       ; 3 =  32 words
;
;-----------------------------------------------------------------------------
; BOOT960 = 0 : 80C166 CPU with 32 Byte Bootstrap loader is used
; BOOT960 = 1 : 80C166 CPU with 960 Byte Bootstrap loader is used
;
$SET (BOOT960 = 0)
;
;-----------------------------------------------------------------------------
;
;
; See Code below to initialize other SFR's like BUSCON1 or ADDRSEL1
;
; WATCHDOG is always disabled when using MONITOR!
; 
;
;-----------------------------------------------------------------------------
; Setup SYSCON Register
SYS_L           SET     (_MTTC << 5) OR (_RWDC << 4) OR ((NOT _MCTC) AND 0FH)
SYS_L           SET     SYS_L AND (NOT (_RDYEN << 2))
SYS_L           SET     SYS_L OR (_RDY_AS << 2)
SYS_H           SET     (_STKSZ << 5) OR (_RDYEN << 4) OR (_SGTDIS << 3)
SYS_H           SET     SYS_H OR (_BYTDIS << 1) OR _CLKEN
$IF (BTYP_ENABLE == 1)
SYS_L           SET     SYS_L OR (_BTYP << 6)
SYS_H           SET     SYS_H OR (_BUSACT << 2)
$ENDIF