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📄 syslib.c

📁 For WorkBench2.31 的pentium4 BSP
💻 C
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* RETURNS: N/A** NOMANUAL*/void sysHwInit0 (void)    {#ifdef  INCLUDE_CPU_PROBE    (void) sysCpuProbe ();#else    sysProcessor = X86CPU_DEFAULT;#endif  /* INCLUDE_CPU_PROBE */    }#endif  /* INCLUDE_SYS_HW_INIT_0 *//********************************************************************************* sysHwInit - initialize the system hardware** This routine initializes various features of the i386/i486 board.* It is called from usrInit() in usrConfig.c.** NOTE: This routine should not be called directly by the user application.** RETURNS: N/A*/void sysHwInit (void)    {    PHYS_MEM_DESC *pMmu;    int ix = 0;#if (CPU == PENTIUM) || (CPU == PENTIUM2) || (CPU == PENTIUM3) || \    (CPU == PENTIUM4)    /* initialize the MSRs (Model Specific Registers) */        pentiumMsrInit ();#   if  (CPU != PENTIUM)    /* enable the MTRR (Memory Type Range Registers) */    if ((sysCpuId.featuresEdx & CPUID_MTRR) == CPUID_MTRR)    {        pentiumMtrrDisable ();      /* disable MTRR */#   ifdef INCLUDE_MTRR_GET        (void) pentiumMtrrGet (&sysMtrr); /* get MTRR initialized by BIOS */#   else        (void) pentiumMtrrSet (&sysMtrr); /* set your own MTRR */#   endif /* INCLUDE_MTRR_GET */        pentiumMtrrEnable ();       /* enable MTRR */    }#   endif /* (CPU != PENTIUM) */#   ifdef INCLUDE_PMC    /* enable PMC (Performance Monitoring Counters) */    pentiumPmcStop ();          /* stop PMC0 and PMC1 */    pentiumPmcReset ();         /* reset PMC0 and PMC1 */#   endif /* INCLUDE_PMC */    /* enable the MCA (Machine Check Architecture) */    pentiumMcaEnable (TRUE);#   ifdef INCLUDE_SHOW_ROUTINES    /*      * if excMcaInfoShow is not NULL, it is called in the default     * exception handler when Machine Check Exception happened     */    {    IMPORT FUNCPTR excMcaInfoShow;    excMcaInfoShow = (FUNCPTR) pentiumMcaShow;    }#   endif /* INCLUDE_SHOW_ROUTINES */#endif  /* (CPU == PENTIUM) || (CPU == PENTIUM[234]) */#ifdef INCLUDE_SHOW_ROUTINES    vxShowInit ();#endif /* INCLUDE_SHOW_ROUTINES */    /* initialize the number of active mappings (sysPhysMemDescNumEnt) */    pMmu = &sysPhysMemDesc[0];    for (ix = 0; ix < NELEMENTS (sysPhysMemDesc); ix++)         if (pMmu->virtualAddr != (VIRT_ADDR)DUMMY_VIRT_ADDR)            pMmu++;        else            break;    sysPhysMemDescNumEnt = ix;    /* initialize PCI library */#ifdef  INCLUDE_VXBUS  hardWareInterFaceInit();#else /* INCLUDE_VXBUS */#ifdef  INCLUDE_PCI    pciConfigLibInit (PCI_MECHANISM_1, PCI_CONFIG_ADDR, PCI_CONFIG_DATA, (ULONG) NONE);    sysPciIntInit ();           /* it does pciIntLibInit() */#endif /* INCLUDE_PCI */#endif /* INCLUDE_VXBUS */    /* initialize the PIC (Programmable Interrupt Controller) */    sysIntInitPIC ();       /* should be after the PCI init for IOAPIC */    intEoiGet = sysIntEoiGet;   /* function pointer used in intConnect () */#ifdef INCLUDE_VXBUS    /* Connect intEnable/intDisable function pointers */    sysIntLvlEnableRtn = (FUNCPTR)sysIntEnablePIC;    sysIntLvlDisableRtn = (FUNCPTR)sysIntDisablePIC;#endif /* INCLUDE_VXBUS */    /* initialize PCI devices */#ifdef  INCLUDE_VXBUS#else /* INCLUDE_VXBUS */#ifdef  INCLUDE_PCI#if (PCI_CFG_TYPE == PCI_CFG_AUTO)    /* Some boards don't have a typical BIOS     * for example, Intel's System Firmware Library needs pciAutoConfig      */    sysPciAutoConfig();#endif /* (PCI_CFG_TYPE == PCI_CFG_AUTO) */    /*      * PCI-to-PCI bridge initialization should be done here, if it is.     * It is not necessary for Intel 430HX PCISET, which splits     * the extended memory area as follows:     *   - Flash BIOS area from 4GByte to (4GB - 512KB)     *   - DRAM memory from 1MB to a maximum of 512MB     *   - PCI memory space from the top of DRAM to (4GB - 512KB)     */#ifdef INCLUDE_NETWORK/* Atheros AR521X WLAN Support */#ifdef INCLUDE_AR521X_END    sysDot11BusInit();#endif /* INCLUDE_AR521X_END */    /* initialize PCI network controllers starting from Bus 0 */     pciConfigForeachFunc (0, TRUE, (PCI_FOREACH_FUNC) sysNetPciInit, NULL);#endif /* INCLUDE_NETWORK */#if (defined(INCLUDE_SCSI) && defined(INCLUDE_AIC_7880))    sysAic7880PciInit ();#endif  /* INCLUDE_SCSI && INCLUDE_AIC_7880 */#endif /* INCLUDE_PCI */#endif /* INCLUDE_VXBUS */    /* initialize devices on the board if following SFL boot process */    #ifdef INCLUDE_IACSFL    {#   ifdef INCLUDE_CTB69000VGA    extern int  ctB69000VgaInit();#   endif /* INCLUDE_CTB69000VGA */        /* superIO - basic initialization */    #   ifdef INCLUDE_SMCFDC37B78X    smcFdc37b78xDevCreate ((void *) NULL); /* initialize superIO library */        /* enable only given devices on SuperIO chip */    smcFdc37b78xInit ((SMCFDC37B78X_FDD_EN | SMCFDC37B78X_COM1_EN |                       SMCFDC37B78X_COM2_EN | SMCFDC37B78X_LPT1_EN |                       SMCFDC37B78X_KBD_EN));    #   endif /* INCLUDE_SMCFDC37B78X */        /* PC console - initialization */    #   if defined(INCLUDE_PC_CONSOLE)    #   ifdef INCLUDE_SMCFDC37B78X        smcFdc37b78xKbdInit ();              /* Initialize Kbd on SuperIO */    #   endif /* INCLUDE_SMCFDC37B78X */    #   ifdef INCLUDE_CTB69000VGA        ctB69000VgaInit ();                  /* Initialize VGA card */    #   endif /* INCLUDE_CTB69000VGA */    #   endif /* INCLUDE_PC_CONSOLE */        }#endif /* INCLUDE_IACSFL */    /* initializes the serial devices */#ifndef INCLUDE_NS16550_SIO    sysSerialHwInit ();      /* initialize serial data structure */#endif /* INCLUDE_NS16550_SIO */#ifdef INCLUDE_WINDML    sysWindMLHwInit ();#endif /* INCLUDE_WINDML */#ifdef VX_POWER_MANAGEMENT    /*     * initializes Power Management Mode     * VX_POWER_MODE_DEFAULT is defined in config.h     */    vxPowerModeSet(VX_POWER_MODE_DEFAULT);#endif /* VX_POWER_MANAGEMENT */    }/********************************************************************************* sysHwInit2 - additional system configuration and initialization** This routine connects system interrupts and does any additional* configuration necessary.** RETURNS: N/A*/void sysHwInit2 (void)    {#if defined (INCLUDE_ADD_BOOTMEM)    /*     * We memAddToPool some upper memory into any low memory     * x86 "rom" images pool.  The x86 low memory images reside     * from 0x8000 to 0xa0000.  By memAddToPool'ing some upper     * memory here, we allow devices a larger pool to swim within.     * (SPR#21338).  This is no longer performed in bootConfig.c     */#   if (ADDED_BOOTMEM_SIZE != 0x0)     /*     * if &end (compiler symbol) is in lower memory, then we assume      * this is a low memory image, and add some upper memory to the pool.     */        /* Only do this if there is enough memory. Default is 4MB min. */     if ((UINT32)(&end) < 0x100000)        {         if ((UINT32)(memTopPhys) >= (0x00200000 + ADDED_BOOTMEM_SIZE))            {            memAddToPool ((char *)memTopPhys - ADDED_BOOTMEM_SIZE,                          ADDED_BOOTMEM_SIZE);            }        }#   endif /* (ADDED_BOOTMEM_SIZE !=0) */#endif  /* INCLUDE_ADD_BOOTMEM defined */     /* connect sys clock interrupt and auxiliary clock interrupt*/#ifdef  INCLUDE_APIC_TIMER    (void)intConnect (INUM_TO_IVEC (INT_NUM_LOAPIC_TIMER), sysClkInt, 0);#   ifdef PIT0_FOR_AUX    (void)intConnect (INUM_TO_IVEC (INT_NUM_GET (PIT0_INT_LVL)), sysAuxClkInt, 0);#   else    (void)intConnect (INUM_TO_IVEC (INT_NUM_GET (RTC_INT_LVL)), sysAuxClkInt, 0);#   endif /* PIT0_FOR_AUX */#else    (void)intConnect (INUM_TO_IVEC (INT_NUM_GET (PIT0_INT_LVL)), sysClkInt, 0);    (void)intConnect (INUM_TO_IVEC (INT_NUM_GET (RTC_INT_LVL)), sysAuxClkInt, 0);#endif  /* INCLUDE_APIC_TIMER */#ifndef INCLUDE_NS16550_SIO    /* connect serial interrupt */      sysSerialHwInit2();#endif /* INCLUDE_NS16550_SIO */#ifdef INCLUDE_VXBUS    vxbDevInit();#ifdef INCLUDE_SIO_UTILS    sysSerialConnectAll();#endif /* INCLUDE_SIO_UTILS */    /* initialize non-vxBus PCI network controllers starting from Bus 0 */     pciConfigForeachFunc (0, TRUE, (PCI_FOREACH_FUNC) sysNetPciInit, NULL);#endif /* INCLUDE_VXBUS */    /* connect stray(spurious/phantom) interrupt */  #if     defined(VIRTUAL_WIRE_MODE)    (void)intConnect (INUM_TO_IVEC (INT_NUM_LOAPIC_SPURIOUS), sysStrayInt, 0);    (void)intConnect (INUM_TO_IVEC (INT_NUM_GET (LPT_INT_LVL)), sysStrayInt, 0);#elif   defined(SYMMETRIC_IO_MODE)    (void)intConnect (INUM_TO_IVEC (INT_NUM_LOAPIC_SPURIOUS), sysStrayInt, 0);#else    (void)intConnect (INUM_TO_IVEC (INT_NUM_GET (LPT_INT_LVL)), sysStrayInt, 0);    (void)intConnect (INUM_TO_IVEC (INT_NUM_GET (PIC_SLAVE_STRAY_INT_LVL)),               sysStrayInt, 0);#endif  /* defined(VIRTUAL_WIRE_MODE) */#ifdef  INCLUDE_PC_CONSOLE    /* connect keyboard Controller 8042 chip interrupt */    (void) intConnect (INUM_TO_IVEC (INT_NUM_GET (KBD_INT_LVL)), kbdIntr, 0);#endif  /* INCLUDE_PC_CONSOLE */#if defined (TGT_CPU) && defined (SYMMETRIC_IO_MODE)    /* init IPI vectors, connect IPI handler up to IPI_MAX_HANDLERS (=8) */    ipiVecInit (INT_NUM_LOAPIC_IPI);    ipiConnect ((INT_NUM_LOAPIC_IPI + 0), ipiHandlerShutdown);    ipiConnect ((INT_NUM_LOAPIC_IPI + 1), ipiHandlerTscReset);    ipiConnect ((INT_NUM_LOAPIC_IPI + 2), ipiHandlerTlbFlush);#endif  /* defined (TGT_CPU) && defined (SYMMETRIC_IO_MODE) */#ifdef  INCLUDE_THERM_MONITOR    sysThermInit ();#endif  /* INCLUDE_THERM_MONITOR */#ifdef  INCLUDE_DEBUG_STORE    sysDbgStrInit ();#endif  /* INCLUDE_DEBUG_STORE */#ifdef INCLUDE_VXBUS

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