etherequ.inc

VRTX 商用嵌入式实时操作系统

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;                                                                        ;
;             Copyright (c) 1997 Microtec Reseach Inc.                   ;
;                                                                        ;
;    All rights reserved. Microtec's source code is an unpublished       ;
;    work and the use of a copyright notice does not imply otherwise.    ;
;    This source code contains confidential, trade secret material of'   ;
;    Microtec. Any attempt or participation in deciphering,              ;
;    decoding, reverse engineering or in any way altering the source     ;
;    code is strictly prohibited, unless the prior written consent of    ;
;    Microtec is obtained.                                               ;
;                                                                        ;
;                                                                        ;
;    Module Name:           ne2000.ieq                                   ;
;                                                                        ;
;    Identification:        Version 1.0                                  ;
;                                                                        ;
;    Date:                  1/29/97                                      ;
; =======================================================================
;
; NE2000.IEQ - I/O equates for NE2000 Ethernet Card
;   Microdyne NE2000plus-3  #883-002650-001
;
; Module Name:  ne2000.ieq
; Module Desc:  include file (as hwequ.inc) for board.src 
; Created:      January, 1997
;
; Revision:     1.0
; --------------------------------------------------------------------
; General Information:
;
; ====================================================================

;*****************************************************************************
;	Definitions for Ethernet Connection
;
; RARPs
; Number of RARPS to do. If this number of rarps is exceeded then without
; a proper response being recieved then the init_ethernet routine returns
; an error. If NUM_RARPS is set to zero then NO RARPs will be executed,
; In this case the IP address for the card must be defined below.
;

NUM_RARPS	EQU	%RARPS

; IP ADDRESS
; This is the IP address as used by the Monitor. This value is not required
; if RARPs are used.
;

IP_ADDR0	EQU %IP0
IP_ADDR1	EQU	%IP1
IP_ADDR2	EQU	%IP2
IP_ADDR3	EQU	%IP3


; ETHERNET ADDRESS
; Ethernet physical address, this value can be overwritten by supplying
; a function get_et_addr ( see net.c). If such afunction returns a zero
; value then the address below is used as the ethernet address, if the
; function returns non zero then the values for the ethernet address are
; chosen by the the code in get_et_addr. In this way a ROM or NVRAM can be
; read to determine the ethernet address.
; See net.c for calling convention etc. of get_et_addr
;

ETH_ADDR0	EQU	%ETH0
ETH_ADDR1	EQU	%ETH1
ETH_ADDR2	EQU	%ETH2
ETH_ADDR3	EQU	%ETH3
ETH_ADDR4	EQU	%ETH4
ETH_ADDR5	EQU	%ETH5





; UDP PORT NUMBER
; Monitor's UDP port - typical value 2000, the board will only process
; packets which have this UDP port set in the UDP destination field.
;

MON_UDP_PORT	EQU	%UDP_PORT


; Interrupt/Polled mode setting.
;

%IF ((%CONIO AND %INTRPT) ne 0) THEN
(
ETH_INT_ENABLE	EQU	1			; 0=Polled, 1=Interrupt mode
)
ELSE
(
ETH_INT_ENABLE	EQU 0
)
FI

; Network Interface Card (Adapter) definitions.
;

NIC_IOADDR	EQU	%ETH_IOADDR			; Adapter I/O base address
NIC_IRQ		EQU	%ETH_IRQ				; IRQ number
NIC_CABLE_T	EQU	%ETH_CABLETYPE			; Ethernet cable type
											;  0 = 10 Base T (twisted)
											;  1 = 10 Base 2 (thin coax)
											;  2 = 10 Base 5 (thick coax)
											;  3 = 10 Base T (special)

;*****************************************************************************
; 8259 INTERRUPT CONTROLLER
%SET (NUM_8259, 2)              ;set the number of 8259's 1 or 2

MASTER_8259 EQU 020H            ;I/O space address of 8259
SLAVE_8259  EQU 0A0H
%IF (%IOINTVECT eq 0) THEN(
MASTER_8259_BASE EQU 030H           ;base for interrupts from the 1st 8259
SLAVE_8259_BASE  EQU 038H           ;base of interrupts for the 2nd 8259 lwr 3 bits
				                    ;must be 0
)ELSE(
MASTER_8259_BASE EQU %IOINTVECT     ;base for interrupts from the 1st 8259
SLAVE_8259_BASE  EQU MASTER_8259_BASE + 8  ;base of interrupts for the 2nd 8259 
)FI