📄 fw.c
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switch(SETUPDAT[3])
{
case GD_DEVICE: // Device
sendDescriptor(LSB(pDeviceDscr));
break;
case GD_DEVICE_QUALIFIER: // Device Qualifier
// if high-speed is disabled, we are supposed to STALL this request
if (!CT1)
{
// high-speed is enabled, return the device qualifier
sendDescriptor(LSB(pDeviceQualDscr));
}
else
{
// high-speed is disabled, STALL this request
EZUSB_STALL_EP0();
}
break;
case GD_CONFIGURATION: // Configuration
((CONFIGDSCR xdata *) pFullSpeedConfigDscr)->type = CONFIG_DSCR;
goto generalConfigurationCase;
case GD_OTHER_SPEED_CONFIGURATION: // Other Speed Configuration
((CONFIGDSCR xdata *) pFullSpeedConfigDscr)->type = OTHERSPEED_DSCR;
generalConfigurationCase:
if (bBIG_PACKAGE)
{
if (VBUSPWRD)
{
((BYTE xdata *) pFullSpeedConfigDscr)[CONFIG_DSCR_ATTRIB_OFFSET] &= ~(1 <<6); // Bit 6 -- 1 = self-power, 0 = bus power
((BYTE xdata *) pFullSpeedConfigDscr)[CONFIG_DSCR_POWER_OFFSET] = 500/2;
}
else
{
((BYTE xdata *) pFullSpeedConfigDscr)[CONFIG_DSCR_ATTRIB_OFFSET] |= 1 <<6; // Bit 6 -- 1 = self-power, 0 = bus power
((BYTE xdata *) pFullSpeedConfigDscr)[CONFIG_DSCR_POWER_OFFSET] = 1;
}
}
if ( (EZUSB_HIGHSPEED() && SETUPDAT[3] == GD_CONFIGURATION)
|| (!EZUSB_HIGHSPEED() && SETUPDAT[3] == GD_OTHER_SPEED_CONFIGURATION))
{
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+EP_DSCR_LEN_LSB_OFFSET] = 0;
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+EP_DSCR_LEN_MSB_OFFSET] = 0x2;
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+DSCR_ENDPNT_LEN+EP_DSCR_LEN_LSB_OFFSET] = 0;
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+DSCR_ENDPNT_LEN+EP_DSCR_LEN_MSB_OFFSET] = 0x2;
}
else
{
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+EP_DSCR_LEN_LSB_OFFSET] = 0x40;
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+EP_DSCR_LEN_MSB_OFFSET] = 0;
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+DSCR_ENDPNT_LEN+EP_DSCR_LEN_LSB_OFFSET] = 0x40;
((BYTE xdata *) pFullSpeedConfigDscr)[DSCR_CONFIG_LEN+DSCR_INTRFC_LEN+DSCR_ENDPNT_LEN+EP_DSCR_LEN_MSB_OFFSET] = 0;
}
sendDescriptor(LSB(pFullSpeedConfigDscr));
break;
case GD_HID: // Get-Descriptor: HID
if (HIDIntrfcDscrOffset)
sendDescriptor(HIDIntrfcDscrOffset+ (BYTE) &HIDDscrOffset);
else
EZUSB_STALL_EP0(); // Stall End Point 0
break;
case GD_REPORT: // Get-Descriptor: Report
//case GD_CHANNEL_DESCRIPTOR:
if (CSMIntrfcDscrOffset && halfKBuffer[CSMIntrfcDscrOffset+2] == wIndex)
sendDescriptor(CSMIntrfcDscrOffset+ (BYTE) &CSMChannelDscrOffset);
else if (HIDIntrfcDscrOffset && halfKBuffer[HIDIntrfcDscrOffset+2] == wIndex)
{
/*
Note: A HID report does not have a length field which the SIE can read to determine how many
bytes to send using the Setup Data Pointer. Therefore we need to 'manually' send the data.
We have limited our report size to less than 64 bytes.
*/
BYTE j;
AUTOPTR1H = MSB(halfKBuffer);
AUTOPTR1L = LSB(&HIDReportDscrOffset+HIDIntrfcDscrOffset);
for(j=0;j<64;j++)
EP0BUF[j]=XAUTODAT1;
EP0BCL = (BYTE) &HIDReportDscrLen; // arm the IN transfer
}
else
EZUSB_STALL_EP0(); // Stall End Point 0
break;
case GD_STRING: // String
// explanation. String indexes are calculated. The index is
// the offset of the string in the eeprom divided by two.
// The first 16 bytes of the eeprom are config bytes. So, to
// get the actual address of the string descriptor in memory,
// you double the string indes subtract 16 (to account for the
// config bytes in the eeprom) and add that to the address of
// the device descriptor. simple.
if (setupdat2)
sendDescriptor(LSB(pDeviceDscr + (setupdat2 * 2) - 16));
else
{
// Look up string descriptor 0. This is kind of a pain because
// we cannot constrain the old EEPROM format
BYTE offset = 0xff;
BYTE i;
for (i = (BYTE)&SerialNumberIndexOffset-2; i <= (BYTE) &SerialNumberIndexOffset; i++)
if (halfKBuffer[i])
offset = min(halfKBuffer[i], offset);
// string offset will be lowest one - 4
sendDescriptor((offset*2-16)-4);
}
break;
case GD_CSM_DESCRIPTOR:
if (CSMIntrfcDscrOffset && halfKBuffer[CSMIntrfcDscrOffset+2] == wIndex)
sendDescriptor(CSMIntrfcDscrOffset + (BYTE) &CSMCSMDscrOffset);
else
EZUSB_STALL_EP0(); // Stall End Point 0
break;
case GD_CSMV_DESCRIPTOR:
if (CSMIntrfcDscrOffset && halfKBuffer[CSMIntrfcDscrOffset+2] == wIndex)
sendDescriptor(CSMIntrfcDscrOffset + (BYTE) &CSMCSMVDscrOffset);
else
EZUSB_STALL_EP0(); // Stall End Point 0
break;
default: // Invalid request
EZUSB_STALL_EP0(); // Stall End Point 0
} // switch
break;
case SC_GET_INTERFACE: // *** Get Interface
EP0BUF[0] = AlternateSetting;
EP0BCL = 1;
break;
case SC_SET_INTERFACE: // *** Set Interface
// From USB 2.0 spec 9.4.5
// The Halt feature is reset to zero after either a SetConfiguration() or SetInterface() request even if the
// requested configuration or interface is the same as the current configuration or interface.
EP2CS = 0; // Clear stall bit
EP6CS = 0;
EP1INCS = 0;
// Clear Data Toggles.
TOGCTL = 0x2; // Reset data toggle for EP2
TOGCTL = 0x22;
TOGCTL = 0x16; // Reset data toggle for EP6
TOGCTL = 0x36;
TOGCTL = 0x11; // Reset data toggle for EP1
TOGCTL = 0x31;
AlternateSetting = setupdat2;
break;
case SC_SET_CONFIGURATION: // *** Set Configuration
// From USB 2.0 spec 9.4.5
// The Halt feature is reset to zero after either a SetConfiguration() or SetInterface() request even if the
// requested configuration or interface is the same as the current configuration or interface.
EP2CS = 0; // Clear stall bit
EP6CS = 0;
EP1INCS = 0;
Configuration = setupdat2;
// compliance code
if (!Configuration && VBUS_POWERED)
powerOff();
break;
case SC_GET_CONFIGURATION: // *** Get Configuration
EP0BUF[0] = Configuration;
EP0BCL = 1;
break;
case SC_GET_STATUS: // *** Get Status
switch(setupdat0)
{
case GS_DEVICE: // Device
if (bBIG_PACKAGE)
{
if (VBUSPWRD)
EP0BUF[0] = 0x00; // Bit 0 -- 1 = self-power, 0 = bus power
else
EP0BUF[0] = 0x01; // Bit 0 -- 1 = self-power, 0 = bus power
}
else
{
EP0BUF[0] = (((BYTE xdata *) pFullSpeedConfigDscr)[CONFIG_DSCR_ATTRIB_OFFSET] & (1 <<6)) >> 6; // Descriptor bit 6 -- 1 = self-power, 0 = bus power
}
EP0BUF[1] = 0; // Bit 1 -- remote wakeup enabled (0 for us)
EP0BCL = 2;
break;
case GS_INTERFACE: // Interface
EP0BUF[0] = 0;
EP0BUF[1] = 0;
EP0BCL = 2;
break;
case GS_ENDPOINT: // End Point
if (wIndex == 0x2)
{
EP0BUF[0] = (EP2CS & bmEPSTALL);
}
else if (wIndex == 0x86)
{
EP0BUF[0] = (EP6CS & bmEPSTALL);
}
else if (wIndex == 0x81)
{
EP0BUF[0] = (EP1INCS & bmEPSTALL);
}
else if (wIndex == 0x00)
{
EP0BUF[0] = 0x00;
}
else
{
EZUSB_STALL_EP0(); // Stall End Point 0
break;
}
EP0BUF[1] = 0;
EP0BCL = 2;
break;
default: // Invalid Command
EZUSB_STALL_EP0(); // Stall End Point 0
}
break;
case SC_CLEAR_FEATURE: // *** Clear Feature
switch(setupdat0)
{
case FT_DEVICE: // Device
EZUSB_STALL_EP0(); // Stall End Point 0
break;
case FT_ENDPOINT: // End Point
if(setupdat2 == 0)
{
// do not clear endpoint STALLs if we received an invalid CBW.
// The BOT MSC Spec says we must stay STALL'd until we get reset
if (!phaseErrorState)
{
if (wIndex == 0x2)
{
ResetAndArmEp2();
TOGCTL = 0x2;
TOGCTL = 0x22; // reset data toggle
EP2CS = 0; // Clear stall bit
}
else if (wIndex == 0x86)
{
TOGCTL = 0x16;
TOGCTL = 0x36; // reset data toggle
EP6CS = 0; // Clear stall bit
}
else if (wIndex == 0x81)
{
TOGCTL = 0x11;
TOGCTL = 0x31; // reset data toggle
EP1INCS = 0; // Clear stall bit
}
else if (wIndex == 0x0)
{
// EP0 STALLs are auto-clear
}
else
EZUSB_STALL_EP0(); // Stall End Point 0
}
}
else
EZUSB_STALL_EP0(); // Stall End Point 0
break;
default:
EZUSB_STALL_EP0(); // Stall End Point 0
}
break;
case SC_SET_FEATURE: // *** Set Feature
switch(setupdat0)
{
case FT_DEVICE: // Device
if(setupdat2 == 2)
// Set Feature Test Mode. The core handles this request. However, it is
// necessary for the firmware to complete the handshake phase of the
// control transfer before the chip will enter test mode. It is also
// necessary for FX2 to be physically disconnected (D+ and D-)
// from the host before it will enter test mode.
break;
else
EZUSB_STALL_EP0(); // Stall End Point 0
break;
case FT_ENDPOINT: // End Point
if(setupdat2 == 0)
{
if (wIndex == 0x2)
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