av7110_hw.c

linux环境下的dvb驱动程序

/*
 * av7110_hw.c: av7110 low level hardware access and firmware interface
 *
 * Copyright (C) 1999-2002 Ralph  Metzler
 *                       & Marcus Metzler for convergence integrated media GmbH
 *
 * originally based on code by:
 * Copyright (C) 1998,1999 Christian Theiss <[e-mail]>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
 *
 * the project's page is at http://www.linuxtv.org/dvb/
 */

/* for debugging ARM communication: */
//#define COM_DEBUG

#include <stdarg.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/delay.h>
#include <linux/byteorder/swabb.h>
#include <linux/smp_lock.h>
#include <linux/fs.h>

#define DEBUG_VARIABLE av7110_debug
extern int av7110_debug;

#include "av7110.h"
#include "av7110_hw.h"
#include "dvb_functions.h"

/****************************************************************************
 * DEBI functions
 ****************************************************************************/

/* This DEBI code is based on the Stradis driver
   by Nathan Laredo <[e-mail]> */

int av7110_debiwrite(struct av7110 *av7110, u32 config,
		     int addr, u32 val, int count)
{
	struct saa7146_dev *dev = av7110->dev;

	if (count <= 0 || count > 32764)
		return -1;
	if (saa7146_wait_for_debi_done(av7110->dev) < 0)
		return -1;
	saa7146_write(dev, DEBI_CONFIG, config);
	if (count <= 4)		/* immediate transfer */
		saa7146_write(dev, DEBI_AD, val);
	else			/* block transfer */
		saa7146_write(dev, DEBI_AD, av7110->debi_bus);
	saa7146_write(dev, DEBI_COMMAND, (count << 17) | (addr & 0xffff));
	saa7146_write(dev, MC2, (2 << 16) | 2);
	return 0;
}

u32 av7110_debiread(struct av7110 *av7110, u32 config, int addr, int count)
{
	struct saa7146_dev *dev = av7110->dev;
	u32 result = 0;

	if (count > 32764 || count <= 0)
		return 0;
	if (saa7146_wait_for_debi_done(av7110->dev) < 0)
		return 0;
	saa7146_write(dev, DEBI_AD, av7110->debi_bus);
	saa7146_write(dev, DEBI_COMMAND, (count << 17) | 0x10000 | (addr & 0xffff));

	saa7146_write(dev, DEBI_CONFIG, config);
	saa7146_write(dev, MC2, (2 << 16) | 2);
	if (count > 4)
		return count;
	saa7146_wait_for_debi_done(av7110->dev);
	result = saa7146_read(dev, DEBI_AD);
	result &= (0xffffffffUL >> ((4 - count) * 8));
	return result;
}



/* av7110 ARM core boot stuff */

void av7110_reset_arm(struct av7110 *av7110)
{
	saa7146_setgpio(av7110->dev, RESET_LINE, SAA7146_GPIO_OUTLO);

	/* Disable DEBI and GPIO irq */
	IER_DISABLE(av7110->dev, (MASK_19 | MASK_03));
	saa7146_write(av7110->dev, ISR, (MASK_19 | MASK_03));

	//FIXME: are those mdelays really necessary?
	mdelay(800);
	saa7146_setgpio(av7110->dev, RESET_LINE, SAA7146_GPIO_OUTHI);
	mdelay(800);

	ARM_ResetMailBox(av7110);

	saa7146_write(av7110->dev, ISR, (MASK_19 | MASK_03));
	IER_ENABLE(av7110->dev, MASK_03);

	av7110->arm_ready = 1;
	printk("av7110: ARM RESET\n");
}


static int waitdebi(struct av7110 *av7110, int adr, int state)
{
	int k;

	DEB_EE(("av7110: %p\n", av7110));

	for (k = 0; k < 100; k++) {
		if (irdebi(av7110, DEBINOSWAP, adr, 0, 2) == state)
			return 0;
		udelay(500);
	}
	return -1;
}

static int load_dram(struct av7110 *av7110, u32 *data, int len)
{
	int i;
	int blocks, rest;
	u32 base, bootblock = BOOT_BLOCK;

	DEB_EE(("av7110: %p\n", av7110));

	blocks = len / BOOT_MAX_SIZE;
	rest = len % BOOT_MAX_SIZE;
	base = DRAM_START_CODE;

	for (i = 0; i < blocks; i++) {
		if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0)
			return -1;
		DEB_D(("Writing DRAM block %d\n", i));
		mwdebi(av7110, DEBISWAB, bootblock,
		       ((char*)data) + i * BOOT_MAX_SIZE, BOOT_MAX_SIZE);
		bootblock ^= 0x1400;
		iwdebi(av7110, DEBISWAB, BOOT_BASE, swab32(base), 4);
		iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, BOOT_MAX_SIZE, 2);
		iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
		base += BOOT_MAX_SIZE;
	}

	if (rest > 0) {
		if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0)
			return -1;
		if (rest > 4)
			mwdebi(av7110, DEBISWAB, bootblock,
			       ((char*)data) + i * BOOT_MAX_SIZE, rest);
		else
			mwdebi(av7110, DEBISWAB, bootblock,
			       ((char*)data) + i * BOOT_MAX_SIZE - 4, rest + 4);

		iwdebi(av7110, DEBISWAB, BOOT_BASE, swab32(base), 4);
		iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, rest, 2);
		iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
	}
	if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BUFFER_EMPTY) < 0)
		return -1;
	iwdebi(av7110, DEBINOSWAP, BOOT_SIZE, 0, 2);
	iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);
	if (waitdebi(av7110, BOOT_STATE, BOOTSTATE_BOOT_COMPLETE) < 0)
		return -1;
	return 0;
}


/* we cannot write av7110 DRAM directly, so load a bootloader into
 * the DPRAM which implements a simple boot protocol */
static u8 bootcode[] = {
	0xea, 0x00, 0x00, 0x0e, 0xe1, 0xb0, 0xf0, 0x0e, /* 0x0000 */
	0xe2, 0x5e, 0xf0, 0x04, 0xe2, 0x5e, 0xf0, 0x04,
	0xe2, 0x5e, 0xf0, 0x08, 0xe2, 0x5e, 0xf0, 0x04,
	0xe2, 0x5e, 0xf0, 0x04, 0xe2, 0x5e, 0xf0, 0x04,
	0x2c, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x0c,
	0x00, 0x00, 0x00, 0x00, 0x2c, 0x00, 0x00, 0x34,
	0x00, 0x00, 0x00, 0x00, 0xa5, 0xa5, 0x5a, 0x5a,
	0x00, 0x1f, 0x15, 0x55, 0x00, 0x00, 0x00, 0x09,
	0xe5, 0x9f, 0xd0, 0x5c, 0xe5, 0x9f, 0x40, 0x54, /* 0x0040 */
	0xe3, 0xa0, 0x00, 0x00, 0xe5, 0x84, 0x00, 0x00,
	0xe5, 0x84, 0x00, 0x04, 0xe1, 0xd4, 0x10, 0xb0,
	0xe3, 0x51, 0x00, 0x00, 0x0a, 0xff, 0xff, 0xfc,
	0xe1, 0xa0, 0x10, 0x0d, 0xe5, 0x94, 0x30, 0x04,
	0xe1, 0xd4, 0x20, 0xb2, 0xe2, 0x82, 0x20, 0x3f,
	0xe1, 0xb0, 0x23, 0x22, 0x03, 0xa0, 0x00, 0x02,
	0xe1, 0xc4, 0x00, 0xb0, 0x0a, 0xff, 0xff, 0xf4,
	0xe8, 0xb1, 0x1f, 0xe0, 0xe8, 0xa3, 0x1f, 0xe0, /* 0x0080 */
	0xe8, 0xb1, 0x1f, 0xe0, 0xe8, 0xa3, 0x1f, 0xe0,
	0xe2, 0x52, 0x20, 0x01, 0x1a, 0xff, 0xff, 0xf9,
	0xe2, 0x2d, 0xdb, 0x05, 0xea, 0xff, 0xff, 0xec,
	0x2c, 0x00, 0x03, 0xf8, 0x2c, 0x00, 0x04, 0x00,
};

int av7110_bootarm(struct av7110 *av7110)
{
	struct saa7146_dev *dev = av7110->dev;
	u32 ret;
	int i;

	DEB_EE(("av7110: %p\n", av7110));

	saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTLO);

	/* Disable DEBI and GPIO irq */
	IER_DISABLE(av7110->dev, MASK_03 | MASK_19);
	saa7146_write(av7110->dev, ISR, (MASK_19 | MASK_03));

	/* enable DEBI */
	saa7146_write(av7110->dev, MC1, 0x08800880);
	saa7146_write(av7110->dev, DD1_STREAM_B, 0x00000000);
	saa7146_write(av7110->dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));

	/* test DEBI */
	iwdebi(av7110, DEBISWAP, DPRAM_BASE, 0x76543210, 4);
	if ((ret=irdebi(av7110, DEBINOSWAP, DPRAM_BASE, 0, 4)) != 0x10325476) {
		printk(KERN_ERR "dvb: debi test in av7110_bootarm() failed: "
		       "%08x != %08x (check your BIOS notplug settings)\n",
		       ret, 0x10325476);
		return -1;
	}
	for (i = 0; i < 8192; i += 4)
		iwdebi(av7110, DEBISWAP, DPRAM_BASE + i, 0x00, 4);
	DEB_D(("av7110_bootarm: debi test OK\n"));

	/* boot */
	DEB_D(("av7110_bootarm: load boot code\n"));
	saa7146_setgpio(dev, ARM_IRQ_LINE, SAA7146_GPIO_IRQLO);
	//saa7146_setgpio(dev, DEBI_DONE_LINE, SAA7146_GPIO_INPUT);
	//saa7146_setgpio(dev, 3, SAA7146_GPIO_INPUT);

	mwdebi(av7110, DEBISWAB, DPRAM_BASE, bootcode, sizeof(bootcode));
	iwdebi(av7110, DEBINOSWAP, BOOT_STATE, BOOTSTATE_BUFFER_FULL, 2);

	if (saa7146_wait_for_debi_done(av7110->dev)) {
		printk(KERN_ERR "dvb: av7110_bootarm(): "
		       "saa7146_wait_for_debi_done() timed out\n");
		return -1;
	}
	saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTHI);
	//FIXME: necessary?
	set_current_state(TASK_INTERRUPTIBLE);
	schedule_timeout(HZ);

	DEB_D(("av7110_bootarm: load dram code\n"));
	if (load_dram(av7110, (u32 *)av7110->bin_root, av7110->size_root) < 0)
		return -1;

	saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTLO);
	mdelay(1);

	DEB_D(("av7110_bootarm: load dpram code\n"));
	mwdebi(av7110, DEBISWAB, DPRAM_BASE, av7110->bin_dpram, av7110->size_dpram);

	if (saa7146_wait_for_debi_done(av7110->dev)) {
		printk(KERN_ERR "dvb: av7110_bootarm(): "
		       "saa7146_wait_for_debi_done() timed out after loading DRAM\n");
		return -1;
	}
	saa7146_setgpio(dev, RESET_LINE, SAA7146_GPIO_OUTHI);
	//FIXME: necessary?
	mdelay(800);

	//ARM_ClearIrq(av7110);
	ARM_ResetMailBox(av7110);
	saa7146_write(av7110->dev, ISR, (MASK_19 | MASK_03));
	IER_ENABLE(av7110->dev, MASK_03);

	av7110->arm_errors = 0;
	av7110->arm_ready = 1;
	return 0;
}


/****************************************************************************
 * DEBI command polling
 ****************************************************************************/

int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length)
{
	int i;
	unsigned long start;
#ifdef COM_DEBUG
	u32 stat;
#endif

//	DEB_EE(("av7110: %p\n", av7110));

	if (!av7110->arm_ready) {
		DEB_D(("arm not ready.\n"));
		return -1;
	}

	start = jiffies;
	while (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2 )) {
		dvb_delay(1);
		if (time_after(jiffies, start + ARM_WAIT_FREE)) {
			printk(KERN_ERR "%s: timeout waiting for COMMAND idle\n", __FUNCTION__);
			return -1;
		}
	}

#ifndef _NOHANDSHAKE
	start = jiffies;
	while (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2 )) {
		dvb_delay(1);
		if (time_after(jiffies, start + ARM_WAIT_SHAKE)) {
			printk(KERN_ERR "%s: timeout waiting for HANDSHAKE_REG\n", __FUNCTION__);
			return -1;
		}
	}
#endif

	start = jiffies;
	while (rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2) & OSDQFull) {
		dvb_delay(1);
		if (time_after(jiffies, start + ARM_WAIT_OSD)) {
			printk(KERN_ERR "%s: timeout waiting for !OSDQFull\n", __FUNCTION__);
			return -1;
		}
	}
	for (i = 2; i < length; i++)
		wdebi(av7110, DEBINOSWAP, COMMAND + 2 * i, (u32) buf[i], 2);

	if (length)
		wdebi(av7110, DEBINOSWAP, COMMAND + 2, (u32) buf[1], 2);
	else
		wdebi(av7110, DEBINOSWAP, COMMAND + 2, 0, 2);

	wdebi(av7110, DEBINOSWAP, COMMAND, (u32) buf[0], 2);

#ifdef COM_DEBUG
	start = jiffies;
	while (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2 )) {
		dvb_delay(1);
		if (time_after(jiffies, start + ARM_WAIT_FREE)) {
			printk(KERN_ERR "%s: timeout waiting for COMMAND to complete\n",
			       __FUNCTION__);
			return -1;
		}
	}

	stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2);
	if (stat & GPMQOver) {
		printk(KERN_ERR "%s: GPMQOver\n", __FUNCTION__);
		return -1;
	}
	else if (stat & OSDQOver) {
		printk(KERN_ERR "%s: OSDQOver\n", __FUNCTION__);
		return -1;
	}
#endif

	return 0;
}

int av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length)
{
	int ret;

//	DEB_EE(("av7110: %p\n", av7110));

	if (!av7110->arm_ready) {
		DEB_D(("arm not ready.\n"));
		return -1;
	}
	if (down_interruptible(&av7110->dcomlock))
		return -ERESTARTSYS;

	ret = __av7110_send_fw_cmd(av7110, buf, length);
	up(&av7110->dcomlock);
	if (ret)
		printk("av7110_send_fw_cmd error\n");
	return ret;
}

int av7110_fw_cmd(struct av7110 *av7110, int type, int com, int num, ...)
{
	va_list args;
	u16 buf[num + 2];
	int i, ret;

//	DEB_EE(("av7110: %p\n",av7110));

	buf[0] = ((type << 8) | com);
	buf[1] = num;

	if (num) {
		va_start(args, num);
		for (i = 0; i < num; i++)
			buf[i + 2] = va_arg(args, u32);
		va_end(args);
	}

	ret = av7110_send_fw_cmd(av7110, buf, num + 2);
	if (ret)
		printk("av7110_fw_cmd error\n");
	return ret;
}

int av7110_send_ci_cmd(struct av7110 *av7110, u8 subcom, u8 *buf, u8 len)
{
	int i, ret;
	u16 cmd[18] = { ((COMTYPE_COMMON_IF << 8) + subcom),
		16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };

	DEB_EE(("av7110: %p\n", av7110));

	for(i = 0; i < len && i < 32; i++)
	{
		if(i % 2 == 0)
			cmd[(i / 2) + 2] = (u16)(buf[i]) << 8;
		else
			cmd[(i / 2) + 2] |= buf[i];
	}

	ret = av7110_send_fw_cmd(av7110, cmd, 18);
	if (ret)
		printk("av7110_send_ci_cmd error\n");
	return ret;
}

int av7110_fw_request(struct av7110 *av7110, u16 *request_buf,
		      int request_buf_len, u16 *reply_buf, int reply_buf_len)
{
	int err;
	s16 i;
	unsigned long start;
#ifdef COM_DEBUG
	u32 stat;
#endif

	DEB_EE(("av7110: %p\n", av7110));

	if (!av7110->arm_ready) {
		DEB_D(("arm not ready.\n"));
		return -1;
	}

	if (down_interruptible(&av7110->dcomlock))
		return -ERESTARTSYS;

	if ((err = __av7110_send_fw_cmd(av7110, request_buf, request_buf_len)) < 0) {
		up(&av7110->dcomlock);
		printk("av7110_fw_request error\n");
		return err;
	}

	start = jiffies;
	while (rdebi(av7110, DEBINOSWAP, COMMAND, 0, 2)) {
#ifdef _NOHANDSHAKE
		dvb_delay(1);
#endif
		if (time_after(jiffies, start + ARM_WAIT_FREE)) {
			printk("%s: timeout waiting for COMMAND to complete\n", __FUNCTION__);
			up(&av7110->dcomlock);
			return -1;
		}
	}

#ifndef _NOHANDSHAKE
	start = jiffies;
	while (rdebi(av7110, DEBINOSWAP, HANDSHAKE_REG, 0, 2 )) {
		dvb_delay(1);
		if (time_after(jiffies, start + ARM_WAIT_SHAKE)) {
			printk(KERN_ERR "%s: timeout waiting for HANDSHAKE_REG\n", __FUNCTION__);
			up(&av7110->dcomlock);
			return -1;
		}
	}
#endif

#ifdef COM_DEBUG
	stat = rdebi(av7110, DEBINOSWAP, MSGSTATE, 0, 2);
	if (stat & GPMQOver) {
		printk(KERN_ERR "%s: GPMQOver\n", __FUNCTION__);
		up(&av7110->dcomlock);
		return -1;
	}
	else if (stat & OSDQOver) {
		printk(KERN_ERR "%s: OSDQOver\n", __FUNCTION__);
		up(&av7110->dcomlock);
		return -1;
	}
#endif

	for (i = 0; i < reply_buf_len; i++)
		reply_buf[i] = rdebi(av7110, DEBINOSWAP, COM_BUFF + 2 * i, 0, 2);

	up(&av7110->dcomlock);
	return 0;
}

int av7110_fw_query(struct av7110 *av7110, u16 tag, u16* buf, s16 length)
{
	int ret;
	ret = av7110_fw_request(av7110, &tag, 0, buf, length);
	if (ret)
		printk("av7110_fw_query error\n");
	return ret;
}