📄 mc68901.h
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/*
* File: dev/mc68901.h
* Purpose: Definitions for the MC68901 MFP.
*
* Notes:
*
* Author: Eric DeVolder
* Date:
*
* Modifications:
*
*/
#ifndef _DEV_MC68901_H
#define _DEV_MC68901_H
/********************************************************************/
#ifndef MC68901_CUSTOM
/*
* This macro defines the interval between registers on the device as
* seen by the CPU.
*/
#ifndef MC68901_INTERVAL
#error "Must define value for MC68901_INTERVAL"
#endif
/*
* This macro defines the offset from zero of the first register on
* the device. It is then assumed that the next register is INTERVAL
* bytes away.
*/
#ifndef MC68901_OFFSET
#error "Must define value for MC68901_OFFSET"
#endif
#endif /* MC68901_CUSTOM */
/********************************************************************/
/*
* Physical device register offsets
*/
#define MC68901_GPDR 0
#define MC68901_AER 1
#define MC68901_DDR 2
#define MC68901_IERA 3
#define MC68901_IERB 4
#define MC68901_IPRA 5
#define MC68901_IPRB 6
#define MC68901_ISRA 7
#define MC68901_ISRB 8
#define MC68901_IMRA 9
#define MC68901_IMRB 10
#define MC68901_VR 11
#define MC68901_TACR 12
#define MC68901_TBCR 13
#define MC68901_TCDCR 14
#define MC68901_TADR 15
#define MC68901_TBDR 16
#define MC68901_TCDR 17
#define MC68901_TDDR 18
#define MC68901_SCR 19
#define MC68901_UCR 20
#define MC68901_RSR 21
#define MC68901_TSR 22
#define MC68901_UDR 23
/*
* Definitions of register contents
*/
#define MC68901_GPDR_GPIP7 (0x80)
#define MC68901_GPDR_GPIP6 (0x40)
#define MC68901_GPDR_GPIP5 (0x20)
#define MC68901_GPDR_GPIP4 (0x10)
#define MC68901_GPDR_GPIP3 (0x08)
#define MC68901_GPDR_GPIP2 (0x04)
#define MC68901_GPDR_GPIP1 (0x02)
#define MC68901_GPDR_GPIP0 (0x01)
#define MC68901_AER_GPIP7 (0x80)
#define MC68901_AER_GPIP6 (0x40)
#define MC68901_AER_GPIP5 (0x20)
#define MC68901_AER_GPIP4 (0x10)
#define MC68901_AER_GPIP3 (0x08)
#define MC68901_AER_GPIP2 (0x04)
#define MC68901_AER_GPIP1 (0x02)
#define MC68901_AER_GPIP0 (0x01)
#define MC68901_AER_GPIP7_RISE ( 0x80)
#define MC68901_AER_GPIP6_RISE ( 0x40)
#define MC68901_AER_GPIP5_RISE ( 0x20)
#define MC68901_AER_GPIP4_RISE ( 0x10)
#define MC68901_AER_GPIP3_RISE ( 0x08)
#define MC68901_AER_GPIP2_RISE ( 0x04)
#define MC68901_AER_GPIP1_RISE ( 0x02)
#define MC68901_AER_GPIP0_RISE ( 0x01)
#define MC68901_AER_GPIP7_FALL (~0x80)
#define MC68901_AER_GPIP6_FALL (~0x40)
#define MC68901_AER_GPIP5_FALL (~0x20)
#define MC68901_AER_GPIP4_FALL (~0x10)
#define MC68901_AER_GPIP3_FALL (~0x08)
#define MC68901_AER_GPIP2_FALL (~0x04)
#define MC68901_AER_GPIP1_FALL (~0x02)
#define MC68901_AER_GPIP0_FALL (~0x01)
#define MC68901_DDR_GPIP7_OUTPUT ( 0x80)
#define MC68901_DDR_GPIP6_OUTPUT ( 0x40)
#define MC68901_DDR_GPIP5_OUTPUT ( 0x20)
#define MC68901_DDR_GPIP4_OUTPUT ( 0x10)
#define MC68901_DDR_GPIP3_OUTPUT ( 0x08)
#define MC68901_DDR_GPIP2_OUTPUT ( 0x04)
#define MC68901_DDR_GPIP1_OUTPUT ( 0x02)
#define MC68901_DDR_GPIP0_OUTPUT ( 0x01)
#define MC68901_DDR_GPIP7_INPUT (~0x80)
#define MC68901_DDR_GPIP6_INPUT (~0x40)
#define MC68901_DDR_GPIP5_INPUT (~0x20)
#define MC68901_DDR_GPIP4_INPUT (~0x10)
#define MC68901_DDR_GPIP3_INPUT (~0x08)
#define MC68901_DDR_GPIP2_INPUT (~0x04)
#define MC68901_DDR_GPIP1_INPUT (~0x02)
#define MC68901_DDR_GPIP0_INPUT (~0x01)
#define MC68901_VR_VECTOR(a) ((a)&0xF0)
#define MC68901_VR_S (0x08)
#define MC68901_VR_IV_GPI7 (0x0F)
#define MC68901_VR_IV_GPI6 (0x0E)
#define MC68901_VR_IV_TIMERA (0x0D)
#define MC68901_VR_IV_RCVBUFFULL (0x0C)
#define MC68901_VR_IV_RCVERROR (0x0B)
#define MC68901_VR_IV_XMITBUFEMPTY (0x0A)
#define MC68901_VR_IV_XMITERROR (0x09)
#define MC68901_VR_IV_TIMERB (0x08)
#define MC68901_VR_IV_GPI5 (0x07)
#define MC68901_VR_IV_GPI4 (0x06)
#define MC68901_VR_IV_TIMERC (0x05)
#define MC68901_VR_IV_TIMERD (0x04)
#define MC68901_VR_IV_GPI3 (0x03)
#define MC68901_VR_IV_GPI2 (0x02)
#define MC68901_VR_IV_GPI1 (0x01)
#define MC68901_VR_IV_GPI0 (0x00)
#define MC68901_IERA_GPIP7 (0x80)
#define MC68901_IERA_GPIP6 (0x40)
#define MC68901_IERA_TIMERA (0x20)
#define MC68901_IERA_RCVBUFFULL (0x10)
#define MC68901_IERA_RCVERROR (0x08)
#define MC68901_IERA_XMITBUFEMPTY (0x04)
#define MC68901_IERA_XMITERROR (0x02)
#define MC68901_IERA_TIMERB (0x01)
#define MC68901_IERB_GPIP5 (0x80)
#define MC68901_IERB_GPIP4 (0x40)
#define MC68901_IERB_TIMERC (0x20)
#define MC68901_IERB_TIMERD (0x10)
#define MC68901_IERB_GPIP3 (0x08)
#define MC68901_IERB_GPIP2 (0x04)
#define MC68901_IERB_GPIP1 (0x02)
#define MC68901_IERB_GPIP0 (0x01)
#define MC68901_IPRA_GPIP7 (0x80)
#define MC68901_IPRA_GPIP6 (0x40)
#define MC68901_IPRA_TIMERA (0x20)
#define MC68901_IPRA_RCVBUFFULL (0x10)
#define MC68901_IPRA_RCVERROR (0x08)
#define MC68901_IPRA_XMITBUFEMPTY (0x04)
#define MC68901_IPRA_XMITERROR (0x02)
#define MC68901_IPRA_TIMERB (0x01)
#define MC68901_IPRB_GPIP5 (0x80)
#define MC68901_IPRB_GPIP4 (0x40)
#define MC68901_IPRB_TIMERC (0x20)
#define MC68901_IPRB_TIMERD (0x10)
#define MC68901_IPRB_GPIP3 (0x08)
#define MC68901_IPRB_GPIP2 (0x04)
#define MC68901_IPRB_GPIP1 (0x02)
#define MC68901_IPRB_GPIP0 (0x01)
#define MC68901_IMRA_GPIP7 (0x80)
#define MC68901_IMRA_GPIP6 (0x40)
#define MC68901_IMRA_TIMERA (0x20)
#define MC68901_IMRA_RCVBUFFULL (0x10)
#define MC68901_IMRA_RCVERROR (0x08)
#define MC68901_IMRA_XMITBUFEMPTY (0x04)
#define MC68901_IMRA_XMITERROR (0x02)
#define MC68901_IMRA_TIMERB (0x01)
#define MC68901_IMRB_GPIP5 (0x80)
#define MC68901_IMRB_GPIP4 (0x40)
#define MC68901_IMRB_TIMERC (0x20)
#define MC68901_IMRB_TIMERD (0x10)
#define MC68901_IMRB_GPIP3 (0x08)
#define MC68901_IMRB_GPIP2 (0x04)
#define MC68901_IMRB_GPIP1 (0x02)
#define MC68901_IMRB_GPIP0 (0x01)
#define MC68901_ISRA_GPIP7 (0x80)
#define MC68901_ISRA_GPIP6 (0x40)
#define MC68901_ISRA_TIMERA (0x20)
#define MC68901_ISRA_RCVBUFFULL (0x10)
#define MC68901_ISRA_RCVERROR (0x08)
#define MC68901_ISRA_XMITBUFEMPTY (0x04)
#define MC68901_ISRA_XMITERROR (0x02)
#define MC68901_ISRA_TIMERB (0x01)
#define MC68901_ISRB_GPIP5 (0x80)
#define MC68901_ISRB_GPIP4 (0x40)
#define MC68901_ISRB_TIMERC (0x20)
#define MC68901_ISRB_TIMERD (0x10)
#define MC68901_ISRB_GPIP3 (0x08)
#define MC68901_ISRB_GPIP2 (0x04)
#define MC68901_ISRB_GPIP1 (0x02)
#define MC68901_ISRB_GPIP0 (0x01)
#define MC68901_TCR_RESET (0x10)
#define MC68901_TCR_MODE_STOP (0x00)
#define MC68901_TCR_MODE_DM_DIV4 (0x01)
#define MC68901_TCR_MODE_DM_DIV10 (0x02)
#define MC68901_TCR_MODE_DM_DIV16 (0x03)
#define MC68901_TCR_MODE_DM_DIV50 (0x04)
#define MC68901_TCR_MODE_DM_DIV64 (0x05)
#define MC68901_TCR_MODE_DM_DIV100 (0x06)
#define MC68901_TCR_MODE_DM_DIV200 (0x07)
#define MC68901_TCR_MODE_EVENT_COUNT (0x08)
#define MC68901_TCR_MODE_PWM_DIV4 (0x09)
#define MC68901_TCR_MODE_PWM_DIV10 (0x0A)
#define MC68901_TCR_MODE_PWM_DIV16 (0x0B)
#define MC68901_TCR_MODE_PWM_DIV50 (0x0C)
#define MC68901_TCR_MODE_PWM_DIV64 (0x0D)
#define MC68901_TCR_MODE_PWM_DIV100 (0x0E)
#define MC68901_TCR_MODE_PWM_DIV200 (0x0F)
#define MC68901_TCDCR_TC_MODE_STOP (0x00)
#define MC68901_TCDCR_TC_MODE_DM_DIV4 (0x10)
#define MC68901_TCDCR_TC_MODE_DM_DIV10 (0x20)
#define MC68901_TCDCR_TC_MODE_DM_DIV16 (0x30)
#define MC68901_TCDCR_TC_MODE_DM_DIV50 (0x40)
#define MC68901_TCDCR_TC_MODE_DM_DIV64 (0x50)
#define MC68901_TCDCR_TC_MODE_DM_DIV100 (0x60)
#define MC68901_TCDCR_TC_MODE_DM_DIV200 (0x70)
#define MC68901_TCDCR_TD_MODE_STOP (0x00)
#define MC68901_TCDCR_TD_MODE_DM_DIV4 (0x01)
#define MC68901_TCDCR_TD_MODE_DM_DIV10 (0x02)
#define MC68901_TCDCR_TD_MODE_DM_DIV16 (0x03)
#define MC68901_TCDCR_TD_MODE_DM_DIV50 (0x04)
#define MC68901_TCDCR_TD_MODE_DM_DIV64 (0x05)
#define MC68901_TCDCR_TD_MODE_DM_DIV100 (0x06)
#define MC68901_TCDCR_TD_MODE_DM_DIV200 (0x07)
#define MC68901_UCR_CLK (0x80)
#define MC68901_UCR_CL_8BIT (0x00)
#define MC68901_UCR_CL_7BIT (0x20)
#define MC68901_UCR_CL_6BIT (0x40)
#define MC68901_UCR_CL_5BIT (0x60)
#define MC68901_UCR_ST_SYNC (0x00)
#define MC68901_UCR_ST_ASYNC_1_1 (0x08)
#define MC68901_UCR_ST_ASYNC_1_15 (0x10)
#define MC68901_UCR_ST_ASYNC_1_2 (0x18)
#define MC68901_UCR_PE (0x04)
#define MC68901_UCR_PARITY_NONE (0x00)
#define MC68901_UCR_PARITY_EVEN (0x02)
#define MC68901_UCR_PARITY_ODD (0x00)
#define MC68901_RSR_BF (0x80)
#define MC68901_RSR_OE (0x40)
#define MC68901_RSR_PE (0x20)
#define MC68901_RSR_FE (0x10)
#define MC68901_RSR_FSB (0x08)
#define MC68901_RSR_MCIP (0x04)
#define MC68901_RSR_SS (0x02)
#define MC68901_RSR_RE (0x01)
#define MC68901_TSR_BE (0x80)
#define MC68901_TSR_UE (0x40)
#define MC68901_TSR_AT (0x20)
#define MC68901_TSR_END (0x10)
#define MC68901_TSR_B (0x08)
#define MC68901_TSR_HL_HIGHZ (0x00)
#define MC68901_TSR_HL_LOW (0x02)
#define MC68901_TSR_HL_HIGH (0x04)
#define MC68901_TSR_HL_LOOP (0x06)
#define MC68901_TSR_L (0x02)
#define MC68901_TSR_TE (0x01)
/********************************************************************/
/*
* If the device is connected to the system in a "non-standard" way,
* then obtain the board-specifics.
*/
#ifdef MC68901_CUSTOM
#include MC68901_CUSTOM /* Local MC68901 definitions */
#else
/*
* Macros for accessing the peripheral registers
*/
#define Mc68901_addr(BASE,REG) \
((void *)&((uint8 *)BASE)[(REG * MC68901_INTERVAL) + MC68901_OFFSET])
#define Mc68901_iord(BASE,REG) \
cpu_iord_8(Mc68901_addr(BASE,REG))
#define Mc68901_iowr(BASE,REG,DATA) \
cpu_iowr_8(Mc68901_addr(BASE,REG),DATA)
#define MC68901_RD_GPDR(BASE) Mc68901_iord(BASE,MC68901_GPDR)
#define MC68901_RD_AER(BASE) Mc68901_iord(BASE,MC68901_AER)
#define MC68901_RD_DDR(BASE) Mc68901_iord(BASE,MC68901_DDR)
#define MC68901_RD_IERA(BASE) Mc68901_iord(BASE,MC68901_IERA)
#define MC68901_RD_IERB(BASE) Mc68901_iord(BASE,MC68901_IERB)
#define MC68901_RD_IPRA(BASE) Mc68901_iord(BASE,MC68901_IPRA)
#define MC68901_RD_IPRB(BASE) Mc68901_iord(BASE,MC68901_IPRB)
#define MC68901_RD_ISRA(BASE) Mc68901_iord(BASE,MC68901_ISRA)
#define MC68901_RD_ISRB(BASE) Mc68901_iord(BASE,MC68901_ISRB)
#define MC68901_RD_IMRA(BASE) Mc68901_iord(BASE,MC68901_IMRA)
#define MC68901_RD_IMRB(BASE) Mc68901_iord(BASE,MC68901_IMRB)
#define MC68901_RD_VR(BASE) Mc68901_iord(BASE,MC68901_VR)
#define MC68901_RD_TACR(BASE) Mc68901_iord(BASE,MC68901_TACR)
#define MC68901_RD_TBCR(BASE) Mc68901_iord(BASE,MC68901_TBCR)
#define MC68901_RD_TCDCR(BASE) Mc68901_iord(BASE,MC68901_TCDCR)
#define MC68901_RD_TADR(BASE) Mc68901_iord(BASE,MC68901_TADR)
#define MC68901_RD_TBDR(BASE) Mc68901_iord(BASE,MC68901_TBDR)
#define MC68901_RD_TCDR(BASE) Mc68901_iord(BASE,MC68901_TCDR)
#define MC68901_RD_TDDR(BASE) Mc68901_iord(BASE,MC68901_TDDR)
#define MC68901_RD_SCR(BASE) Mc68901_iord(BASE,MC68901_SCR)
#define MC68901_RD_UCR(BASE) Mc68901_iord(BASE,MC68901_UCR)
#define MC68901_RD_RSR(BASE) Mc68901_iord(BASE,MC68901_RSR)
#define MC68901_RD_TSR(BASE) Mc68901_iord(BASE,MC68901_TSR)
#define MC68901_RD_UDR(BASE) Mc68901_iord(BASE,MC68901_UDR)
#define MC68901_WR_GPDR(BASE,DATA) Mc68901_iowr(BASE,MC68901_GPDR,DATA)
#define MC68901_WR_AER(BASE,DATA) Mc68901_iowr(BASE,MC68901_AER,DATA)
#define MC68901_WR_DDR(BASE,DATA) Mc68901_iowr(BASE,MC68901_DDR,DATA)
#define MC68901_WR_IERA(BASE,DATA) Mc68901_iowr(BASE,MC68901_IERA,DATA)
#define MC68901_WR_IERB(BASE,DATA) Mc68901_iowr(BASE,MC68901_IERB,DATA)
#define MC68901_WR_IPRA(BASE,DATA) Mc68901_iowr(BASE,MC68901_IPRA,DATA)
#define MC68901_WR_IPRB(BASE,DATA) Mc68901_iowr(BASE,MC68901_IPRB,DATA)
#define MC68901_WR_ISRA(BASE,DATA) Mc68901_iowr(BASE,MC68901_ISRA,DATA)
#define MC68901_WR_ISRB(BASE,DATA) Mc68901_iowr(BASE,MC68901_ISRB,DATA)
#define MC68901_WR_IMRA(BASE,DATA) Mc68901_iowr(BASE,MC68901_IMRA,DATA)
#define MC68901_WR_IMRB(BASE,DATA) Mc68901_iowr(BASE,MC68901_IMRB,DATA)
#define MC68901_WR_VR(BASE,DATA) Mc68901_iowr(BASE,MC68901_VR,DATA)
#define MC68901_WR_TACR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TACR,DATA)
#define MC68901_WR_TBCR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TBCR,DATA)
#define MC68901_WR_TCDCR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TCDCR,DATA)
#define MC68901_WR_TADR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TADR,DATA)
#define MC68901_WR_TBDR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TBDR,DATA)
#define MC68901_WR_TCDR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TCDR,DATA)
#define MC68901_WR_TDDR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TDDR,DATA)
#define MC68901_WR_SCR(BASE,DATA) Mc68901_iowr(BASE,MC68901_SCR,DATA)
#define MC68901_WR_UCR(BASE,DATA) Mc68901_iowr(BASE,MC68901_UCR,DATA)
#define MC68901_WR_RSR(BASE,DATA) Mc68901_iowr(BASE,MC68901_RSR,DATA)
#define MC68901_WR_TSR(BASE,DATA) Mc68901_iowr(BASE,MC68901_TSR,DATA)
#define MC68901_WR_UDR(BASE,DATA) Mc68901_iowr(BASE,MC68901_UDR,DATA)
#endif /* MC68901_CUSTOM */
/*
* Fake out a typedef with void, ie MC68901 * == void *
*/
#define MC68901 void
/********************************************************************/
#endif /* _DEV_MC68901_H */
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