amd29f040.h

motorola自己开发的针对coldfire 5272的Dbug bootloader程序

/*
 * File:		amd29f040.h
 * Purpose:		Header file containing data definitions for the
 *				AMD 29F040 Flash memory device.  128Kx8
 *
 * Notes:
 *
 * Modifications:
 *
 */

#ifndef _AMD29F040_H
#define _AMD29F040_H

/*
 * The AMD29F040 FLASH devices.  These devices are 512K x 8 devices.
 */
#define AMD29F040_SECTOR_SIZE		(64 * 1024)
#define AMD29F040_SECTORS			(8)

#define AMD29F040_ADDR1				(0x555)
#define AMD29F040_ADDR2				(0x2AA)

#if (defined(AMD29F040_32BIT_WIDE))

typedef volatile uint32 AMD29F040_CELL;

#define AMD29F040_READ_CMD1			(0xAAAAAAAA)
#define AMD29F040_READ_CMD2			(0x55555555)
#define AMD29F040_READ_CMD3			(0xF0F0F0F0)

#define AMD29F040_AUTOSELECT_CMD1	(0xAAAAAAAA)
#define AMD29F040_AUTOSELECT_CMD2	(0x55555555)
#define AMD29F040_AUTOSELECT_CMD3	(0x90909090)

#define AMD29F040_BYTEPROG_CMD1		(0xAAAAAAAA)
#define AMD29F040_BYTEPROG_CMD2		(0x55555555)
#define AMD29F040_BYTEPROG_CMD3		(0xA0A0A0A0)

#define AMD29F040_CHIPERASE_CMD1	(0xAAAAAAAA)
#define AMD29F040_CHIPERASE_CMD2	(0x55555555)
#define AMD29F040_CHIPERASE_CMD3	(0x80808080)
#define AMD29F040_CHIPERASE_CMD4	(0xAAAAAAAA)
#define AMD29F040_CHIPERASE_CMD5	(0x55555555)
#define AMD29F040_CHIPERASE_CMD6	(0x10101010)

#define AMD29F040_SECTORERASE_CMD1	(0xAAAAAAAA)
#define AMD29F040_SECTORERASE_CMD2	(0x55555555)
#define AMD29F040_SECTORERASE_CMD3	(0x80808080)
#define AMD29F040_SECTORERASE_CMD4	(0xAAAAAAAA)
#define AMD29F040_SECTORERASE_CMD5	(0x55555555)
#define AMD29F040_SECTORERASE_CMD6	(0x30303030)

#define AMD29F040_AMD_CODE			(0x01010101)
#define AMD29F040_DEVICE_CODE		(0xA4A4A4A4)
#define AMD29F040_SECTORERASE_DONE	(0x80808080)
#define AMD29F040_DATA_POLL_MASK	(0x80808080)
#define AMD29F040_TIME_EXCEEDED		(0x20202020)
#endif

#if (defined(AMD29F040_16BIT_WIDE))
typedef volatile uint16 AMD29F040_CELL;

#define AMD29F040_READ_CMD1			(0xAAAA)
#define AMD29F040_READ_CMD2			(0x5555)
#define AMD29F040_READ_CMD3			(0xF0F0)

#define AMD29F040_AUTOSELECT_CMD1	(0xAAAA)
#define AMD29F040_AUTOSELECT_CMD2	(0x5555)
#define AMD29F040_AUTOSELECT_CMD3	(0x9090)

#define AMD29F040_BYTEPROG_CMD1		(0xAAAA)
#define AMD29F040_BYTEPROG_CMD2		(0x5555)
#define AMD29F040_BYTEPROG_CMD3		(0xA0A0)

#define AMD29F040_CHIPERASE_CMD1	(0xAAAA)
#define AMD29F040_CHIPERASE_CMD2	(0x5555)
#define AMD29F040_CHIPERASE_CMD3	(0x8080)
#define AMD29F040_CHIPERASE_CMD4	(0xAAAA)
#define AMD29F040_CHIPERASE_CMD5	(0x5555)
#define AMD29F040_CHIPERASE_CMD6	(0x1010)

#define AMD29F040_SECTORERASE_CMD1	(0xAAAA)
#define AMD29F040_SECTORERASE_CMD2	(0x5555)
#define AMD29F040_SECTORERASE_CMD3	(0x8080)
#define AMD29F040_SECTORERASE_CMD4	(0xAAAA)
#define AMD29F040_SECTORERASE_CMD5	(0x5555)
#define AMD29F040_SECTORERASE_CMD6	(0x3030)

#define AMD29F040_AMD_CODE			(0x0101)
#define AMD29F040_DEVICE_CODE		(0xA4A4)
#define AMD29F040_SECTORERASE_DONE	(0x8080)
#define AMD29F040_DATA_POLL_MASK	(0x8080)
#define AMD29F040_TIME_EXCEEDED		(0x2020)
#endif

#if (defined(AMD29F040_8BIT_WIDE))
typedef volatile uint8 AMD29F040_CELL;

#define AMD29F040_READ_CMD1			(0xAA)
#define AMD29F040_READ_CMD2			(0x55)
#define AMD29F040_READ_CMD3			(0xF0)

#define AMD29F040_AUTOSELECT_CMD1	(0xAA)
#define AMD29F040_AUTOSELECT_CMD2	(0x55)
#define AMD29F040_AUTOSELECT_CMD3	(0x90)

#define AMD29F040_BYTEPROG_CMD1		(0xAA)
#define AMD29F040_BYTEPROG_CMD2		(0x55)
#define AMD29F040_BYTEPROG_CMD3		(0xA0)

#define AMD29F040_CHIPERASE_CMD1	(0xAA)
#define AMD29F040_CHIPERASE_CMD2	(0x55)
#define AMD29F040_CHIPERASE_CMD3	(0x80)
#define AMD29F040_CHIPERASE_CMD4	(0xAA)
#define AMD29F040_CHIPERASE_CMD5	(0x55)
#define AMD29F040_CHIPERASE_CMD6	(0x10)

#define AMD29F040_SECTORERASE_CMD1	(0xAA)
#define AMD29F040_SECTORERASE_CMD2	(0x55)
#define AMD29F040_SECTORERASE_CMD3	(0x80)
#define AMD29F040_SECTORERASE_CMD4	(0xAA)
#define AMD29F040_SECTORERASE_CMD5	(0x55)
#define AMD29F040_SECTORERASE_CMD6	(0x30)

#define AMD29F040_AMD_CODE			(0x01)
#define AMD29F040_DEVICE_CODE		(0xA4)
#define AMD29F040_SECTORERASE_DONE	(0x80)
#define AMD29F040_DATA_POLL_MASK	(0x80)
#define AMD29F040_TIME_EXCEEDED		(0x20)
#endif

typedef enum
{
	AMD29F040_SECTOR_0 = 0,
	AMD29F040_SECTOR_1 = 1,
	AMD29F040_SECTOR_2 = 2,
	AMD29F040_SECTOR_3 = 3,
	AMD29F040_SECTOR_4 = 4,
	AMD29F040_SECTOR_5 = 5,
	AMD29F040_SECTOR_6 = 6,
	AMD29F040_SECTOR_7 = 7
} AMD29F040_SECTOR;

/*****************************************************************/
typedef volatile struct
{
	AMD29F040_CELL	manuf;
	AMD29F040_CELL	id;
	AMD29F040_CELL	dataA[AMD29F040_ADDR2 - 2];
	AMD29F040_CELL	cmdreg2;
	AMD29F040_CELL	dataB[AMD29F040_ADDR1 - AMD29F040_ADDR2 - 1];
	AMD29F040_CELL	cmdreg1;
	AMD29F040_CELL	dataC[(AMD29F040_SECTOR_SIZE*AMD29F040_SECTORS) - AMD29F040_ADDR1 - 1];
} AMD29F040_DEVICE;

typedef volatile struct
{
	AMD29F040_CELL data[AMD29F040_SECTOR_SIZE];
} AMD29F040_SECTORDATA;

typedef volatile union
{
	AMD29F040_DEVICE		device;
	AMD29F040_SECTORDATA	sector[AMD29F040_SECTORS];

} AMD29F040;

/*****************************************************************/

#endif /* _AMD29F040_H */