📄 timer.lst
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465 4 }
466 3 on_time.hour--;
467 3 on_time_menu(on_time.hour, on_time.minute);
468 3 shi_sub_write(EEPROM, 0x20, 0, &on_time.hour);DelayXms(0x30);
469 3 write_timer(0x02, &on_time);
470 3 break;
471 3 case 4:
472 3 read_timer(0x02,&on_time);
473 3 if(on_time.minute==0){
474 4 on_time.minute=60;
475 4 }
476 3 on_time.minute--;
477 3 on_time_menu(on_time.hour, on_time.minute);
478 3 shi_sub_write(EEPROM, 0x21, 0, &on_time.minute);DelayXms(0x30);
479 3 write_timer(0x02,&on_time);
480 3 break;
481 3 case 5:
482 3 timer_able_flag=~timer_able_flag;
483 3 able_time_menu(timer_able_flag);
484 3 shi_sub_write(EEPROM, 0x24, 0, &timer_able_flag);DelayXms(0x30);
485 3 break;
486 3 case 6:
487 3 read_timer(0x03,&off_time);
488 3 if(off_time.hour==0){
C51 COMPILER V7.50 TIMER 01/17/2006 21:30:47 PAGE 9
489 4 off_time.hour=24;
490 4 }
491 3 off_time.hour--;
492 3 off_time_menu(off_time.hour, off_time.minute);
493 3 shi_sub_write(EEPROM, 0x22, 0, &off_time.hour);DelayXms(0x30);
494 3 write_timer(0x03, &off_time);
495 3 break;
496 3 case 7:
497 3 read_timer(0x03,&off_time);
498 3 if(off_time.minute==0){
499 4 off_time.minute=60;
500 4 }
501 3 off_time.minute--;
502 3 off_time_menu(off_time.hour, off_time.minute);
503 3 shi_sub_write(EEPROM, 0x23, 0, &off_time.minute);DelayXms(0x30);
504 3 write_timer(0x03, &off_time);
505 3 break;
506 3 case 8:
507 3 timer_able_flag=~timer_able_flag;
508 3 able_time_menu(timer_able_flag);
509 3 shi_sub_write(EEPROM, 0x24, 0, &timer_able_flag);DelayXms(0x30);
510 3 write_timer(0x03, &off_time);
511 3 break;
512 3 case 9:
513 3
514 3 break;
515 3 default:
516 3 break;
517 3 }
518 2 }
519 1
520 1 if(timemenu_flag&&irright_flag){
521 2 irright_flag=0;
522 2 switch (time_sel){
523 3 case 1:
524 3 read_timer(0x01,&curr_time);
525 3 curr_time.hour++;
526 3 if(curr_time.hour==24){
527 4 curr_time.hour=0;
528 4 }
529 3 current_time_menu(curr_time.hour, curr_time.minute,curr_time.second);
530 3 //write to timer chip
531 3
532 3 //temp[0]=curr_time.hour;
533 3 //read_timer(&curr_time);
534 3 //curr_time.hour=temp[0];
535 3 write_timer(1,&curr_time);
536 3
537 3 break;
538 3 case 2:
539 3 read_timer(0x01,&curr_time);
540 3 curr_time.minute++;
541 3 if(curr_time.minute==60){
542 4 curr_time.minute=0;
543 4 }
544 3 current_time_menu(curr_time.hour, curr_time.minute,curr_time.second);
545 3 //write to timer chip
546 3 //temp[1]=curr_time.minute;
547 3 //read_timer(&curr_time);
548 3 //curr_time.minute=temp[0];
549 3 write_timer(0x01,&curr_time);
550 3
C51 COMPILER V7.50 TIMER 01/17/2006 21:30:47 PAGE 10
551 3 break;
552 3 case 3:
553 3 read_timer(0x02,&on_time);
554 3 on_time.hour++;
555 3 if(on_time.hour==24){
556 4 on_time.hour=0;
557 4 }
558 3 on_time_menu(on_time.hour, on_time.minute);
559 3 shi_sub_write(EEPROM, 0x20, 0, &on_time.hour);DelayXms(0x30);
560 3 write_timer(0x02, &on_time);
561 3 break;
562 3 case 4:
563 3 read_timer(0x02,&on_time);
564 3 on_time.minute++;
565 3 if(on_time.minute==60){
566 4 on_time.minute=0;
567 4 }
568 3 on_time_menu(on_time.hour, on_time.minute);
569 3 shi_sub_write(EEPROM, 0x21, 0, &on_time.minute);DelayXms(0x30);
570 3 write_timer(0x02, &on_time);
571 3 break;
572 3 case 5:
573 3 timer_able_flag=~timer_able_flag;
574 3 able_time_menu(timer_able_flag);
575 3 shi_sub_write(EEPROM, 0x24, 0, &timer_able_flag);DelayXms(0x30);
576 3 break;
577 3 case 6:
578 3 read_timer(0x03,&off_time);
579 3 off_time.hour++;
580 3 if(off_time.hour==24){
581 4 off_time.hour=0;
582 4 }
583 3 off_time_menu(off_time.hour, off_time.minute);
584 3 shi_sub_write(EEPROM, 0x22, 0, &off_time.hour);DelayXms(0x30);
585 3 write_timer(0x03, &off_time);
586 3 break;
587 3 case 7:
588 3 read_timer(0x03,&off_time);
589 3 off_time.minute++;
590 3 if(off_time.minute==60){
591 4 off_time.minute=0;
592 4 }
593 3 off_time_menu(off_time.hour, off_time.minute);
594 3 shi_sub_write(EEPROM, 0x23, 0, &off_time.minute);DelayXms(0x30);
595 3 write_timer(0x03, &off_time);
596 3 break;
597 3 case 8:
598 3 timer_able_flag=~timer_able_flag;
599 3 able_time_menu(timer_able_flag);
600 3 shi_sub_write(EEPROM, 0x24, 0, &timer_able_flag);DelayXms(0x30);
601 3 break;
602 3 case 9:
603 3 break;
604 3 default:
605 3 break;
606 3 }
607 2 }
608 1 //====== when timer open ,we must do so.
609 1
610 1
611 1
612 1 }
C51 COMPILER V7.50 TIMER 01/17/2006 21:30:47 PAGE 11
613 #endif
614 void timer_on_off(void)//zl.d 1.5
615
616 {
617 1 shi_sub_read(EEPROM, 0x24, 0, &timer_able_flag);
618 1 //printf("EEPROM, 0x24, 0, &timer_able_flag%bx\n",timer_able_flag);
619 1
620 1 if (timer_able_flag)
621 1 {
622 2 if(!ptime_int1&ptime_int2)//pown on
623 2 {
624 3
625 3 DelayXms(250);
626 3 //////////////////////////////////////////////////////////////////
627 3 if(!ptime_int1&ptime_int2)//0n
628 3 {
629 4 unsigned char temp;
630 4 if(!power_flag)
631 4 {
632 5 printf("ptime_int1=0ptime_int2=1\n");
633 5
634 5 osd_timer=0;TR0=1;
635 5 printf("the key is power.\n");
636 5 irpower_flag = 1; // IR Power Button Active
637 5 XIE_Power=0;
638 5 osd_timer=0;TR0=1;
639 5 shi_sub_read1(0x62, 00, &temp);
640 5 temp=temp&0xfb;
641 5 //temp=temp+0x60;//set int2 is high
642 5 shi_sub_write1(0x62, 00, &temp);
643 5 }
644 4 else
645 4 {
646 5 shi_sub_read1(0x62, 00, &temp);
647 5 temp=temp&0xfb;
648 5 //temp=temp+0x60;//set int2 is high
649 5 shi_sub_write1(0x62, 00, &temp);
650 5
651 5 }
652 4
653 4
654 4 }
655 3
656 3
657 3
658 3 }
659 2 //////////////////////////////////////////////////////////////////
660 2 if(!ptime_int2&ptime_int1)//0ff
661 2 {
662 3 DelayXms(250);
663 3 if(!ptime_int2&ptime_int1)
664 3 {
665 4 unsigned char temp;
666 4 if(power_flag)
667 4 {
668 5 printf("ptime_int1=1ptime_int2=0\n");
669 5
670 5 osd_timer=0;TR0=1;
671 5 printf("the key is power.\n");
672 5 irpower_flag = 1; // IR Power Button Active
673 5 XIE_Power=0;
674 5 osd_timer=0;TR0=1;
C51 COMPILER V7.50 TIMER 01/17/2006 21:30:47 PAGE 12
675 5 shi_sub_read1(0x62, 00, &temp);
676 5 temp=temp&0xbf;
677 5 //temp=temp+0x60;//set int2 is high
678 5 shi_sub_write1(0x62, 00, &temp);
679 5
680 5
681 5 }
682 4 else
683 4 {
684 5 shi_sub_read1(0x62, 00, &temp);
685 5 temp=temp&0xbf;
686 5 //temp=temp+0x60;//set int2 is high
687 5 shi_sub_write1(0x62, 00, &temp);
688 5
689 5
690 5 }
691 4
692 4
693 4 }
694 3
695 3 }
696 2 /////////////////////////////////////////////////////////////////
697 2 }
698 1
699 1 }
700 /////////////////////////////////////////////////////////////////
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