iom30245.h

UC/OS下的USB驱动程序和说明文档（包括上位机驱动程序和固件程序）

#define TA4        (*(volatile unsigned int near  *)0x38E)   /* Timer A4 */
#define TA0MR      (*(volatile unsigned char near *)0x396)   /* Timer A0 mode register */
#define TA1MR      (*(volatile unsigned char near *)0x397)   /* Timer A1 mode register */
#define TA2MR      (*(volatile unsigned char near *)0x398)   /* Timer A2 mode register */
#define TA3MR      (*(volatile unsigned char near *)0x399)   /* Timer A3 mode register */
#define TA4MR      (*(volatile unsigned char near *)0x39A)   /* Timer A4 mode register */

#define U0SMR4     (*(volatile unsigned char near *)0x3A4)   /* UART0 special mode register 4 */
#define U0SMR3     (*(volatile unsigned char near *)0x3A5)   /* UART0 special mode register 3 */
#define U0SMR2     (*(volatile unsigned char near *)0x3A6)   /* UART0 special mode register 2 */
#define U0SMR      (*(volatile unsigned char near *)0x3A7)   /* UART0 special mode register */
#define U0MR       (*(volatile unsigned char near *)0x3A8)   /* UART0 mode register */
#define U0BRG      (*(volatile unsigned char near *)0x3A9)   /* UART0 baud rate generator */


#if 0
  sfr  U0TBL         =       0x3AA;   /* UART0 transmit buffer (low byte) */
#else
  #define U0TBL      (*(volatile unsigned char near *)0x3AA)   /* UART0 transmit buffer (low byte) */
#endif

#define U0TBH      (*(volatile unsigned char near *)0x3AB)   /* UART0 transmit buffer (high byte) */
#define U0TB       (*(volatile unsigned int near  *)0x3AA)   /* UART0 transmit buffer */


#define U0C0       (*(volatile unsigned char near *)0x3AC)   /* UART0 control register 0 */
#define U0C1       (*(volatile unsigned char near *)0x3AD)   /* UART0 control register 1 */
#define U0C        (*(volatile unsigned int near  *)0x3AA)   /* UART0 control register */
#define U0RBL      (*(volatile unsigned char near *)0x3AE)   /* UART0 receive buffer (low byte) */
#define U0RBH      (*(volatile unsigned char near *)0x3AF)   /* UART0 receive buffer (high byte) */
#define U0RB       (*(volatile unsigned int near  *)0x3AE)   /* UART0 receive buffer */

#define DM0SL      (*(volatile unsigned char near *)0x3B8)   /* DMA0 cause selection */
#define DM1SL      (*(volatile unsigned char near *)0x3BA)   /* DMA1 cause selection */
#define DM2SL      (*(volatile unsigned char near *)0x3B0)   /* DMA2 cause selection */
#define DM3SL      (*(volatile unsigned char near *)0x3B2)   /* DMA3 cause selection */

#define CRCSAR     (*(volatile unsigned int near  *)0x3B4)   /* CRC snoop address register */
#define CRCMR      (*(volatile unsigned char near *)0x3B6)   /* CRC mode register (low byte) */
#define CRCDL      (*(volatile unsigned char near *)0x3BC)   /* CRC data register (low byte) */
#define CRCDH      (*(volatile unsigned char near *)0x3BD)   /* CRC data register (high byte) */
#define CRCD       (*(volatile unsigned int near  *)0x3BC)   /* CRC data register */
#define CRCIN      (*(volatile unsigned char near *)0x3BE)   /* CRC input register */

#define AD0L       (*(volatile unsigned char near *)0x3C0)   /* A/D register 0 (low byte) */
#define AD0H       (*(volatile unsigned char near *)0x3C1)   /* A/D register 0 (high byte) */
#define AD0        (*(volatile unsigned int near  *)0x3C0)   /* A/D register 0 */
#define AD1L       (*(volatile unsigned char near *)0x3C2)   /* A/D register 1 (low byte) */
#define AD1H       (*(volatile unsigned char near *)0x3C3)   /* A/D register 1 (high byte) */
#define AD1        (*(volatile unsigned int near  *)0x3C2)   /* A/D register 1 */
#define AD2L       (*(volatile unsigned char near *)0x3C4)   /* A/D register 2 (low byte) */
#define AD2H       (*(volatile unsigned char near *)0x3C5)   /* A/D register 2 (high byte) */
#define AD2        (*(volatile unsigned int near  *)0x3C4)   /* A/D register 2 */
#define AD3L       (*(volatile unsigned char near *)0x3C6)   /* A/D register 3 (low byte) */
#define AD3H       (*(volatile unsigned char near *)0x3C7)   /* A/D register 3 (high byte) */
#define AD3        (*(volatile unsigned int near  *)0x3C6)   /* A/D register 3 */
#define AD4L       (*(volatile unsigned char near *)0x3C8)   /* A/D register 4 (low byte) */
#define AD4H       (*(volatile unsigned char near *)0x3C9)   /* A/D register 4 (high byte) */
#define AD4        (*(volatile unsigned int near  *)0x3C8)   /* A/D register 4 */
#define AD5L       (*(volatile unsigned char near *)0x3CA)   /* A/D register 5 (low byte) */
#define AD5H       (*(volatile unsigned char near *)0x3CB)   /* A/D register 5 (high byte) */
#define AD5        (*(volatile unsigned int near  *)0x3CA)   /* A/D register 5 */
#define AD6L       (*(volatile unsigned char near *)0x3CC)   /* A/D register 6 (low byte) */
#define AD6H       (*(volatile unsigned char near *)0x3CD)   /* A/D register 6 (high byte) */
#define AD6        (*(volatile unsigned int near  *)0x3CC)   /* A/D register 6 */
#define AD7L       (*(volatile unsigned char near *)0x3CE)   /* A/D register 7 (low byte) */
#define AD7H       (*(volatile unsigned char near *)0x3CF)   /* A/D register 7 (high byte) */
#define AD7        (*(volatile unsigned int near  *)0x3CE)   /* A/D register 7 */
#define ADCON0     (*(volatile unsigned char near *)0x3D6)   /* A/D control register 0 */
#define ADCON1     (*(volatile unsigned char near *)0x3D7)   /* A/D control register 1 */
#define ADCON2     (*(volatile unsigned char near *)0x3D4)   /* A/D control register 2 */

#define FSCCR      (*(volatile unsigned char near *)0x3db)   /* Frequency clock control register */
#define FSC        (*(volatile unsigned char near *)0x3dc)   /* Frequency synthesizer control register */
#define FSM        (*(volatile unsigned char near *)0x3dd)   /* Frequency synthesizer multiplier */
#define FSP        (*(volatile unsigned char near *)0x3de)   /* Frequency synthesizer prescaler */
#define FSD        (*(volatile unsigned char near *)0x3df)   /* Frequency synthesizer divider */
#ifndef __ICCM16C__
sfr  P0         =       0x3E0;   /* Port P0 register */
sfr  P1         =       0x3E1;   /* Port P1 register */
sfr  P0D        =       0x3E2;   /* Port P0 direction register */
sfr  P1D        =       0x3E3;   /* Port P1 direction register */
sfr  P2         =       0x3E4;   /* Port P2 register */
sfr  P3         =       0x3E5;   /* Port P3 register */
sfr  P2D        =       0x3E6;   /* Port P2 direction register */
sfr  P3D        =       0x3E7;   /* Port P3 direction register */
sfr  P4         =       0x3E8;   /* Port P4 register */
sfr  P5         =       0x3E9;   /* Port P5 register */
sfr  P4D        =       0x3EA;   /* Port P4 direction register */
sfr  P5D        =       0x3EB;   /* Port P5 direction register */
sfr  P6         =       0x3EC;   /* Port P6 register */
sfr  P7         =       0x3ED;   /* Port P7 register */
sfr  P6D        =       0x3EE;   /* Port P6 direction register */
sfr  P7D        =       0x3EF;   /* Port P7 direction register */
sfr  P8         =       0x3F0;   /* Port P8 register */
sfr  P9         =       0x3F1;   /* Port P9 register */
sfr  P8D        =       0x3F2;   /* Port P8 direction register */
sfr  P9D        =       0x3F3;   /* Port P9 direction register */
sfr  P10        =       0x3F4;   /* Port P10 register */
sfr  P10D       =       0x3F6;   /* Port P10 direction register */
#else 
SFR(P0  , 0x3E0);  			   /* Port P0 register */
SFR(P1  , 0x3E1);			   /* Port P1 register */
SFR(P0D , 0x3E2);			   /* Port P0 direction register */
SFR(P1D , 0x3E3);			   /* Port P1 direction register */
SFR(P2  , 0x3E4);			   /* Port P2 register */
SFR(P3  , 0x3E5);			   /* Port P3 register */
SFR(P2D , 0x3E6);			   /* Port P2 direction register */
SFR(P3D , 0x3E7);			   /* Port P3 direction register */
SFR(P4  , 0x3E8);			   /* Port P4 register */
SFR(P5  , 0x3E9);			   /* Port P5 register */
SFR(P4D , 0x3EA);			   /* Port P4 direction register */
SFR(P5D , 0x3EB);			   /* Port P5 direction register */
SFR(P6  , 0x3EC);			   /* Port P6 register */
SFR(P7  , 0x3ED);			   /* Port P7 register */
SFR(P6D , 0x3EE);			   /* Port P6 direction register */
SFR(P7D , 0x3EF);			   /* Port P7 direction register */
SFR(P8  , 0x3F0);			   /* Port P8 register */
SFR(P9  , 0x3F1);			   /* Port P9 register */
SFR(P8D , 0x3F2);			   /* Port P8 direction register */
SFR(P9D , 0x3F3);			   /* Port P9 direction register */
SFR(P10 , 0x3F4);			   /* Port P10 register */
SFR(P10D, 0x3F6);			   /* Port P10 direction register */
#endif

#define KUPM       (*(volatile unsigned char near *)0x3F9)   /* Key-input mode register */
#define P7DR       (*(volatile unsigned char near *)0x3FA)   /* Port P7 drive capacity */

#define PUR0       (*(volatile unsigned char near *)0x3FC)   /* Pull-up register 0 */
#define PUR1       (*(volatile unsigned char near *)0x3FD)   /* Pull-up register 1 */
#define PUR01      (*(volatile unsigned int near  *)0x3FC)   /* Pull-up register 0 and 1 */
#define PUR2       (*(volatile unsigned char near *)0x3FE)   /* Pull-up register 2 */