cpld7256.fit.rpt

CPLD7256的例子程序

; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[2]~182  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[3]~178  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[4]~174  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[5]~170  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[6]~166  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[7]~162  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[8]~158  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[9]~154  ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[10]~150 ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[11]~146 ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[12]~142 ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[13]~138 ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[14]~134 ; 2       ;
; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[15]~130 ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[0]~94    ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[1]~90    ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[2]~86    ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[3]~82    ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[4]~78    ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[5]~74    ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[6]~70    ; 2       ;
; latch8:out2_latch|lpm_latch:lpm_latch_component|latches[7]~66    ; 2       ;
; comb~334                                                         ; 1       ;
; d[8]~7                                                           ; 1       ;
; d[9]~6                                                           ; 1       ;
; d[10]~5                                                          ; 1       ;
+------------------------------------------------------------------+---------+


+-------------------------------------------------+
; Interconnect Usage Summary                      ;
+----------------------------+--------------------+
; Interconnect Resource Type ; Usage              ;
+----------------------------+--------------------+
; Output enables             ; 1 / 6 ( 16 % )     ;
; PIA buffers                ; 117 / 576 ( 20 % ) ;
; PIAs                       ; 131 / 576 ( 22 % ) ;
+----------------------------+--------------------+


+----------------------------------------------------------------------------+
; LAB External Interconnect                                                  ;
+----------------------------------------------+-----------------------------+
; LAB External Interconnects  (Average = 8.19) ; Number of LABs  (Total = 8) ;
+----------------------------------------------+-----------------------------+
; 0 - 1                                        ; 8                           ;
; 2 - 3                                        ; 0                           ;
; 4 - 5                                        ; 0                           ;
; 6 - 7                                        ; 0                           ;
; 8 - 9                                        ; 3                           ;
; 10 - 11                                      ; 0                           ;
; 12 - 13                                      ; 0                           ;
; 14 - 15                                      ; 0                           ;
; 16 - 17                                      ; 0                           ;
; 18 - 19                                      ; 0                           ;
; 20 - 21                                      ; 4                           ;
; 22 - 23                                      ; 1                           ;
+----------------------------------------------+-----------------------------+


+----------------------------------------------------------------------+
; LAB Macrocells                                                       ;
+----------------------------------------+-----------------------------+
; Number of Macrocells  (Average = 3.00) ; Number of LABs  (Total = 9) ;
+----------------------------------------+-----------------------------+
; 0                                      ; 7                           ;
; 1                                      ; 2                           ;
; 2                                      ; 1                           ;
; 3                                      ; 0                           ;
; 4                                      ; 0                           ;
; 5                                      ; 0                           ;
; 6                                      ; 1                           ;
; 7                                      ; 2                           ;
; 8                                      ; 3                           ;
+----------------------------------------+-----------------------------+


+-------------------------------------------------------------------------------+
; Shareable Expander                                                            ;
+-------------------------------------------------+-----------------------------+
; Number of shareable expanders  (Average = 0.38) ; Number of LABs  (Total = 6) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 10                          ;
; 1                                               ; 6                           ;
+-------------------------------------------------+-----------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Logic Cell Interconnection                                                                                                                                                                                                                                                                                                                                                             ;
+-----+------------+--------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LAB ; Logic Cell ; Input                                                                                                                                ; Output                                                                                                                                                                                                                       ;
+-----+------------+--------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
;  C  ; LC33       ; d[0], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[0]~190, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~334       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[0]~190, output[0]                                                                                                                                                   ;
;  C  ; LC41       ; w_r, va[2], as, va[16], va[18], va[17]                                                                                               ; d[15], d[14], d[13], d[12], d[11], d[10], d[9], d[8], d[7], d[6], d[5], d[4], d[3], d[2], d[1], d[0]                                                                                                                         ;
;  D  ; LC64       ; d[1], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[1]~186, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[1]~186, output[1]                                                                                                                                                   ;
;  D  ; LC61       ; d[2], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[2]~182, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[2]~182, output[2]                                                                                                                                                   ;
;  D  ; LC59       ; d[3], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[3]~178, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[3]~178, output[3]                                                                                                                                                   ;
;  D  ; LC56       ; d[4], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[4]~174, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[4]~174, output[4]                                                                                                                                                   ;
;  D  ; LC54       ; d[5], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[5]~170, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[5]~170, output[5]                                                                                                                                                   ;
;  D  ; LC53       ; d[6], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[6]~166, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[6]~166, output[6]                                                                                                                                                   ;
;  D  ; LC51       ; d[7], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[7]~162, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[7]~162, output[7]                                                                                                                                                   ;
;  D  ; LC49       ; d[8], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[8]~158, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~333       ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[8]~158, output[8]                                                                                                                                                   ;
;  E  ; LC75       ; wr$latch~12                                                                                                                          ; wren                                                                                                                                                                                                                         ;
;  E  ; LC78       ; rd$latch~12                                                                                                                          ; rden                                                                                                                                                                                                                         ;
;  E  ; LC77       ; byte~9, wr$latch~12, as, va[16], va[18], va[17], va[2]                                                                               ; wr$latch~12, wr, wr$latch~14                                                                                                                                                                                                 ;
;  E  ; LC80       ; byte~9, rd$latch~12, as, va[16], va[18], va[17], rd$latch$d_and~40sexp                                                               ; rd$latch~12, rd, rd$latch~14                                                                                                                                                                                                 ;
;  E  ; LC69       ; byte~9                                                                                                                               ; my                                                                                                                                                                                                                           ;
;  E  ; LC73       ; as, va[16], va[18], va[17]                                                                                                           ; d[15]~997, d[14]~1005, d[13]~1011, d[12]~1017, d[11]~1023, d[10]~1029, d[9]~1035, d[8]~1041, d[7]~1047, d[6]~1053, d[5]~1059, d[4]~1065, d[3]~1071, d[2]~1077, d[1]~1083, d[0]~1089, byte, byte~17, rd$latch~12, wr$latch~12 ;
;  H  ; LC128      ; d[9], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[9]~154, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~268sexp   ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[9]~154, output[9]                                                                                                                                                   ;
;  H  ; LC125      ; d[10], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[10]~150, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~268sexp ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[10]~150, output[10]                                                                                                                                                 ;
;  H  ; LC123      ; d[11], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[11]~146, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~268sexp ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[11]~146, output[11]                                                                                                                                                 ;
;  H  ; LC121      ; d[12], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[12]~142, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~268sexp ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[12]~142, output[12]                                                                                                                                                 ;
;  H  ; LC120      ; d[13], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[13]~138, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~268sexp ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[13]~138, output[13]                                                                                                                                                 ;
;  H  ; LC117      ; d[14], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[14]~134, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~268sexp ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[14]~134, output[14]                                                                                                                                                 ;
;  H  ; LC115      ; d[15], latch16:out1_latch|lpm_latch:lpm_latch_component|latches[15]~130, va[1], w_r, va[2], as, va[16], va[18], va[17], comb~268sexp ; latch16:out1_latch|lpm_latch:lpm_latch_component|latches[15]~130, output[15]                                                                                                                                                 ;
;  I  ; LC129      ; va[1], input[7], input[23], w_r, byte~9, va[2]                                                                                       ; d[7]                                                                                                                                                                                                                         ;
;  I  ; LC131      ; va[1], input[6], input[22], w_r, byte~9, va[2]                                                                                       ; d[6]