8253xini.c

一个2.4.21版本的嵌入式linux内核

		bptr->virtbaseaddress0 = 0;
		iounmap((void*)bptr->virtbaseaddress2);
		bptr->virtbaseaddress2 = 0;
		
		goto CPCIRESTART;
	}
	
	if(((unsigned short*) bptr->b_eprom)[EPROMPREFETCHOFFSET] & PREFETCHBIT)
	{
		++sab8253x_rebootflag;
		printk(KERN_ALERT "8253x: eeprom programmed for prefetchable memory resources; must reprogram!!\n");
		plx9050_eprom_cmd(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				  NM93_WENCMD, NM93_WENADDR, 0);
		plx9050_eprom_cmd(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				  NM93_WRITECMD, 
				  9,
				  (((unsigned short*) bptr->b_eprom)[EPROMPREFETCHOFFSET] & (~PREFETCHBIT)));
		plx9050_eprom_cmd(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				  NM93_WDSCMD, NM93_WDSADDR, 0);
	}
	/* get SYNC and ONEPORT values */
	
	control = readl(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl);	
	/* note we use the actual address
	 * of the control register in
	 * memory
	 */
	
	if(control & AURORA_MULTI_SYNCBIT)
	{
		does_sync = 0;
	}
	else
	{
		does_sync = 1;
	}
	
	if(control & AURORA_MULTI_1PORTBIT)
	{
		use_1port = 1;
	}
	else
	{
		use_1port = 0;
	}
	
	
	/* Figure out the board */
	switch(bptr->length2) 
	{
	case AURORA_4X20_SIZE:
		if(does_sync) 
		{
			bptr->b_type = BD_4520CP;
			bptr->b_nchips = 2;
			bptr->b_nports = 4;
			bptr->b_flags = BD_SYNC;
			bptr->b_cimbase  =  NULL;
			bptr->board_number = BD4520CPcounter; /* keep track of boardnumber for naming devices */
			++BD4520CPcounter;
			printk(KERN_ALERT "auraXX20n: Found Saturn 4520CP.\n");
		} 
		else 
		{
			bptr->b_type = BD_4020CP;
			bptr->b_nchips = 2;
			bptr->b_nports = 4;
			bptr->b_flags = 0x0;
			bptr->b_cimbase  =  NULL;
			bptr->board_number = BD4020CPcounter;
			++BD4020CPcounter;
			printk(KERN_ALERT "auraXX20n: Found Apollo 4020CP.\n");
		}
		break;
	case AURORA_8X20_SIZE:
		if(does_sync) 
		{ 
			bptr->b_type = BD_8520CP;
			bptr->b_nchips = 1;
			bptr->b_nports = 8;
			bptr->b_flags = BD_SYNC;
			bptr->b_cimbase  =  NULL;
			bptr->board_number = BD8520CPcounter;
			++BD8520CPcounter;
			printk(KERN_ALERT "auraXX20n: Found Saturn 8520CP.\n");
		} 
		else 
		{
			bptr->b_type = BD_8020CP;
			bptr->b_nchips = 1;
			bptr->b_nports = 8;
			bptr->b_flags = 0x0;
			bptr->b_cimbase  =  NULL;
			bptr->board_number = BD8020CPcounter;
			++BD8020CPcounter;
			printk(KERN_ALERT "auraXX20n: Found Apollo 8020CP.\n");
		}
		break;
	case AURORA_2X20_SIZE:
		if(does_sync) 
		{
			if(use_1port) 
			{
				bptr->b_type = BD_1520CP;
				printk(KERN_ALERT "auraXX20n: Found Saturn 1520CP.\n");
				bptr->b_nchips = 1;
				bptr->b_nports = 1;
				bptr->b_flags = BD_SYNC;
				bptr->b_cimbase  =  NULL;
				bptr->board_number = BD1520CPcounter;
				++BD1520CPcounter;
				printk(KERN_ALERT "auraXX20n: Found Saturn 1520CP.\n");
			} 
			else 
			{
				bptr->b_type = BD_2520CP;
				bptr->b_nchips = 1;
				bptr->b_nports = 2;
				bptr->b_flags = BD_SYNC;
				bptr->b_cimbase  =  NULL;
				bptr->board_number = BD2520CPcounter;
				++BD2520CPcounter;
				printk(KERN_ALERT "auraXX20n: Found Saturn 2520CP.\n");
			}
		}
		else
		{
			if(use_1port) 
			{
				bptr->b_type = BD_1020CP;
				bptr->b_nchips = 1;
				bptr->b_nports = 1;
				bptr->b_flags = 0x0;
				bptr->b_cimbase  =  NULL;
				bptr->board_number = BD1020CPcounter;
				++BD1020CPcounter;
				printk(KERN_ALERT "auraXX20n: Found Apollo 1020CP.\n");
			} 
			else 
			{
				bptr->b_type = BD_2020CP;
				bptr->b_nchips = 1;
				bptr->b_nports = 2;
				bptr->b_flags = 0x0;
				bptr->b_cimbase  =  NULL;
				bptr->board_number = BD2020CPcounter;
				++BD2020CPcounter;
				printk(KERN_ALERT "auraXX20n: Found Apollo 2020CP.\n");
			}
		}
		break;
	default:
		printk(KERN_ALERT "Error: Board could not be identified\n");
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		iounmap((void*)bptr->virtbaseaddress2);
		bptr->virtbaseaddress2 = 0;
		
		goto CPCIRESTART;
	}
	
	/* Let's get the clockrate right -- ugh!*/
	
	bptr->b_clkspeed = bptr->b_eprom[AURORA_MULTI_EPROM_CLKLSW/2];
	
	if(bptr->b_clkspeed == -1)	/* misprogrammed -- ugh. */
	{
		switch(bptr->b_type)
		{
		case BD_8520CP:
		case BD_8020CP:
			bptr->b_clkspeed = AURORA_MULTI_CLKSPEED/4;
			break;
		default:
			bptr->b_clkspeed = AURORA_MULTI_CLKSPEED;
			break;
			
		}
		printk(KERN_ALERT "auraXX20n:  UNKNOWN CLOCKSPEED -- ASSUMING %ld.\n", bptr->b_clkspeed);
		
		plx9050_eprom_cmd(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				  NM93_WENCMD, NM93_WENADDR, 0);
		plx9050_eprom_cmd(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				  NM93_WRITECMD, 
				  54, (unsigned short) bptr->b_clkspeed);
		plx9050_eprom_cmd(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				  NM93_WRITECMD, 
				  55, (unsigned short) (bptr->b_clkspeed >> 16));
		plx9050_eprom_cmd(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				  NM93_WDSCMD, NM93_WDSADDR, 0);
	}
	
	return bptr;
}

static SAB_BOARD* find_ati_wanms_card(void)   /* wan multichanner server == mcs [ multichannel server] */
{
	struct pci_dev *pdev;
	unsigned char bus;
	unsigned char devfn;
	unsigned char pci_latency;
	unsigned short pci_command;
	SAB_BOARD *bptr;
	int resetresult;
	
	printk(KERN_ALERT "auraXX20n: finding ati mcs cards.\n");
	
	bptr = (SAB_BOARD*)kmalloc(sizeof(SAB_BOARD), GFP_KERNEL);
	if(bptr == NULL)
	{
		printk(KERN_ALERT "auraXX20n: could not allocate board memory!\n");
		return 0;
	}
	memset(bptr, 0, sizeof(SAB_BOARD));
	
	if(!pcibios_present())
	{
		printk(KERN_ALERT "auraXX20n: system does not support PCI bus.\n");
		kfree(bptr);
		return 0;
	}
	DEBUGPRINT((KERN_ALERT "auraXX20n: System supports PCI bus.\n"));
	
 MCSRESTART:
	if(pdev = pci_find_device(sab8253x_vendor_id, sab8253x_wmcs_device_id, XX20lastpdev),
	   pdev == NULL)
	{
		printk(KERN_ALERT "auraXX20n: could not find mcs card.\n");
		kfree(bptr);
		return 0;
	}
	
	DEBUGPRINT((KERN_ALERT "auraXX20n: found mcs card.\n"));
	
	XX20lastpdev = pdev;
	DEBUGPRINT((KERN_ALERT "auraXX20n: found ATI S5920, %p.\n", pdev));
	bptr->b_dev = *pdev;
	
	/* the Solaris and model linux drivers
	 * comment that there are problems with
	 * getting the length via PCI operations
	 * seems to work for 2.4
	 */
	bptr->length0 = (unsigned int) pci_resource_len(pdev, 0); /* AMCC 5920 operation registers
								     includes access to serial eprom */
	bptr->length1 = (unsigned int) pci_resource_len(pdev, 1); /* commands to remote cards */
	bptr->length2 = (unsigned int) pci_resource_len(pdev, 2); /* command to host card */
	bptr->length3 = (unsigned int) pci_resource_len(pdev, 3); /* RFIFO cache */
	bptr->b_irq = pdev->irq;
	
	DEBUGPRINT((KERN_ALERT 
		    "auraXX20n: base address 0 is %p, len is %x.\n", 
		    (void*) pci_base_address(pdev, 0), bptr->length0));
	DEBUGPRINT((KERN_ALERT 
		    "auraXX20n: base address 1 is %p, len is %x.\n", 
		    (void*) pci_base_address(pdev, 1), bptr->length1));
	DEBUGPRINT((KERN_ALERT 
		    "auraXX20n: base address 2 is %p, len is %x.\n", 
		    (void*) pci_base_address(pdev, 2),
		    bptr->length2));
	DEBUGPRINT((KERN_ALERT 
		    "auraXX20n: base address 3 is %p, len is %x.\n", 
		    (void*) pci_base_address(pdev, 3),
		    bptr->length3));
	
	DEBUGPRINT((KERN_ALERT "auraXX20n: interrupt is %i.\n", pdev->irq));
	bus = pdev->bus->number;
	devfn = pdev->devfn;
	DEBUGPRINT((KERN_ALERT "auraXX20n: bus is %x, slot is %x.\n", bus, PCI_SLOT(devfn)));
	pcibios_read_config_word(bus, devfn, PCI_COMMAND, &pci_command);
	
#if 0
	/* The Aurora card does not act as a PCI master
	 * ugh!!
	 */
	new_command = pci_command | PCI_COMMAND_MASTER;
	if(pci_command != new_command)
	{
		DEBUGPRINT((KERN_ALERT 
			    "auraXX20n: the PCI BIOS has not enabled this device!"
			    " Updating PCI command %4.4x->%4.4x.\n", 
			    pci_command,
			    new_command));
		pcibios_write_config_word(bus, devfn, PCI_COMMAND, 
					  new_command);
	}
	else
	{
		DEBUGPRINT
			((KERN_ALERT 
			  "auraXX20n: the PCI BIOS has enabled this device as master!\n"));
	}
#endif
	
	if((pci_command & PCI_COMMAND_MASTER) != PCI_COMMAND_MASTER)
	{
		DEBUGPRINT((KERN_ALERT "auraXX20n: Aurora card is not a bus master.\n"));
	}
	
	pcibios_read_config_byte(bus, devfn, PCI_LATENCY_TIMER, 
				 &pci_latency);
	if (pci_latency < 32) 
	{
		DEBUGPRINT
			((KERN_ALERT
			  "auraXX20n: PCI latency timer (CFLT) is low at %i.\n", pci_latency));
		/* may need to change the latency */
#if 0
		pcibios_write_config_byte(bus, devfn, PCI_LATENCY_TIMER, 32);
#endif
	} 
	else 
	{
		DEBUGPRINT((KERN_ALERT
			    "auraXX20n: PCI latency timer (CFLT) is %#x.\n", 
			    pci_latency));
	}
	
	bptr->virtbaseaddress0 = ioremap_nocache(pci_base_address(pdev, 0), 
						 bptr->length0);
	if(bptr->virtbaseaddress0 == NULL)
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to remap physical address %p.\n", 
		       (void*) pci_base_address(pdev, 0));
		goto MCSRESTART;
	}
	
	bptr->b_bridge = (void*) bptr->virtbaseaddress0; /* b_bridge is not supposed
							    to be used by the AMCC based
							    products -- it is set just
							    in case */
	
	printk(KERN_ALERT
	       "auraXX20n: remapped physical address %p to virtual address %p.\n",
	       (void*) pci_base_address(pdev, 0), (void*) bptr->virtbaseaddress0);
	
	/* unfortunate name -- works for any bridge */
	dump_ati_adapter_registers((unsigned int*) bptr->virtbaseaddress0, bptr->length0);
	
	if(*(unsigned int*)bptr->virtbaseaddress0 == -1) /* XP7 problem? */
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to access AMCC registers at %p.\n", 
		       (void*)bptr->virtbaseaddress0);
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress0);
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		goto MCSRESTART;		       /* try the next one if any */
	}
	
	writel(AMCC_INT_OFF, (unsigned int*)(bptr->AMCC_REG + AMCC_INTCSR));
	
	bptr->virtbaseaddress1 = ioremap_nocache(pci_base_address(pdev, 1),
						 bptr->length1);
	if(bptr->virtbaseaddress1 == NULL)
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to remap physical address %p.\n", 
		       (void*) pci_base_address(pdev, 1));
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress0);
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		goto MCSRESTART;
	}
	
	DEBUGPRINT
		((KERN_ALERT
		  "auraXX20n: remapped physical address %p to virtual address %p.\n",
		  (void*) pci_base_address(pdev, 1), (void*) bptr->virtbaseaddress1));
	
	/* next address space */
	bptr->virtbaseaddress2 = ioremap_nocache(pci_base_address(pdev, 2),
						 bptr->length2);
	if(bptr->virtbaseaddress2 == NULL)
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to remap physical address %p.\n", 
		       (void*) pci_base_address(pdev, 2));
		
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress0);
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress1);
		iounmap((void*)bptr->virtbaseaddress1);
		bptr->virtbaseaddress1 = 0;
		goto MCSRESTART;
	}
	
	DEBUGPRINT
		((KERN_ALERT
		  "auraXX20n: remapped physical address %p to virtual address %p.\n",
		  (void*) pci_base_address(pdev, 2), (void*) bptr->virtbaseaddress2));
	
	bptr->virtbaseaddress3 = ioremap_nocache(pci_base_address(pdev, 3),
						 bptr->length3);
	if(bptr->virtbaseaddress3 == NULL)
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to remap physical address %p.\n", 
		       (void*) pci_base_address(pdev, 3));
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress0);
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress1);
		iounmap((void*)bptr->virtbaseaddress1);
		bptr->virtbaseaddress1 = 0;
		
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress2);
		iounmap((void*)bptr->virtbaseaddress2);
		bptr->virtbaseaddress2 = 0;
		
		goto MCSRESTART;
	}
	
	DEBUGPRINT
		((KERN_ALERT
		  "auraXX20n: remapped physical address %p to virtual address %p.\n",
		  (void*) pci_base_address(pdev, 3), (void*) bptr->virtbaseaddress3));
	
	bptr->b_type = BD_WANMCS;
	
	resetresult = wanmcs_reset(bptr);
	writel(AMCC_INT_OFF, (unsigned int*)(bptr->AMCC_REG + AMCC_INTCSR));
	
	if(resetresult == FALSE)