8253xini.c

一个2.4.21版本的嵌入式linux内核

	for(intrmask = 0, cimnum = 0; cimnum < MAX_NCIMS; ++cimnum)
	{
		intrmask >>= 2;
		
		/*
		 * The hardware is mapped.  Try writing to CIM CSR.
		 */
		wrcsr = bptr->CIMCMD_REG +
			(CIMCMD_WRCIMCSR | (cimnum << CIMCMD_CIMSHIFT));
		rdcsr = bptr->CIMCMD_REG +
			(CIMCMD_RDCIMCSR | (cimnum << CIMCMD_CIMSHIFT));
		
		/* Try to write an 0xff */
		writeb((unsigned char) 0xff, (unsigned char *) wrcsr);
		/* and read it back */
		tmp = (unsigned char) readb((unsigned char *) rdcsr);
		DEBUGPRINT((KERN_ALERT 
			    "aura wan mcs: wrcsr %p rdcsr %p cim %d 0xff readback: 0x%x.\n",
			    (void*) wrcsr, (void*) rdcsr, cimnum, tmp));
		
		/* make sure it's really all ones. */
		if ((tmp & CIMCMD_CIMCSR_TESTMASK) != CIMCMD_CIMCSR_TESTMASK) 
		{
			printk(KERN_ALERT 
			       "aura wan mcs: not found -- wrcsr %p rdcsr %p cim %d 0xff readback: 0x%x.\n",
			       (void*) wrcsr, (void*) rdcsr, cimnum, tmp);
			continue;
		}
		
		/* Try to write a zero */
		writeb((unsigned char) 0, (unsigned char*) wrcsr);
		/* and read it back */
		tmp = (unsigned char) readb((unsigned char *) rdcsr);
		DEBUGPRINT((KERN_ALERT 
			    "aura wan mcs: wrcsr %p rdcsr %p cim %d 0x0 readback: 0x%x.\n",
			    (void*) wrcsr, (void*) rdcsr, cimnum, tmp));
		
		/* make sure it's really zero. */
		if ((tmp & CIMCMD_CIMCSR_TESTMASK) != 0) 
		{
			printk(KERN_ALERT 
			       "aura wan mcs: not found -- wrcsr %p rdcsr %p cim %d 0x0 readback: 0x%x.\n",
			       (void*) wrcsr, (void*) rdcsr, cimnum, tmp);
			continue;
		}
		cim = (AURA_CIM*) kmalloc(sizeof(AURA_CIM), GFP_KERNEL);
		if(cim == NULL)
		{
			printk(KERN_ALERT 
			       "aura wan mcs: unable to allocate memory, board %p, cim %d.\n", 
			       bptr, cimnum); 
			continue;
		}
		cim->ci_num = cimnum;
		cim->ci_board = bptr;
		cim->ci_chipbase = NULL;
		cim->ci_portbase = NULL;
		cim->ci_nports = CIM_NPORTS;
		cim->ci_port0lbl = cimnum * CIM_NPORTS;
		if (mcs_ciminit(bptr, cim) == FALSE) 
		{
			kfree(cim);
			continue;
		}
		intrmask |= 0xc0;	/* turn on the high two bits
					 * a little obscure, borrowed
					 * from solaris driver 0th cim
					 * gets lowest two bits*/
		cim->next = AuraCimRoot;
		AuraCimRoot = cim;
		cim->next_by_mcs = bptr->b_cimbase;
		bptr->b_cimbase = cim;
		printk(KERN_ALERT 
		       "aura wan mcs: Created cim %d type %d on board %p.\n",
		       cim->ci_num, cim->ci_type, bptr);
	}
	bptr->b_intrmask = intrmask;
}

/* put the chips on the boards */

static void SetupAllChips(SAB_BOARD *bptr)
{				/* note that port ordering */
				/* is important in chip setup */
				/* the open routine walks the */
				/* port list for sync and async */
				/* ttys */
	SAB_CHIP *chip;
	AURA_CIM *cim;
	unsigned int chipno;
	
	switch(bptr->b_type)
	{
	case BD_1020P:
	case BD_1020CP:
		/* setup 1 ESCC2 */
		chip = CreateESCC2(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_NA);
			CreateESCC2Port(chip, 0, FUNCTION_AO);
		}
		
		break;
	case BD_1520P:
	case BD_1520CP:
		/* setup 1 ESCC2 */
		chip = CreateESCC2(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_NA);
			CreateESCC2Port(chip, 0, FUNCTION_NR);
		}      
		break;
	case BD_2020P:
	case BD_2020CP:
		/* setup 1 ESCC2 */
		chip = CreateESCC2(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_AO);
			CreateESCC2Port(chip, 0, FUNCTION_AO);
		}      
		break;
	case BD_2520P:
	case BD_2520CP:
		/* setup 1 ESCC2 */
		chip = CreateESCC2(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_NR);
			CreateESCC2Port(chip, 0, FUNCTION_NR);
		}      
		break;
	case BD_4020P:		
	case BD_4020CP:		/* do chips in reverCse
				   order so that they
				   are on lists in forward
				   order
				*/
				/* setup 2 ESCC2 */
		chip = CreateESCC2(bptr, AURORA_4X20_CHIP_OFFSET);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_AO);
			CreateESCC2Port(chip, 0, FUNCTION_AO);
		}
		chip = CreateESCC2(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_AO);
			CreateESCC2Port(chip, 0, FUNCTION_AO);
		}
		break;
	case BD_4520P:
	case BD_4520CP:
		/* setup 2 ESCC2 */
		chip = CreateESCC2(bptr, AURORA_4X20_CHIP_OFFSET);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_NR);
			CreateESCC2Port(chip, 0, FUNCTION_NR);
		}
		chip = CreateESCC2(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC2Port(chip, 1, FUNCTION_NR);
			CreateESCC2Port(chip, 0, FUNCTION_NR);
		}
		break;
	case BD_8020P:
	case BD_8020CP:
		/* setup 1 ESCC8 */
		chip = CreateESCC8(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC8Port(chip, 7, FUNCTION_AO);
			CreateESCC8Port(chip, 6, FUNCTION_AO);
			CreateESCC8Port(chip, 5, FUNCTION_AO);
			CreateESCC8Port(chip, 4, FUNCTION_AO);
			CreateESCC8Port(chip, 3, FUNCTION_AO);
			CreateESCC8Port(chip, 2, FUNCTION_AO);
			CreateESCC8Port(chip, 1, FUNCTION_AO);
			CreateESCC8Port(chip, 0, FUNCTION_AO);
		}
		break;
	case BD_8520P:
	case BD_8520CP:
		/* setup 1 ESCC8 */
		chip = CreateESCC8(bptr, 0);
		if(chip != NULL)
		{
			CreateESCC8Port(chip, 7, FUNCTION_NR);
			CreateESCC8Port(chip, 6, FUNCTION_NR);
			CreateESCC8Port(chip, 5, FUNCTION_NR);
			CreateESCC8Port(chip, 4, FUNCTION_NR);
			CreateESCC8Port(chip, 3, FUNCTION_NR);
			CreateESCC8Port(chip, 2, FUNCTION_NR);
			CreateESCC8Port(chip, 1, FUNCTION_NR);
			CreateESCC8Port(chip, 0, FUNCTION_NR);
		}
		break;
		
	case BD_WANMCS:
		CreateCIMs(bptr);
		for(chipno = 7, cim = bptr->b_cimbase; 
		    cim != NULL; cim = cim->next_by_mcs)
		{
			chip = CreateESCC8fromCIM(bptr, cim, chipno--);
			if(chip != NULL)
			{
				CreateESCC8PortWithCIM(chip, 7, cim, 0);
				CreateESCC8PortWithCIM(chip, 6, cim, 0);
				CreateESCC8PortWithCIM(chip, 5, cim, 0);
				CreateESCC8PortWithCIM(chip, 4, cim, 0);
				CreateESCC8PortWithCIM(chip, 3, cim, 0);
				CreateESCC8PortWithCIM(chip, 2, cim, 0);
				CreateESCC8PortWithCIM(chip, 1, cim, 0);
				CreateESCC8PortWithCIM(chip, 0, cim, 0);
			}
			chip = CreateESCC8fromCIM(bptr, cim, chipno--);
			if(chip != NULL)
			{
				CreateESCC8PortWithCIM(chip, 7, cim, 0);
				CreateESCC8PortWithCIM(chip, 6, cim, 0);
				CreateESCC8PortWithCIM(chip, 5, cim, 0);
				CreateESCC8PortWithCIM(chip, 4, cim, 0);
				CreateESCC8PortWithCIM(chip, 3, cim, 0);
				CreateESCC8PortWithCIM(chip, 2, cim, 0);
				CreateESCC8PortWithCIM(chip, 1, cim, 0);
				CreateESCC8PortWithCIM(chip, 0, cim, 1);
			}
		}
		break;
		
	default:
		printk(KERN_ALERT "auraXX20n: unable to set up chip for board %p.\n", bptr);
		break;
	}
}

/* finding the cards by PCI device type */

static SAB_BOARD* find_ati_cpci_card(void)
{
	struct pci_dev *pdev;
	unsigned char bus;
	unsigned char devfn;
	unsigned char pci_latency;
	unsigned short pci_command;
	SAB_BOARD *bptr;
	unsigned control;
	unsigned does_sync;
	unsigned use_1port;
	
	printk(KERN_ALERT "auraXX20n: finding ati cpci cards.\n");
	
	bptr = (SAB_BOARD*)kmalloc(sizeof(SAB_BOARD), GFP_KERNEL);
	if(bptr == NULL)
	{
		printk(KERN_ALERT "auraXX20n: could not allocate board memory!\n");
		return 0;
	}
	memset(bptr, 0, sizeof(SAB_BOARD));
	
	if(!pcibios_present())
	{
		printk(KERN_ALERT "auraXX20n: system does not support PCI bus.\n");
		kfree(bptr);
		return 0;
	}
	DEBUGPRINT((KERN_ALERT "auraXX20n: System supports PCI bus.\n"));
	
 CPCIRESTART:
	if(pdev = pci_find_device(sab8253x_vendor_id, sab8253x_cpci_device_id, XX20lastpdev),
	   pdev == NULL)
	{
		printk(KERN_ALERT "auraXX20n: could not find cpci card.\n");
		kfree(bptr);
		return 0;
	}
	
	DEBUGPRINT((KERN_ALERT "auraXX20n: found multiport CPCI serial card.\n"));
	
	XX20lastpdev = pdev;
	DEBUGPRINT((KERN_ALERT "auraXX20n: found ATI PLX 9050, %p.\n", pdev));
	bptr->b_dev = *pdev;
	
	/* the Solaris and model linux drivers
	 * comment that there are problems with
	 * getting the length via PCI operations
	 * seems to work for 2.4
	 */
	bptr->length0 = (unsigned int) pci_resource_len(pdev, 0);
	bptr->length1 = (unsigned int) pci_resource_len(pdev, 1);
	bptr->length2 = (unsigned int) pci_resource_len(pdev, 2);
	bptr->b_irq = pdev->irq;
	
	
	DEBUGPRINT((KERN_ALERT 
		    "auraXX20n: base address 0 is %p, len is %x.\n", 
		    (void*) pci_base_address(pdev, 0), bptr->length0));
	DEBUGPRINT((KERN_ALERT 
		    "auraXX20n: base address 1 is %p, len is %x.\n", 
		    (void*) pci_base_address(pdev, 1), bptr->length1));
	DEBUGPRINT((KERN_ALERT 
		    "auraXX20n: base address 2 is %p, len is %x.\n", 
		    (void*) pci_base_address(pdev, 2),
		    bptr->length2));
	
	DEBUGPRINT((KERN_ALERT "auraXX20n: interrupt is %i.\n", pdev->irq));
	bus = pdev->bus->number;
	devfn = pdev->devfn;
	DEBUGPRINT((KERN_ALERT "auraXX20n: bus is %x, slot is %x.\n", bus, PCI_SLOT(devfn)));
	pcibios_read_config_word(bus, devfn, PCI_COMMAND, &pci_command);
#if 0
	/* The Aurora card does not act as a PCI master
	 * ugh!!
	 */
	new_command = pci_command | PCI_COMMAND_MASTER;
	if(pci_command != new_command)
	{
		DEBUGPRINT((KERN_ALERT 
			    "auraXX20n: the PCI BIOS has not enabled this device!"
			    " Updating PCI command %4.4x->%4.4x.\n", 
			    pci_command,
			    new_command));
		pcibios_write_config_word(bus, devfn, PCI_COMMAND, 
					  new_command);
	}
	else
	{
		DEBUGPRINT
			((KERN_ALERT 
			  "auraXX20n: the PCI BIOS has enabled this device as master!\n"));
	}
#endif
	if((pci_command & PCI_COMMAND_MASTER) != PCI_COMMAND_MASTER)
	{
		DEBUGPRINT((KERN_ALERT "auraXX20n: Aurora card is not a bus master.\n"));
	}
	
	pcibios_read_config_byte(bus, devfn, PCI_LATENCY_TIMER, 
				 &pci_latency);
	if (pci_latency < 32) 
	{
		DEBUGPRINT
			((KERN_ALERT
			  "auraXX20n: PCI latency timer (CFLT) is low at %i.\n", pci_latency));
		/* may need to change the latency */
#if 0
		pcibios_write_config_byte(bus, devfn, PCI_LATENCY_TIMER, 32);
#endif
	} 
	else 
	{
		DEBUGPRINT((KERN_ALERT
			    "auraXX20n: PCI latency timer (CFLT) is %#x.\n", 
			    pci_latency));
	}
	bptr->virtbaseaddress0 = ioremap_nocache(pci_base_address(pdev, 0), 
						 bptr->length0);
	if(bptr->virtbaseaddress0 == NULL)
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to remap physical address %p.\n", 
		       (void*) pci_base_address(pdev, 0));
		
		goto CPCIRESTART;
	}
	
	bptr->b_bridge = (PLX9050*) bptr->virtbaseaddress0; /* MAKE SURE INTS ARE OFF */
	writel(PLX_INT_OFF, &(bptr->b_bridge->intr));
	
	printk
		(KERN_ALERT
		 "auraXX20n: remapped physical address %p to virtual address %p.\n",
		 (void*) pci_base_address(pdev, 0), (void*) bptr->virtbaseaddress0);
	
	dump_ati_adapter_registers((unsigned int*) bptr->virtbaseaddress0, bptr->length0);
	
	if(*(unsigned int*)bptr->virtbaseaddress0 == -1) /* XP7 problem? */
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to access PLX 9050 registers at %p.\n", 
		       (void*)bptr->virtbaseaddress0);
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress0);
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		
		goto CPCIRESTART;
	}
	
	bptr->virtbaseaddress2 = ioremap_nocache(pci_base_address(pdev, 2),
						 bptr->length2);
	if(bptr->virtbaseaddress2 == NULL)
	{
		printk(KERN_ALERT
		       "auraXX20n: unable to remap physical address %p.\n", 
		       (void*) pci_base_address(pdev, 2));
		printk(KERN_ALERT "auraXX20n: unmapping virtual address %p.\n",
		       (void*)bptr->virtbaseaddress0);
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		
		goto CPCIRESTART;
	}
	
	DEBUGPRINT
		((KERN_ALERT
		  "auraXX20n: remapped physical address %p to virtual address %p.\n",
		  (void*) pci_base_address(pdev, 2), (void*) bptr->virtbaseaddress2));
	
	/* we get clockrate from serial eeprom */
	if (!plx9050_eprom_read(&((PLX9050*)(bptr->virtbaseaddress0))->ctrl, 
				(unsigned short*) bptr->b_eprom,
				(unsigned char) 0, EPROM9050_SIZE))
	{
		printk(KERN_ALERT "auraXX20n: Could not read serial eprom.\n");
		iounmap((void*)bptr->virtbaseaddress0);
		bptr->virtbaseaddress0 = 0;
		iounmap((void*)bptr->virtbaseaddress2);
		bptr->virtbaseaddress2 = 0;
		
		goto CPCIRESTART;
	}
	
	printk(KERN_ALERT "auraXX20n: dumping serial eprom.\n");
	dump_ati_adapter_registers((unsigned int*) bptr->b_eprom, 2 * EPROM9050_SIZE);  
	
	if(*(unsigned int*)bptr->b_eprom != PCIMEMVALIDCPCI) /* bridge problem? */
	{
		printk(KERN_ALERT "auraXX20n: unable to access valid serial eprom data.\n");
		iounmap((void*)bptr->virtbaseaddress0);