u3copy_from_user.s

一个2.4.21版本的嵌入式linux内核

/* $Id: U3copy_from_user.S,v 1.3.2.1 2002/01/15 07:17:47 davem Exp $
 * U3memcpy.S: UltraSparc-III optimized copy from userspace.
 *
 * Copyright (C) 1999, 2000 David S. Miller ([e-mail])
 */

#ifdef __KERNEL__
#include <asm/visasm.h>
#include <asm/asi.h>
#include <asm/dcu.h>
#include <asm/spitfire.h>
#undef SMALL_COPY_USES_FPU
#define EXNV(x,y,a,b)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	ba U3cfu_fixup;			\
	 a, b, %o1;			\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX(x,y,a,b)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	ba U3cfu_fixup;			\
	 a, b, %o1;			\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX2(x,y)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	and %o2, (0x40 - 1), %o1;	\
	add %o1, %o4, %o1;		\
	ba U3cfu_fixup;			\
	 add %o1, 0x1c0, %o1;		\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX3(x,y)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	and %o2, (0x40 - 1), %o1;	\
	sll %g3, 6, %g3;		\
	add %o1, 0x80, %o1;		\
	ba U3cfu_fixup;			\
	 add %o1, %g3, %o1;		\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#define EX4(x,y)			\
98:	x,y;				\
	.section .fixup;		\
	.align 4;			\
99:	VISExitHalf;			\
	and %o2, (0x40 - 1), %o1;	\
	add %o1, 0x40, %o1;		\
	ba U3cfu_fixup;			\
	 add %o1, %g3, %o1;		\
	.section __ex_table;		\
	.align 4;			\
	.word 98b, 99b;			\
	.text;				\
	.align 4;
#else
#define ASI_BLK_P 0xf0
#define FPRS_FEF  0x04
#define VISEntryHalf rd %fprs, %o5; wr %g0, FPRS_FEF, %fprs
#define VISExitHalf and %o5, FPRS_FEF, %o5; wr %o5, 0x0, %fprs
#define SMALL_COPY_USES_FPU
#define EXNV(x,y,a,b)	x,y;
#define EX(x,y,a,b)	x,y;
#define EX2(x,y)	x,y;
#define EX3(x,y)	x,y;
#define EX4(x,y)	x,y;
#endif

	/* Special/non-trivial issues of this code:
	 *
	 * 1) %o5 is preserved from VISEntryHalf to VISExitHalf
	 * 2) Only low 32 FPU registers are used so that only the
	 *    lower half of the FPU register set is dirtied by this
	 *    code.  This is especially important in the kernel.
	 * 3) This code never prefetches cachelines past the end
	 *    of the source buffer.
	 */

	.text
	.align	32

	/* The cheetah's flexible spine, oversized liver, enlarged heart,
	 * slender muscular body, and claws make it the swiftest hunter
	 * in Africa and the fastest animal on land.  Can reach speeds
	 * of up to 2.4GB per second.
	 */

	.globl		U3copy_from_user
U3copy_from_user: /* %o0=dst, %o1=src, %o2=len */
#ifndef __KERNEL__
	/* Save away original 'dst' for memcpy return value. */
	mov		%o0, %g3			! A0	Group
#endif
	/* Anything to copy at all? */
	cmp		%o2, 0				! A1
	ble,pn		%icc, U3copy_from_user_short_ret! BR

	/* Extremely small copy? */
	 cmp		%o2, 31				! A0	Group
	ble,pn		%icc, U3copy_from_user_short	! BR

	/* Large enough to use unrolled prefetch loops? */
	 cmp		%o2, 0x100			! A1
	bge,a,pt	%icc, U3copy_from_user_enter	! BR	Group
	 andcc		%o0, 0x3f, %g2			! A0

	ba,pt		%xcc, U3copy_from_user_toosmall	! BR	Group
	 andcc		%o0, 0x7, %g2			! A0

	.align		32
U3copy_from_user_short:
	/* Copy %o2 bytes from src to dst, one byte at a time. */
	EXNV(lduba [%o1 + 0x00] %asi, %o3, add %o2, %g0)! MS	Group
	add		%o1, 0x1, %o1			! A0
	add		%o0, 0x1, %o0			! A1
	subcc		%o2, 1, %o2			! A0	Group

	bg,pt		%icc, U3copy_from_user_short	! BR
	 stb		%o3, [%o0 + -1]			! MS	Group (1-cycle stall)

U3copy_from_user_short_ret:
#ifdef __KERNEL__
	retl						! BR	Group (0-4 cycle stall)
	 clr		%o0				! A0
#else
	retl						! BR	Group (0-4 cycle stall)
	 mov		%g3, %o0			! A0
#endif

	/* Here len >= (6 * 64) and condition codes reflect execution
	 * of "andcc %o0, 0x7, %g2", done by caller.
	 */
	.align		64
U3copy_from_user_enter:
	/* Is 'dst' already aligned on an 64-byte boundary? */
	be,pt		%xcc, 2f			! BR

	/* Compute abs((dst & 0x3f) - 0x40) into %g2.  This is the number
	 * of bytes to copy to make 'dst' 64-byte aligned.  We pre-
	 * subtract this from 'len'.
	 */
	 sub		%g2, 0x40, %g2			! A0	Group
	sub		%g0, %g2, %g2			! A0	Group
	sub		%o2, %g2, %o2			! A0	Group

	/* Copy %g2 bytes from src to dst, one byte at a time. */
1:	EXNV(lduba [%o1 + 0x00] %asi, %o3, add %o2, %g2)! MS	(Group)
	add		%o1, 0x1, %o1			! A1
	add		%o0, 0x1, %o0			! A0	Group
	subcc		%g2, 0x1, %g2			! A1

	bg,pt		%icc, 1b			! BR	Group
	 stb		%o3, [%o0 + -1]			! MS	Group

2:	VISEntryHalf					! MS+MS
	and		%o1, 0x7, %g1			! A1
	ba,pt		%xcc, U3copy_from_user_begin		! BR
	 alignaddr	%o1, %g0, %o1			! MS	      (Break-after)

	.align		64
U3copy_from_user_begin:
#ifdef __KERNEL__
	.globl		U3copy_from_user_nop_1_6
U3copy_from_user_nop_1_6:
	ldxa		[%g0] ASI_DCU_CONTROL_REG, %g3
	sethi		%uhi(DCU_PE), %o3
	sllx		%o3, 32, %o3
	or		%g3, %o3, %o3
	stxa		%o3, [%g0] ASI_DCU_CONTROL_REG	! Enable P-cache
	membar		#Sync
#endif
	prefetcha	[%o1 + 0x000] %asi, #one_read	! MS	Group1
	prefetcha	[%o1 + 0x040] %asi, #one_read	! MS	Group2
	andn		%o2, (0x40 - 1), %o4		! A0
	prefetcha	[%o1 + 0x080] %asi, #one_read	! MS	Group3
	cmp		%o4, 0x140			! A0
	prefetcha	[%o1 + 0x0c0] %asi, #one_read	! MS	Group4
	EX(ldda [%o1 + 0x000] %asi, %f0, add %o2, %g0)	! MS	Group5 (%f0 results at G8)
	bge,a,pt	%icc, 1f			! BR

	prefetcha	[%o1 + 0x100] %asi, #one_read	! MS	Group6
1:	EX(ldda [%o1 + 0x008] %asi, %f2, add %o2, %g0)	! AX	       (%f2 results at G9)
	cmp		%o4, 0x180			! A1
	bge,a,pt	%icc, 1f			! BR
	 prefetcha	[%o1 + 0x140] %asi, #one_read	! MS	Group7
1:	EX(ldda [%o1 + 0x010] %asi, %f4, add %o2, %g0)	! AX	       (%f4 results at G10)
	cmp		%o4, 0x1c0			! A1
	bge,a,pt	%icc, 1f			! BR

	 prefetcha	[%o1 + 0x180] %asi, #one_read	! MS	Group8
1:	faligndata	%f0, %f2, %f16			! FGA	Group9 (%f16 at G12)
	EX(ldda [%o1 + 0x018] %asi, %f6, add %o2, %g0)	! AX	       (%f6 results at G12)
	faligndata	%f2, %f4, %f18			! FGA	Group10 (%f18 results at G13)
	EX(ldda [%o1 + 0x020] %asi, %f8, add %o2, %g0)	! MS	        (%f8 results at G13)
	faligndata	%f4, %f6, %f20			! FGA	Group12	(1-cycle stall,%f20 at G15)
	EX(ldda [%o1 + 0x028] %asi, %f10, add %o2, %g0)	! MS		(%f10 results at G15)
	faligndata	%f6, %f8, %f22			! FGA	Group13 (%f22 results at G16)

	EX(ldda [%o1 + 0x030] %asi, %f12, add %o2, %g0)	! MS		(%f12 results at G16)
	faligndata	%f8, %f10, %f24			! FGA	Group15 (1-cycle stall,%f24 at G18)
	EX(ldda [%o1 + 0x038] %asi, %f14, add %o2, %g0)	! MS		(%f14 results at G18)
	faligndata	%f10, %f12, %f26		! FGA	Group16 (%f26 results at G19)
	EX(ldda [%o1 + 0x040] %asi, %f0, add %o2, %g0)	! MS		(%f0 results at G19)

	/* We only use the first loop if len > (7 * 64). */
	subcc		%o4, 0x1c0, %o4			! A0	Group17
	bg,pt		%icc, U3copy_from_user_loop1	! BR
	 add		%o1, 0x40, %o1			! A1

	add		%o4, 0x140, %o4			! A0	Group18
	ba,pt		%xcc, U3copy_from_user_loop2	! BR
	 srl		%o4, 6, %o3			! A0	Group19
	nop
	nop
	nop
	nop
	nop

	nop
	nop

	/* This loop performs the copy and queues new prefetches.
	 * We drop into the second loop when len <= (5 * 64).  Note
	 * that this (5 * 64) factor has been subtracted from len
	 * already.
	 */
U3copy_from_user_loop1:
	EX2(ldda [%o1 + 0x008] %asi, %f2)		! MS	Group2	(%f2 results at G5)
	faligndata	%f12, %f14, %f28		! FGA		(%f28 results at G5)
	EX2(ldda [%o1 + 0x010] %asi, %f4)		! MS	Group3	(%f4 results at G6)
	faligndata	%f14, %f0, %f30			! FGA	Group4	(1-cycle stall, %f30 at G7)
	stda		%f16, [%o0] ASI_BLK_P		! MS
	EX2(ldda [%o1 + 0x018] %asi, %f6)		! AX		(%f6 results at G7)

	faligndata	%f0, %f2, %f16			! FGA	Group12 (7-cycle stall)
	EX2(ldda [%o1 + 0x020] %asi, %f8)		! MS	        (%f8 results at G15)