📄 at91sam7s64.inc
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;- ----------------------------------------------------------------------------
;- ATMEL Microcontroller Software Support - ROUSSET -
;- ----------------------------------------------------------------------------
;- The software is delivered "AS IS" without warranty or condition of any
;- kind, either express, implied or statutory. This includes without
;- limitation any warranty or condition with respect to merchantability or
;- fitness for any particular purpose, or against the infringements of
;- intellectual property rights of others.
;- ----------------------------------------------------------------------------
;- File Name : AT91SAM7S64.h
;- Object : AT91SAM7S64 definitions
;- Generated : AT91 SW Application Group 09/01/2004 (10:02:06)
;-
;- CVS Reference : /AT91SAM7S64.pl/1.15/Mon Aug 30 08:48:08 2004//
;- CVS Reference : /SYS_SAM7Sxxx.pl/1.5/Mon Aug 30 13:17:50 2004//
;- CVS Reference : /MC_SAM02.pl/1.3/Mon Mar 08 09:22:24 2004//
;- CVS Reference : /UDP_1765B.pl/1.3/Fri Aug 02 14:45:38 2002//
;- CVS Reference : /AIC_1796B.pl/1.1.1.1/Fri Jun 28 09:36:48 2002//
;- CVS Reference : /PMC_SAM.pl/1.10/Mon May 10 12:08:48 2004//
;- CVS Reference : /PIO_1725D.pl/1.1.1.1/Fri Jun 28 09:36:48 2002//
;- CVS Reference : /DBGU_1754A.pl/1.4/Fri Jan 31 12:18:24 2003//
;- CVS Reference : /US_1739C.pl/1.2/Fri Jul 12 07:49:26 2002//
;- CVS Reference : /SPI2.pl/1.2/Fri Oct 17 08:13:40 2003//
;- CVS Reference : /SSC_1762A.pl/1.2/Fri Nov 08 13:26:40 2002//
;- CVS Reference : /TC_1753B.pl/1.4/Mon Mar 01 14:10:12 2004//
;- CVS Reference : /TWI_1761B.pl/1.4/Fri Feb 07 10:30:08 2003//
;- CVS Reference : /PDC_1734B.pl/1.2/Thu Nov 21 16:38:24 2002//
;- CVS Reference : /ADC_SAM.pl/1.7/Fri Oct 17 08:12:38 2003//
;- CVS Reference : /PWM_SAM.pl/1.5/Wed Apr 14 12:02:52 2004//
;- ----------------------------------------------------------------------------
;- Hardware register definition
;- *****************************************************************************
;- SOFTWARE API DEFINITION FOR System Peripherals
;- *****************************************************************************
^ 0 ;- AT91S_SYSC
SYSC_AIC_SMR # 128 ;- Source Mode Register
SYSC_AIC_SVR # 128 ;- Source Vector Register
SYSC_AIC_IVR # 4 ;- IRQ Vector Register
SYSC_AIC_FVR # 4 ;- FIQ Vector Register
SYSC_AIC_ISR # 4 ;- Interrupt Status Register
SYSC_AIC_IPR # 4 ;- Interrupt Pending Register
SYSC_AIC_IMR # 4 ;- Interrupt Mask Register
SYSC_AIC_CISR # 4 ;- Core Interrupt Status Register
# 8 ;- Reserved
SYSC_AIC_IECR # 4 ;- Interrupt Enable Command Register
SYSC_AIC_IDCR # 4 ;- Interrupt Disable Command Register
SYSC_AIC_ICCR # 4 ;- Interrupt Clear Command Register
SYSC_AIC_ISCR # 4 ;- Interrupt Set Command Register
SYSC_AIC_EOICR # 4 ;- End of Interrupt Command Register
SYSC_AIC_SPU # 4 ;- Spurious Vector Register
SYSC_AIC_DCR # 4 ;- Debug Control Register (Protect)
# 4 ;- Reserved
SYSC_AIC_FFER # 4 ;- Fast Forcing Enable Register
SYSC_AIC_FFDR # 4 ;- Fast Forcing Disable Register
SYSC_AIC_FFSR # 4 ;- Fast Forcing Status Register
# 180 ;- Reserved
SYSC_DBGU_CR # 4 ;- Control Register
SYSC_DBGU_MR # 4 ;- Mode Register
SYSC_DBGU_IER # 4 ;- Interrupt Enable Register
SYSC_DBGU_IDR # 4 ;- Interrupt Disable Register
SYSC_DBGU_IMR # 4 ;- Interrupt Mask Register
SYSC_DBGU_CSR # 4 ;- Channel Status Register
SYSC_DBGU_RHR # 4 ;- Receiver Holding Register
SYSC_DBGU_THR # 4 ;- Transmitter Holding Register
SYSC_DBGU_BRGR # 4 ;- Baud Rate Generator Register
# 28 ;- Reserved
SYSC_DBGU_C1R # 4 ;- Chip ID1 Register
SYSC_DBGU_C2R # 4 ;- Chip ID2 Register
SYSC_DBGU_FNTR # 4 ;- Force NTRST Register
# 180 ;- Reserved
SYSC_DBGU_RPR # 4 ;- Receive Pointer Register
SYSC_DBGU_RCR # 4 ;- Receive Counter Register
SYSC_DBGU_TPR # 4 ;- Transmit Pointer Register
SYSC_DBGU_TCR # 4 ;- Transmit Counter Register
SYSC_DBGU_RNPR # 4 ;- Receive Next Pointer Register
SYSC_DBGU_RNCR # 4 ;- Receive Next Counter Register
SYSC_DBGU_TNPR # 4 ;- Transmit Next Pointer Register
SYSC_DBGU_TNCR # 4 ;- Transmit Next Counter Register
SYSC_DBGU_PTCR # 4 ;- PDC Transfer Control Register
SYSC_DBGU_PTSR # 4 ;- PDC Transfer Status Register
# 216 ;- Reserved
SYSC_PIOA_PER # 4 ;- PIO Enable Register
SYSC_PIOA_PDR # 4 ;- PIO Disable Register
SYSC_PIOA_PSR # 4 ;- PIO Status Register
# 4 ;- Reserved
SYSC_PIOA_OER # 4 ;- Output Enable Register
SYSC_PIOA_ODR # 4 ;- Output Disable Registerr
SYSC_PIOA_OSR # 4 ;- Output Status Register
# 4 ;- Reserved
SYSC_PIOA_IFER # 4 ;- Input Filter Enable Register
SYSC_PIOA_IFDR # 4 ;- Input Filter Disable Register
SYSC_PIOA_IFSR # 4 ;- Input Filter Status Register
# 4 ;- Reserved
SYSC_PIOA_SODR # 4 ;- Set Output Data Register
SYSC_PIOA_CODR # 4 ;- Clear Output Data Register
SYSC_PIOA_ODSR # 4 ;- Output Data Status Register
SYSC_PIOA_PDSR # 4 ;- Pin Data Status Register
SYSC_PIOA_IER # 4 ;- Interrupt Enable Register
SYSC_PIOA_IDR # 4 ;- Interrupt Disable Register
SYSC_PIOA_IMR # 4 ;- Interrupt Mask Register
SYSC_PIOA_ISR # 4 ;- Interrupt Status Register
SYSC_PIOA_MDER # 4 ;- Multi-driver Enable Register
SYSC_PIOA_MDDR # 4 ;- Multi-driver Disable Register
SYSC_PIOA_MDSR # 4 ;- Multi-driver Status Register
# 4 ;- Reserved
SYSC_PIOA_PPUDR # 4 ;- Pull-up Disable Register
SYSC_PIOA_PPUER # 4 ;- Pull-up Enable Register
SYSC_PIOA_PPUSR # 4 ;- Pad Pull-up Status Register
# 4 ;- Reserved
SYSC_PIOA_ASR # 4 ;- Select A Register
SYSC_PIOA_BSR # 4 ;- Select B Register
SYSC_PIOA_ABSR # 4 ;- AB Select Status Register
# 36 ;- Reserved
SYSC_PIOA_OWER # 4 ;- Output Write Enable Register
SYSC_PIOA_OWDR # 4 ;- Output Write Disable Register
SYSC_PIOA_OWSR # 4 ;- Output Write Status Register
# 1876 ;- Reserved
SYSC_PMC_SCER # 4 ;- System Clock Enable Register
SYSC_PMC_SCDR # 4 ;- System Clock Disable Register
SYSC_PMC_SCSR # 4 ;- System Clock Status Register
# 4 ;- Reserved
SYSC_PMC_PCER # 4 ;- Peripheral Clock Enable Register
SYSC_PMC_PCDR # 4 ;- Peripheral Clock Disable Register
SYSC_PMC_PCSR # 4 ;- Peripheral Clock Status Register
# 4 ;- Reserved
SYSC_PMC_MOR # 4 ;- Main Oscillator Register
SYSC_PMC_MCFR # 4 ;- Main Clock Frequency Register
# 4 ;- Reserved
SYSC_PMC_PLLR # 4 ;- PLL Register
SYSC_PMC_MCKR # 4 ;- Master Clock Register
# 12 ;- Reserved
SYSC_PMC_PCKR # 32 ;- Programmable Clock Register
SYSC_PMC_IER # 4 ;- Interrupt Enable Register
SYSC_PMC_IDR # 4 ;- Interrupt Disable Register
SYSC_PMC_SR # 4 ;- Status Register
SYSC_PMC_IMR # 4 ;- Interrupt Mask Register
# 144 ;- Reserved
SYSC_RSTC_RCR # 4 ;- Reset Control Register
SYSC_RSTC_RSR # 4 ;- Reset Status Register
SYSC_RSTC_RMR # 4 ;- Reset Mode Register
# 20 ;- Reserved
SYSC_RTTC_RTMR # 4 ;- Real-time Mode Register
SYSC_RTTC_RTAR # 4 ;- Real-time Alarm Register
SYSC_RTTC_RTVR # 4 ;- Real-time Value Register
SYSC_RTTC_RTSR # 4 ;- Real-time Status Register
SYSC_PITC_PIMR # 4 ;- Period Interval Mode Register
SYSC_PITC_PISR # 4 ;- Period Interval Status Register
SYSC_PITC_PIVR # 4 ;- Period Interval Value Register
SYSC_PITC_PIIR # 4 ;- Period Interval Image Register
SYSC_WDTC_WDCR # 4 ;- Watchdog Control Register
SYSC_WDTC_WDMR # 4 ;- Watchdog Mode Register
SYSC_WDTC_WDSR # 4 ;- Watchdog Status Register
# 20 ;- Reserved
SYSC_SYSC_VREG # 4 ;- Voltage Regulator Mode Register
;- -------- VREG : (SYSC Offset: 0xd60) Voltage Regulator Mode Register --------
AT91C_SYSC_PSTDBY EQU (0x1:SHL:0) ;- (SYSC) Voltage Regulator Power Mode
;- *****************************************************************************
;- SOFTWARE API DEFINITION FOR Advanced Interrupt Controller
;- *****************************************************************************
^ 0 ;- AT91S_AIC
AIC_SMR # 128 ;- Source Mode Register
AIC_SVR # 128 ;- Source Vector Register
AIC_IVR # 4 ;- IRQ Vector Register
AIC_FVR # 4 ;- FIQ Vector Register
AIC_ISR # 4 ;- Interrupt Status Register
AIC_IPR # 4 ;- Interrupt Pending Register
AIC_IMR # 4 ;- Interrupt Mask Register
AIC_CISR # 4 ;- Core Interrupt Status Register
# 8 ;- Reserved
AIC_IECR # 4 ;- Interrupt Enable Command Register
AIC_IDCR # 4 ;- Interrupt Disable Command Register
AIC_ICCR # 4 ;- Interrupt Clear Command Register
AIC_ISCR # 4 ;- Interrupt Set Command Register
AIC_EOICR # 4 ;- End of Interrupt Command Register
AIC_SPU # 4 ;- Spurious Vector Register
AIC_DCR # 4 ;- Debug Control Register (Protect)
# 4 ;- Reserved
AIC_FFER # 4 ;- Fast Forcing Enable Register
AIC_FFDR # 4 ;- Fast Forcing Disable Register
AIC_FFSR # 4 ;- Fast Forcing Status Register
;- -------- AIC_SMR : (AIC Offset: 0x0) Control Register --------
AT91C_AIC_PRIOR EQU (0x7:SHL:0) ;- (AIC) Priority Level
AT91C_AIC_PRIOR_LOWEST EQU (0x0) ;- (AIC) Lowest priority level
AT91C_AIC_PRIOR_HIGHEST EQU (0x7) ;- (AIC) Highest priority level
AT91C_AIC_SRCTYPE EQU (0x3:SHL:5) ;- (AIC) Interrupt Source Type
AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE EQU (0x0:SHL:5) ;- (AIC) Internal Sources Code Label Level Sensitive
AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED EQU (0x1:SHL:5) ;- (AIC) Internal Sources Code Label Edge triggered
AT91C_AIC_SRCTYPE_EXT_HIGH_LEVEL EQU (0x2:SHL:5) ;- (AIC) External Sources Code Label High-level Sensitive
AT91C_AIC_SRCTYPE_EXT_POSITIVE_EDGE EQU (0x3:SHL:5) ;- (AIC) External Sources Code Label Positive Edge triggered
;- -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register --------
AT91C_AIC_NFIQ EQU (0x1:SHL:0) ;- (AIC) NFIQ Status
AT91C_AIC_NIRQ EQU (0x1:SHL:1) ;- (AIC) NIRQ Status
;- -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) --------
AT91C_AIC_DCR_PROT EQU (0x1:SHL:0) ;- (AIC) Protection Mode
AT91C_AIC_DCR_GMSK EQU (0x1:SHL:1) ;- (AIC) General Mask
;- *****************************************************************************
;- SOFTWARE API DEFINITION FOR Debug Unit
;- *****************************************************************************
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