📄 aic23micda.asm
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.title "AIC23.asm"
.mmregs
.bss audio_data,54
.bss audio_in,1000
;定义MCBSP0的各个寄存器
bsp0 .set 39h
drr20 .set 20h
drr10 .set 21h
dxr20 .set 22h
dxr10 .set 23h
spsa0 .set 38h
spcr10 .set 00h
spcr20 .set 01h
rcr10 .set 02h
rcr20 .set 03h
xcr10 .set 04h
xcr20 .set 05h
srgr10 .set 06h
srgr20 .set 07h
pcr0 .set 0eh
;clkmd .set 58h
cpldport1 .set 2000h
temp .set 060h
;延时时间
time_derive .set 01h
.def _c_int00
.data
audio_table:
.word 07ffeH,07e9cH,07a7cH,073b5H,06a6cH,060ebH,0539aH,0447aH,033deH,02223H
.word 012c7H,00000H,0ed39H,0dad9H,0c947H,0bb86H,0ac66H,09f15H,093ddH,08afdH
.word 08584H,08164H,08002H,08164H,08584H,08afdH,093ddH,09f15H,0ac66H,0bb86H
.word 0c947H,0dad9H,0ed38H,00000H,012c7H,02527H,033deH,0447aH,0539aH,060ebH
.word 06c23H,073b5H,07a7cH,07e9cH
.text
_c_int00: stm #7000h,swwsr ;等待0个时钟
STM #0b, CLKMD ;switch to DIV mode
TstStatu:
LDM CLKMD, A
AND #01b, A ;poll STATUS bit
BC TstStatu, ANEQ
STM #0100001111101111b, CLKMD ;switch to PLL
RPT #10000
NOP
; stm #97feh,clkmd ;时钟为10倍频,127X16个等待时钟,PLL开,分频关
stm #0000h,imr ;屏蔽所有中断
rsbx cpl ;清CPL位=0
;初始化cpu完毕,开始初始化MCBSP0
stm #0000h,ar1
portw ar1,cpldport1 ;切换字写到CPLD控制寄存器,转为控制字输出
rpt #400
nop ;等400个周期
ld #00h,dp
stm #spcr10,spsa0 ;接收复位
stm #0000h,bsp0
stm #spcr20,spsa0 ;发送、采样、帧复位
stm #0000h,bsp0
stm #spcr10,spsa0 ;12、11位为10,进入SPI模式,7位(DXENA)为0,不起动DX延时
stm #1000h,bsp0
stm #pcr0,spsa0 ;1位置1,数据下沿发送上沿接收,3位置1,帧同步为低电平有效,9位置1
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