📄 dec21143.h
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/****************************************************************************/
/* */
/* Copyright (c) 1999 by Accelerated Technology, Inc. */
/* */
/* PROPRIETARY RIGHTS of Accelerated Technology are involved in the subject */
/* matter of this material. All manufacturing, reproduction, use and sales */
/* rights pertaining to this subject matter are governed by the license */
/* agreement. The recipient of this software implicity accepts the terms */
/* of the license. */
/* */
/****************************************************************************/
/****************************************************************************/
/* */
/* FILENAME */
/* */
/* DEC21143.H */
/* */
/* DESCRIPTION */
/* */
/* This file contains the definitions and macros necessary for the */
/* DEC21143 driver. */
/* */
/* AUTHOR */
/* */
/* Uriah T. Pollock */
/* */
/* DATA STRUCTURES */
/* */
/* DEC21143_XDATA */
/* DEC21143_DESCRIPTOR */
/* */
/* FUNCTIONS */
/* */
/* NONE */
/* */
/* DEPENDENCIES */
/* */
/* "dev.h" */
/* */
/* HISTORY */
/* */
/* NAME DATE REMARKS */
/* */
/* Uriah T. Pollock 01/12/99 Created initial version 1.0 */
/* */
/****************************************************************************/
#include "net\inc\dev.h"
/* This macro defines the number of buffer descriptors to allocate. Note
that the one for RX will also allocate the same number of net buffers
for storing the incoming packets. */
#define DEC21143_MAX_RX_DESCRIPTORS 32
/* We compute the value by determining how many buffers are needed to send
a max sized ethernet packet. Then just to be safe we double it. */
#define DEC21143_MAX_TX_DESCRIPTORS ((((DEC21143_ETHERNET_MTU + \
DEC21143_ETHERNET_ADDRESS_SIZE) \
/ NET_MAX_BUFFER_SIZE) + 1) * 2)
/* Define the length of time we will wait for autonegotiation to
complete. */
#define DEC21143_NEOGITATION_TIMEOUT (5 * TICKS_PER_SECOND);
/* Define basic ethernet sizes. */
#define DEC21143_ETHERNET_CRC_SIZE 4
#define DEC21143_ETHERNET_ADDRESS_SIZE 6
#define DEC21143_ETHERNET_HEADER_SIZE 14
#define DEC21143_ETHERNET_MTU 1500
/* This macro defines which interrupts will be enabled on the
DEC chip. Since the same bits positions are used for enabling
interrupts and for getting status of interrupts this macro
is used in both places in the driver. */
#define DEC21143_INTERRUPTS (CSR5_TX_INTERRUPT | \
CSR5_TX_JABBER_TIMEOUT | \
CSR5_TX_UNDERFLOW | \
CSR5_RX_INTERRUPT | \
CSR5_RX_PROCESS_STOPPED | \
CSR5_RX_BUFFER_UNAVAIL | \
CSR5_FATAL_BUS_ERROR | \
CSR5_ABNORMAL_INTERRUPT_SUMMARY | \
CSR5_NORMAL_INTERRUPT_SUMMARY | \
CSR5_AUTONEGOTIATION_COMPLETE | \
CSR5_LINK_FAIL | \
CSR5_LINK_CHANGED)
/* Define the buffer descriptor structure used for sending and receiving
packets.
*/
typedef struct _dec21143_descriptor DEC21143_DESCRIPTOR;
struct _dec21143_descriptor
{
UINT32 status; /* own bit and status bits */
UINT32 control_count; /* buffer byte count and control bits */
NET_BUFFER *buffer; /* buffer address */
DEC21143_DESCRIPTOR *next_descriptor; /* next descriptor address */
};
/* Define values for the descriptor control and status fields. Some are
common between both RX and TX descriptor, DESx, some are only for
RX, RDESx, and some are only for TX, TDESx.
0 coorresponds to the status field
1 coorresponds to the control_count field
2 coorresponds to the buffer field
3 coorresponds to the next_descriptor field
*/
/* Common values. */
#define DES0_OWN_BIT (1 << 31)
#define DEC21143_SETUP_FRAME_LENGTH 192
#define DES1_END_OF_RING (1 << 25)
#define DES1_SECOND_ADDRESS_CHAINED (1 << 24)
/* RX Values. */
#define RDES0_CRC_ERROR (1 << 1)
#define RDES0_DRIBBLING_BIT (1 << 2)
#define RDES0_REPORT_ON_MII_ERROR (1 << 3)
#define RDES0_RECEIVE_WATCHDOG (1 << 4)
#define RDES0_FRAME_TYPE (1 << 5)
#define RDES0_COLLISION_SEEN (1 << 6)
#define RDES0_FRAME_TOO_LONG (1 << 7)
#define RDES0_LAST_DESCRIPTOR (1 << 8)
#define RDES0_FIRST_DESCRIPTOR (1 << 9)
#define RDES0_MULTICAST_FRAME (1 << 10)
#define RDES0_RUNT_FRAME (1 << 11)
#define RDES0_DATA_TYPE_MASK 0x00003000UL /* bits 13:12 */
#define RDES0_DESCRIPTOR_ERROR (1 << 14)
#define RDES0_ERROR_SUMMARY (1 << 15)
#define RDES0_FRAME_LENGTH_ISOLATE 0x3FFF0000Ul /* bits 29:16 */
#define RDES0_FILTERING_FAIL (1 << 30)
#define RDES0_OWN_BIT (1 << 31)
#define RDES1_END_OF_RING (1 << 25)
#define RDES1_SECOND_ADDRESS_CHAINED (1 << 24)
/* TX Values. */
#define TDES0_DEFERRED (1 << 0)
#define TDES0_UNDERFLOW_ERROR (1 << 1)
#define TDES0_LINK_FAIL_REPORT (1 << 2)
#define TDES0_COLLISION_COUNT_MASK 0x00000078UL /* bits 6:3 */
#define TDES0_HEARTBEAT_FAIL (1 << 7)
#define TDES0_EXCESSIVE_COLLISIONS (1 << 8)
#define TDES0_LATE_COLLISION (1 << 9)
#define TDES0_NO_CARRIER (1 << 10)
#define TDES0_LOSS_OF_CARRIER (1 << 11)
#define TDES0_TX_JABBER_TIMEOUT (1 << 14)
#define TDES0_ERROR_SUMMARY (1 << 15)
#define TDES0_OWN_BIT (1 << 31)
#define TDES1_BUFFER_1_SIZE_MASK 0x000003FFUL /* bits 10:0 */
#define TDES1_DISABLED_PADDING (1 << 23)
#define TDES1_SECOND_ADDRESS_CHAINED (1 << 24)
#define TDES1_TRANSMIT_END_OF_RING (1 << 25)
#define TDES1_ADD_CRC_DISABLE (1 << 26)
#define TDES1_SETUP_PACKET (1 << 27)
#define TDES1_FIRST_SEGMENT (1 << 29)
#define TDES1_LAST_SEGMENT (1 << 30)
#define TDES1_INTERRUPT_ON_COMPLETION (1 << 31)
#define TDES1_PERFECT_FILTERING 0x00000000UL /* bits 22 and 28 */
#define TDES1_HASH_FILTERING (1 << 22) /* bits 22 and 28 */
#define TDES1_INVERSE_FILTERING (1 << 28) /* bits 22 and 28 */
#define TDES1_HASH_ONLY_FILTERING ((1 << 22) | (1 << 28)) /* bits 22 and 28 */
#define TDES1_FILTERING_CLEAR (~((1 << 22) | (1 << 28))) /* bits 22 and 28 */
#define TDES1_COLLISIONS_ISOLATE ((1 << 3) | (1 << 4) | \
(1 << 5) | (1 << 6))
/* This structure is used to keep track of extended data that is required for
each registered DEC21143 device. */
typedef struct _dec21143_xdata
{
/* Declare the pointers to the TX and RX buffer descriptors. */
DEC21143_DESCRIPTOR *DEC21143_First_RX_Descriptor;
DEC21143_DESCRIPTOR *DEC21143_First_TX_Descriptor;
DEC21143_DESCRIPTOR *DEC21143_Current_RX_Descriptor;
DEC21143_DESCRIPTOR *DEC21143_Current_TX_Descriptor;
DEC21143_DESCRIPTOR *DEC21143_Previous_TX_Descriptor;
/* Declare the pointers used during packet reception. */
NET_BUFFER *DEC21143_Buffer_Ptr;
NET_BUFFER *DEC21143_Work_Ptr;
/* PCI Card ID. Used for accessing the card through the PCI
config registers. */
UINT32 DEC21143_PCI_ID;
/* Chip revision and a saved copy of CSR6 . */
UINT32 DEC21143_Saved_CSR6;
UINT16 DEC21143_Revision;
/* Data size counters used during packet reception. */
INT16 DEC21143_Total_Data_Size;
INT16 DEC21143_Current_Data_Size;
/* Receive errors. */
UINT16 DEC21143_CRC_Errors;
UINT16 DEC21143_Collisions_Seen;
UINT16 DEC21143_Frames_Too_Long;
UINT16 DEC21143_Runt_Frames;
UINT16 DEC21143_Descriptor_Errors;
/* Transmit errors. */
UINT16 DEC21143_Underflows;
UINT16 DEC21143_Collisions;
UINT16 DEC21143_Excessive_Collisions;
UINT16 DEC21143_Late_Collisions;
UINT16 DEC21143_No_Carriers;
UINT16 DEC21143_Loss_Of_Carriers;
UINT16 DEC21143_TX_Jabber_Timeouts;
/* Has the card been completly initialized? This is used when
the link changes speed after initialization is done. */
UINT8 DEC21143_Init_Completed;
/* Padding to keep everything word aligned. */
UINT8 pad0;
} DEC21143_XDATA;
/* Define the new macros for reading data from your Ethernet chip, and
writing data to the Ethernet chip.
*/
UINT32 DEC_IO_Read_Reg(INT);
void DEC_IO_Write_Reg(INT, UINT32);
#define OUTDW DEC_IO_Write_Reg
#define INDW DEC_IO_Read_Reg
#if defined(PROTECTED_MODE) && !defined(__BORLANDC__)
/*
* Define the new macros for reading data from your Ethernet chip, and
* writing data to the Ethernet chip.
*/
extern UINT8 inp(INT);
extern void outp(INT, UINT8);
extern INT inport(INT);
extern void outport(INT, INT);
#define OUTB(offset, value) outp ((INT16)offset, (UINT8)value)
#define OUTW(offset, value) outport ((INT16)offset, (INT16)value)
#define INB(offset) (UINT8)inp ((sshort)offset)
#define INW(offset) (ushort)inport ((ushort)offset)
#elif defined(PROTECTED_MODE) && defined(__BORLANDC__)
/*
* Define the new macros for reading data from your Ethernet chip, and
* writing data to the Ethernet chip.
*/
#define OUTB(offset, value) outp ((unsigned)offset, (INT)value)
#define OUTW(offset, value) outport ((INT)offset, (INT)value)
#define INB(offset) (UINT8)inp ((unsigned)offset)
#define INW(offset) (ushort)inport ((INT)offset)
#define ASM asm /* Used for some inline assembly. */
#elif !defined(PROTECTED_MODE) && defined(__BORLANDC__)
/*
* Define the new macros for reading data from your Ethernet chip, and
* writing data to the Ethernet chip.
*/
#define OUTB(offset, value) outportb ((INT16)offset, (UINT8)value)
#define OUTW(offset, value) outport ((INT16)offset, (INT16)value)
#define INB(offset) (UINT8)inportb ((sshort)offset)
#define INW(offset) (ushort)inpw ((ushort)offset)
#define ASM asm /* Used for some inline assembly. */
#elif defined (_MSC_VER) /* If Microsoft C is being used. */
/*
* Define the new macros for reading data from your Ethernet chip, and
* writing data to the Ethernet chip.
*/
#define OUTW(offset, value) (ushort)_outpw ((ushort)offset, (ushort)value)
#define INW(offset) (ushort)_inpw ((ushort)offset)
#define OUTB(offset, value) (sshort)_outp ((ushort)offset, (sshort)value)
#define INB(offset) (sshort)_inp ((ushort)offset)
#define ASM __asm /* used for inline assembly. */
#endif /* Port macros */
/* -------------------- DEC21143 registers -------------------------- */
/* Define the offsets for all the configuration registers
on the DEC21143 chip
*/
#define CFID 0x00
#define CFCS 0x04
#define CFRV 0x08
#define CFLT 0x0C
#define CBIO 0x10
#define CBMA 0x14
#define CCIS 0x28
#define CSID 0x2C
#define CBER 0x30
#define CCAP 0x34
#define CFIT 0x3C
#define CFDD 0x40
#define CWUA0 0x44
#define CWUA1 0x48
#define SOP0 0x4C
#define SOP1 0x50
#define CWUC 0x54
#define CCID 0xDC
#define CPMC 0xE0
/* Define the offsets for all the control and status registers
on the DEC21143 chip
*/
#define CSR0 0x00
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