simd.asi

Macros to emulate new microprocessor instructions.

;;;; SIMD.ASI ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; Agner Fog 2000 ;;;
;;                                                                           ;;
;;                 DEFINITION OF Pentium III INSTRUCTIONS                    ;;
;;                                                                           ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
.XLIST                                                                       ;;
;;                                                                           ;;
;;  Instructions:                                                            ;;
;;  To use Pentium III instructions with an assembler that doesn't support   ;;
;;  these, insert the following directive in your assembly file:             ;;
;;  INCLUDE SIMD.ASI                                                         ;;
;;                                                                           ;;
;;  This file is written in MASM 5.10 syntax and works with TASM version 3.0 ;;
;;  or higher and MASM version 5.10 or higher.                               ;;
;;  The following assemblers may cause problems:                             ;;
;;  MASM v. 5.10 has a bug that gives wrong jump addresses in 32 bit mode.   ;;
;;  TASM32 v. 4.0, 5.0, 5.0o, 5.0r have various bugs that make them crash    ;;
;;  in DOS or Windows or both when executing these macros.                   ;;
;;  Microsoft ML version 6.11 doesn't work with these macros when output     ;;
;;  is in COFF format with certain linkers.                                  ;;
;;                                                                           ;;
;;  The macros work in both 16 bit mode and 32 bit mode, provided that no    ;;
;;  prefixes are needed. Make sure that all memory operands can be addressed ;;
;;  with the default segment register to avoid segment prefixes. Any         ;;
;;  prefixes needed must be hard-coded with the DB directive.                ;;
;;                                                                           ;;
;;  Microprocessor specified must be .386 or higher.                         ;;
;;                                                                           ;;
;;  Note that operands containing space must be enclosed in angle brackets   ;;
;;  in order to be interpreted as single operands by the macros, example:    ;;
;;  MOVAPS XMM1, <[ESI + 16]>                                                ;;
;;  or rewrite the operand to avoid the spaces:                              ;;
;;  MOVAPS XMM1, [ESI+16]                                                    ;;
;;                                                                           ;;
;;  The size of memory operands should not be specified since the assemblers ;;
;;  have no definition for 128 bit (16 byte) memory operands.                ;;
;;                                                                           ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

IFDEF @version ; Microsoft assembler
  IF @version GE 614
    ; Assembler allready supports XMM instructions. Disable rest of file
    .xmm
    SIMDSUPPORTED EQU 1
  ELSE
    IF @version GE 600
      OPTION M510  ; Make compatible with MASM 5.10 syntax
    ENDIF
  ENDIF
ENDIF
IFNDEF SIMDSUPPORTED

; Macro used internally for examining whether parameters are mmx/xmm registers.
; mmx and xmm register names are replaced by corresponding general registers
; returned in PAR1 and PAR2. The type of register is returned in PAR1M and
; PAR2M (0 = integer register or memory, 1 = mmx register, 2 = xmm register).
XREGS MACRO R1, R2
  LOCAL I
  PAR1 EQU <R1>
  PAR1M = 0
  IRP M, <0,1,2,3,4,5,6,7>
    I = 9
    IFIDNI <MM&&M>, <R1>
      I = M
      PAR1M = 1
    ENDIF
    IFIDNI <XMM&&M>, <R1>
      I = M
      PAR1M = 2
    ENDIF
    IF I LT 9
      IRP F, <ax,cx,dx,bx,sp,bp,si,di>
        IF I EQ 0
          IF @WordSize GT 2
            PAR1 EQU <e&&&F>
          ELSE
            PAR1 EQU <F>
          ENDIF
          EXITM
        ENDIF
        I = I - 1
      ENDM
      EXITM
    ENDIF
  ENDM
  PAR2 EQU <R2>
  PAR2M = 0
  IRP M, <0,1,2,3,4,5,6,7>
    I = 9
    IFIDNI <MM&&M>, <R2>
      I = M
      PAR2M = 1
    ENDIF
    IFIDNI <XMM&&M>, <R2>
      I = M
      PAR2M = 2
    ENDIF
    IF I LT 9
      IRP F, <ax,cx,dx,bx,sp,bp,si,di>
        IF I EQ 0
          IF @WordSize GT 2
            PAR2 EQU <e&&&F>
          ELSE
            PAR2 EQU <F>
          ENDIF
          EXITM
        ENDIF
        I = I - 1
      ENDM
      EXITM
    ENDIF
  ENDM
ENDM

; Meta-macro for defining XMM or MMX instruction macro
; Parameters:
; OPNAME: name of instruction
; OPCODE: opcode byte
; R: specifies type of operands:
; DST    SRC    type
; 10H      1    32 bit integer register
; 20H      2    64 bit mmx register
; 40H      4    128 bit xmm register
; 80H      8    memory operand
; E: 1 if repeat prefix needed, 2 if extra immediate byte operand,
;    3 if both, 4 if DST is memory operand
; B: extra byte
XMMDEF MACRO OPNAME, OPCODE, R, E, B
  OPNAME MACRO DST, SRC, IMM
    LOCAL X, Y
    &XREGS <DST>, <SRC>
    IF R AND 0F0H ; check operand types
      &.ERRE (PAR1M SHL 5 AND R) OR (R AND 90H) AND PAR1M EQ 0
    ENDIF
    IF R AND 0FH
      &.ERRE (PAR2M SHL 1 AND R) OR (R AND 9H) AND PAR2M EQ 0
    ENDIF
    IF E AND 1 ; prefix
      DB 0F3H
    ENDIF
    X: ; model instruction:
    IF E AND 4
      BSF PAR2, @WordSize PTR (PAR1)
    ELSE
      IF PAR2M
        BSF PAR1, PAR2
      ELSE
        BSF PAR1, @WordSize PTR (PAR2)
      ENDIF
    ENDIF
    Y:
    ORG X+1 ; go back and change opcode byte
    DB OPCODE
    ORG Y
    IF E AND 2
      DB IMM ; immediate operand
    ENDIF
    IFNB <B>
      DB B ; immediate constant operand
    ENDIF
  ENDM
ENDM

; meta-macro for defining instruction macro with single memory operand.
; Parameters:
; OPNAME: instruction name
; OPCODE: opcode byte
; MODELINSTR: instruction to model after
XSINGDEF MACRO OPNAME, OPCODE, MODELINSTR
  OPNAME MACRO OP1
    LOCAL X, Y
    DB  0FH
    X:
    MODELINSTR  @WORDSIZE PTR [OP1], CL
    Y:
    ORG  X
    DB OPCODE
    ORG  Y
  ENDM
ENDM

; meta-macro for defining XMM move instruction macros with two directions
; Parameters:
; OPNAME: name of instruction
; OPCODE: opcode byte for read instruction (write instruction = same + 1)
; E: 1 if repeat prefix
XMOVDEF MACRO OPNAME, OPCODE, E
  OPNAME MACRO OP1, OP2
    LOCAL X, Y
    &&XREGS <OP1>, <OP2>
    IFNB <E>
      IF E EQ 1
        DB 0F3H  ; prefix
      ENDIF
    ENDIF
    X:
    IF PAR1M
      IF PAR2M
        BSF PAR1, PAR2
      ELSE
        BSF PAR1, @WordSize PTR (PAR2)
      ENDIF
      Y:
      ORG X+1
      DB OPCODE
    ELSE
      BSF PAR2, @WordSize PTR (PAR1)
      Y:
      ORG X+1
      DB OPCODE + 1
    ENDIF
    ORG Y
  ENDM
ENDM

; define most xmm instructions
XMMDEF addps, 58H, 4CH, 0
XMMDEF addss, 58H, 4CH, 1
XMMDEF andnps, 55H, 4CH, 0
XMMDEF andps, 54H, 4CH, 0
XMMDEF cvtpi2ps, 2AH, 4AH, 0
XMMDEF cvtps2pi, 2DH, 2CH, 0
XMMDEF cvtsi2ss, 2AH, 49H, 1
XMMDEF cvtss2si, 2DH, 1CH, 1
XMMDEF cvttps2pi, 2CH, 2CH, 0
XMMDEF cvttss2si, 2CH, 1CH, 1
XMMDEF divps, 5EH, 4CH, 0
XMMDEF divss, 5EH, 4CH, 1
XMMDEF maxps, 5FH, 4CH, 0
XMMDEF maxss, 5FH, 4CH, 1
XMMDEF minps, 5DH, 4CH, 0
XMMDEF minss, 5DH, 4CH, 1
XMMDEF movhlps, 12H, 4CH, 0
XMMDEF movlhps, 16H, 4CH, 0
XMMDEF movmskps, 50H, 14H, 0
XMMDEF movntps, 2BH, 84H, 4
XMMDEF mulps, 59H, 4CH, 0
XMMDEF mulss, 59H, 4CH, 1
XMMDEF orps, 56H, 4CH, 0
XMMDEF rcpps, 53H, 4CH, 0
XMMDEF rcpss, 53H, 4CH, 1
XMMDEF rsqrtps, 52H, 4CH, 0
XMMDEF rsqrtss, 52H, 4CH, 1
XMMDEF shufps, 0C6H, 4CH, 2
XMMDEF sqrtps, 51H, 4CH, 0
XMMDEF sqrtss, 51H, 4CH, 1
XMMDEF subps, 5CH, 4CH, 0
XMMDEF subss, 5CH, 4CH, 1
XMMDEF unpckhps, 15H, 4CH, 0
XMMDEF unpcklps, 14H, 4CH, 0
XMMDEF xorps, 57H, 4CH, 0

; define xmm compare instructions
XMMDEF cmpps, 0C2H, 4CH, 2
XMMDEF cmpeqps, 0C2H, 4CH, 0, 0
XMMDEF cmpltps, 0C2H, 4CH, 0, 1
XMMDEF cmpleps, 0C2H, 4CH, 0, 2
XMMDEF cmpunordps, 0C2H, 4CH, 0, 3
XMMDEF cmpneqps, 0C2H, 4CH, 0, 4
XMMDEF cmpnltps, 0C2H, 4CH, 0, 5
XMMDEF cmpnleps, 0C2H, 4CH, 0, 6
XMMDEF cmpordps, 0C2H, 4CH, 0, 7
XMMDEF cmpss, 0C2H, 4CH, 3
XMMDEF cmpeqss, 0C2H, 4CH, 1, 0
XMMDEF cmpltss, 0C2H, 4CH, 1, 1
XMMDEF cmpless, 0C2H, 4CH, 1, 2
XMMDEF cmpunordss, 0C2H, 4CH, 1, 3
XMMDEF cmpneqss, 0C2H, 4CH, 1, 4
XMMDEF cmpnltss, 0C2H, 4CH, 1, 5
XMMDEF cmpnless, 0C2H, 4CH, 1, 6
XMMDEF cmpordss, 0C2H, 4CH, 1, 7
XMMDEF comiss, 2FH, 4CH, 0
XMMDEF ucomiss, 2EH, 4CH, 0

; define mmx instructions not in Pentium II
XMMDEF pavgb, 0E0H, 2AH, 0
XMMDEF pavgw, 0E3H, 2AH, 0
XMMDEF pextrw, 0C5H, 1AH, 2
XMMDEF pinsrw, 0C4H, 29H, 2
XMMDEF pmaxsw, 0EEH, 2AH, 0
XMMDEF pmaxub, 0DEH, 2AH, 0
XMMDEF pminsw, 0EAH, 2AH, 0
XMMDEF pminub, 0DAH, 2AH, 0
XMMDEF pmovmskb, 0D7H, 1AH, 0
XMMDEF pmulhuw, 0E4H, 2AH, 0
XMMDEF psadbw, 0F6H, 2AH, 0
XMMDEF pshufw, 70H, 2AH, 2
XMMDEF maskmovq, 0F7H, 22H, 0
XMMDEF movntq, 0E7H, 82H, 4

; define instructions with single memory operand
XSINGDEF fxsave, 0AEH, ROL
XSINGDEF fxrstor, 0AEH, ROR
XSINGDEF ldmxcsr, 0AEH, RCL
XSINGDEF stmxcsr, 0AEH, RCR
XSINGDEF prefetchnta, 18H, ROL
XSINGDEF prefetcht0, 18H, ROR
XSINGDEF prefetcht1, 18H, RCL
XSINGDEF prefetcht2, 18H, RCR

; define move instructions
XMOVDEF movaps, 28H
XMOVDEF movhps, 16H
XMOVDEF movlps, 12H
XMOVDEF movups, 10H
XMOVDEF movss, 10H, 1

; define instructions without parameters
SFENCE   MACRO
        DB      0FH, 0AEH, 0F8H
ENDM

; purge temporary macros:
PURGE XMMDEF,XSINGDEF,XMOVDEF

ENDIF

.LIST