📄 video1394.c
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/* * video1394.c - video driver for OHCI 1394 boards * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au> * Peter Schlaile <udbz@rz.uni-karlsruhe.de> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */#include <linux/config.h>#include <linux/kernel.h>#include <linux/list.h>#include <linux/slab.h>#include <linux/interrupt.h>#include <linux/wait.h>#include <linux/errno.h>#include <linux/module.h>#include <linux/init.h>#include <linux/pci.h>#include <linux/fs.h>#include <linux/poll.h>#include <linux/smp_lock.h>#include <asm/byteorder.h>#include <asm/atomic.h>#include <asm/io.h>#include <asm/uaccess.h>#include <linux/proc_fs.h>#include <linux/tqueue.h>#include <linux/delay.h>#include <linux/devfs_fs_kernel.h>#include <asm/pgtable.h>#include <asm/page.h>#include <linux/sched.h>#include <asm/segment.h>#include <linux/types.h>#include <linux/wrapper.h>#include <linux/vmalloc.h>#include <linux/timex.h>#include <linux/mm.h>#include "ieee1394.h"#include "ieee1394_types.h"#include "hosts.h"#include "ieee1394_core.h"#include "highlevel.h"#include "video1394.h"#include "ohci1394.h"#define VIDEO1394_MAJOR 172#define ISO_CHANNELS 64#define ISO_RECEIVE 0#define ISO_TRANSMIT 1#ifndef virt_to_page#define virt_to_page(x) MAP_NR(x)#endif#ifndef vmalloc_32#define vmalloc_32(x) vmalloc(x)#endifstruct it_dma_prg { struct dma_cmd begin; quadlet_t data[4]; struct dma_cmd end; quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */};struct dma_iso_ctx { struct ti_ohci *ohci; int ctx; int channel; int last_buffer; int * next_buffer; /* For ISO Transmit of video packets to write the correct SYT field into the next block */ unsigned int num_desc; unsigned int buf_size; unsigned int frame_size; unsigned int packet_size; unsigned int left_size; unsigned int nb_cmd; unsigned char *buf; struct dma_cmd **ir_prg; struct it_dma_prg **it_prg; unsigned int *buffer_status; struct timeval *buffer_time; /* time when the buffer was received */ unsigned int *last_used_cmd; /* For ISO Transmit with variable sized packets only ! */ int ctrlClear; int ctrlSet; int cmdPtr; int ctxMatch; wait_queue_head_t waitq; spinlock_t lock; unsigned int syt_offset; int flags;};struct video_card { struct ti_ohci *ohci; struct list_head list; int id; devfs_handle_t devfs; struct dma_iso_ctx **ir_context; struct dma_iso_ctx **it_context; struct dma_iso_ctx *current_ctx;};#ifdef CONFIG_IEEE1394_VERBOSEDEBUG#define VIDEO1394_DEBUG#endif#ifdef DBGMSG#undef DBGMSG#endif#ifdef VIDEO1394_DEBUG#define DBGMSG(card, fmt, args...) \printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)#else#define DBGMSG(card, fmt, args...)#endif/* print general (card independent) information */#define PRINT_G(level, fmt, args...) \printk(level "video1394: " fmt "\n" , ## args)/* print card specific information */#define PRINT(level, card, fmt, args...) \printk(level "video1394_%d: " fmt "\n" , card , ## args)static void irq_handler(int card, quadlet_t isoRecvIntEvent, quadlet_t isoXmitIntEvent);static LIST_HEAD(video1394_cards);static spinlock_t video1394_cards_lock = SPIN_LOCK_UNLOCKED;static devfs_handle_t devfs_handle;static struct hpsb_highlevel *hl_handle = NULL;static struct video_template video_tmpl = { irq_handler };/* Code taken from bttv.c *//*******************************//* Memory management functions *//*******************************/#define MDEBUG(x) do { } while(0) /* Debug memory management *//* [DaveM] I've recoded most of this so that: * 1) It's easier to tell what is happening * 2) It's more portable, especially for translating things * out of vmalloc mapped areas in the kernel. * 3) Less unnecessary translations happen. * * The code used to assume that the kernel vmalloc mappings * existed in the page tables of every process, this is simply * not guaranteed. We now use pgd_offset_k which is the * defined way to get at the kernel page tables. *//* Given PGD from the address space's page table, return the kernel * virtual mapping of the physical memory mapped at ADR. */static inline unsigned long uvirt_to_kva(pgd_t *pgd, unsigned long adr){ unsigned long ret = 0UL; pmd_t *pmd; pte_t *ptep, pte; if (!pgd_none(*pgd)) { pmd = pmd_offset(pgd, adr); if (!pmd_none(*pmd)) { ptep = pte_offset(pmd, adr); pte = *ptep; if(pte_present(pte)) { ret = (unsigned long) page_address(pte_page(pte)); ret |= (adr & (PAGE_SIZE - 1)); } } } MDEBUG(printk("uv2kva(%lx-->%lx)", adr, ret)); return ret;}static inline unsigned long uvirt_to_bus(unsigned long adr) { unsigned long kva, ret; kva = uvirt_to_kva(pgd_offset(current->mm, adr), adr); ret = virt_to_bus((void *)kva); MDEBUG(printk("uv2b(%lx-->%lx)", adr, ret)); return ret;}static inline unsigned long kvirt_to_bus(unsigned long adr) { unsigned long va, kva, ret; va = VMALLOC_VMADDR(adr); kva = uvirt_to_kva(pgd_offset_k(va), va); ret = virt_to_bus((void *)kva); MDEBUG(printk("kv2b(%lx-->%lx)", adr, ret)); return ret;}/* Here we want the physical address of the memory. * This is used when initializing the contents of the * area and marking the pages as reserved. */static inline unsigned long kvirt_to_pa(unsigned long adr) { unsigned long va, kva, ret; va = VMALLOC_VMADDR(adr); kva = uvirt_to_kva(pgd_offset_k(va), va); ret = __pa(kva); MDEBUG(printk("kv2pa(%lx-->%lx)", adr, ret)); return ret;}static void * rvmalloc(unsigned long size){ void * mem; unsigned long adr, page; mem=vmalloc_32(size); if (mem) { memset(mem, 0, size); /* Clear the ram out, no junk to the user */ adr=(unsigned long) mem; while (size > 0) { page = kvirt_to_pa(adr); mem_map_reserve(virt_to_page(__va(page))); adr+=PAGE_SIZE; size-=PAGE_SIZE; } } return mem;}static void rvfree(void * mem, unsigned long size){ unsigned long adr, page; if (mem) { adr=(unsigned long) mem; while (size > 0) { page = kvirt_to_pa(adr); mem_map_unreserve(virt_to_page(__va(page))); adr+=PAGE_SIZE; size-=PAGE_SIZE; } vfree(mem); }}/* End of code taken from bttv.c */static int free_dma_iso_ctx(struct dma_iso_ctx **d){ int i; struct ti_ohci *ohci; if ((*d)==NULL) return -1; ohci = (struct ti_ohci *)(*d)->ohci; DBGMSG(ohci->id, "Freeing dma_iso_ctx %d", (*d)->ctx); ohci1394_stop_context(ohci, (*d)->ctrlClear, NULL); if ((*d)->buf) rvfree((void *)(*d)->buf, (*d)->num_desc * (*d)->buf_size); if ((*d)->ir_prg) { for (i=0;i<(*d)->num_desc;i++) if ((*d)->ir_prg[i]) kfree((*d)->ir_prg[i]); kfree((*d)->ir_prg); } if ((*d)->it_prg) { for (i=0;i<(*d)->num_desc;i++) if ((*d)->it_prg[i]) kfree((*d)->it_prg[i]); kfree((*d)->it_prg); } if ((*d)->buffer_status) kfree((*d)->buffer_status); if ((*d)->buffer_time) kfree((*d)->buffer_time); if ((*d)->last_used_cmd) kfree((*d)->last_used_cmd); if ((*d)->next_buffer) kfree((*d)->next_buffer); kfree(*d); *d = NULL; return 0;}static struct dma_iso_ctx *alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int ctx, int num_desc, int buf_size, int channel, unsigned int packet_size){ struct dma_iso_ctx *d=NULL; int i; d = (struct dma_iso_ctx *)kmalloc(sizeof(struct dma_iso_ctx), GFP_KERNEL); if (d==NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate dma_iso_ctx"); return NULL; } memset(d, 0, sizeof(struct dma_iso_ctx)); d->ohci = (void *)ohci; d->ctx = ctx; d->channel = channel; d->num_desc = num_desc; d->frame_size = buf_size; if (buf_size%PAGE_SIZE) d->buf_size = buf_size + PAGE_SIZE - (buf_size%PAGE_SIZE); else d->buf_size = buf_size; d->last_buffer = -1; d->buf = NULL; d->ir_prg = NULL; init_waitqueue_head(&d->waitq); d->buf = rvmalloc(d->num_desc * d->buf_size); if (d->buf == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate dma buffer"); free_dma_iso_ctx(&d); return NULL; } memset(d->buf, 0, d->num_desc * d->buf_size); if (type == ISO_RECEIVE) { d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx; d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx; d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx; d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx; d->ir_prg = kmalloc(d->num_desc * sizeof(struct dma_cmd *), GFP_KERNEL); if (d->ir_prg == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate dma ir prg"); free_dma_iso_ctx(&d); return NULL; } memset(d->ir_prg, 0, d->num_desc * sizeof(struct dma_cmd *)); d->nb_cmd = d->buf_size / PAGE_SIZE + 1; d->left_size = (d->frame_size % PAGE_SIZE) ? d->frame_size % PAGE_SIZE : PAGE_SIZE; for (i=0;i<d->num_desc;i++) { d->ir_prg[i] = kmalloc(d->nb_cmd * sizeof(struct dma_cmd), GFP_KERNEL); if (d->ir_prg[i] == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate dma ir prg"); free_dma_iso_ctx(&d); return NULL; } } } else { /* ISO_TRANSMIT */ d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx; d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx; d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx; d->it_prg = kmalloc(d->num_desc * sizeof(struct it_dma_prg *), GFP_KERNEL); if (d->it_prg == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate dma it prg"); free_dma_iso_ctx(&d); return NULL; } memset(d->it_prg, 0, d->num_desc*sizeof(struct it_dma_prg *)); d->packet_size = packet_size; if (PAGE_SIZE % packet_size || packet_size>4096) { PRINT(KERN_ERR, ohci->id, "Packet size %d (page_size: %ld) " "not yet supported\n", packet_size, PAGE_SIZE); free_dma_iso_ctx(&d); return NULL; } d->nb_cmd = d->frame_size / d->packet_size; if (d->frame_size % d->packet_size) { d->nb_cmd++; d->left_size = d->frame_size % d->packet_size; } else d->left_size = d->packet_size; for (i=0;i<d->num_desc;i++) { d->it_prg[i] = kmalloc(d->nb_cmd * sizeof(struct it_dma_prg), GFP_KERNEL); if (d->it_prg[i] == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate dma it prg"); free_dma_iso_ctx(&d); return NULL; } } } d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int), GFP_KERNEL); d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval), GFP_KERNEL); d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int), GFP_KERNEL); d->next_buffer = kmalloc(d->num_desc * sizeof(int), GFP_KERNEL); if (d->buffer_status == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate buffer_status"); free_dma_iso_ctx(&d); return NULL; } if (d->buffer_time == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate buffer_time"); free_dma_iso_ctx(&d); return NULL; } if (d->last_used_cmd == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate last_used_cmd"); free_dma_iso_ctx(&d); return NULL; } if (d->next_buffer == NULL) { PRINT(KERN_ERR, ohci->id, "Failed to allocate next_buffer"); free_dma_iso_ctx(&d); return NULL; } memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int)); memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval)); memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int)); memset(d->next_buffer, -1, d->num_desc * sizeof(int)); spin_lock_init(&d->lock); PRINT(KERN_INFO, ohci->id, "Iso %s DMA: %d buffers " "of size %d allocated for a frame size %d, each with %d prgs", (type==ISO_RECEIVE) ? "receive" : "transmit", d->num_desc, d->buf_size, d->frame_size, d->nb_cmd); return d;}static void reset_ir_status(struct dma_iso_ctx *d, int n){ int i; d->ir_prg[n][0].status = 4; d->ir_prg[n][1].status = PAGE_SIZE-4; for (i=2;i<d->nb_cmd-1;i++) d->ir_prg[n][i].status = PAGE_SIZE; d->ir_prg[n][i].status = d->left_size;}static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags){ struct dma_cmd *ir_prg = d->ir_prg[n]; unsigned long buf = (unsigned long)d->buf+n*d->buf_size; int i; /* the first descriptor will read only 4 bytes */ ir_prg[0].control = DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | DMA_CTL_BRANCH | 4; /* set the sync flag */ if (flags & VIDEO1394_SYNC_FRAMES) ir_prg[0].control |= DMA_CTL_WAIT; ir_prg[0].address = kvirt_to_bus(buf); ir_prg[0].branchAddress = (virt_to_bus(&(ir_prg[1].control)) & 0xfffffff0) | 0x1; /* the second descriptor will read PAGE_SIZE-4 bytes */ ir_prg[1].control = DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | DMA_CTL_BRANCH | (PAGE_SIZE-4); ir_prg[1].address = kvirt_to_bus(buf+4); ir_prg[1].branchAddress = (virt_to_bus(&(ir_prg[2].control)) & 0xfffffff0) | 0x1; for (i=2;i<d->nb_cmd-1;i++) { ir_prg[i].control = DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | DMA_CTL_BRANCH | PAGE_SIZE; ir_prg[i].address = kvirt_to_bus(buf+(i-1)*PAGE_SIZE); ir_prg[i].branchAddress = (virt_to_bus(&(ir_prg[i+1].control)) & 0xfffffff0) | 0x1; } /* the last descriptor will generate an interrupt */ ir_prg[i].control = DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size; ir_prg[i].address = kvirt_to_bus(buf+(i-1)*PAGE_SIZE);} static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags){ struct ti_ohci *ohci = (struct ti_ohci *)d->ohci; int i; d->flags = flags; ohci1394_stop_context(ohci, d->ctrlClear, NULL); for (i=0;i<d->num_desc;i++) { initialize_dma_ir_prg(d, i, flags); reset_ir_status(d, i); } /* reset the ctrl register */ reg_write(ohci, d->ctrlClear, 0xf0000000); /* Set bufferFill */ reg_write(ohci, d->ctrlSet, 0x80000000); /* Set isoch header */ if (flags & VIDEO1394_INCLUDE_ISO_HEADERS) reg_write(ohci, d->ctrlSet, 0x40000000); /* Set the context match register to match on all tags, sync for sync tag, and listen to d->channel */ reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel); /* Set up isoRecvIntMask to generate interrupts */ reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);}/* find which context is listening to this channel */int ir_ctx_listening(struct video_card *video, int channel){ int i; struct ti_ohci *ohci = video->ohci;
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