lpm_rom0.fit.eqn

s盒设计源程序 可以用语DES设计

C1L5 = AMPP_FUNCTION(C1_OK_TO_UPDATE_IR_Q, P1_state[8]);


--C1L1 is sld_hub:sld_hub_inst|BROADCAST_ENA~27 at LC_X7_Y13_N8
--operation mode is normal

C1L1 = AMPP_FUNCTION(L5_Q[0], Q1_dffe1a[2], Q1_dffe1a[1], C1L5);


--L1_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3] at LC_X6_Y11_N2
--operation mode is normal

L1_Q[3] = AMPP_FUNCTION(!A1L51, L2_Q[3], L6_Q[3], L3_Q[0], !C1L2, C1L71);


--K1_safe_q[1] is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|safe_q[1] at LC_X5_Y11_N6
--operation mode is arithmetic

K1_safe_q[1] = AMPP_FUNCTION(!A1L51, F1L31, K1_safe_q[1], !L1_Q[3], F1L82, K1L2, K1L3);

--K1L5 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|counter_cella1~COUT at LC_X5_Y11_N6
--operation mode is arithmetic

K1L5 = AMPP_FUNCTION(K1_safe_q[1], K1L2);

--K1L6 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|counter_cella1~COUTCOUT1 at LC_X5_Y11_N6
--operation mode is arithmetic

K1L6 = AMPP_FUNCTION(K1_safe_q[1], K1L3);


--L1_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] at LC_X6_Y11_N8
--operation mode is normal

L1_Q[1] = AMPP_FUNCTION(!A1L51, L2_Q[1], L6_Q[1], L3_Q[0], !C1L2, C1L71);


--K1_safe_q[0] is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|safe_q[0] at LC_X5_Y11_N5
--operation mode is arithmetic

K1_safe_q[0] = AMPP_FUNCTION(!A1L51, F1L31, K1_safe_q[0], !L1_Q[3], F1L82);

--K1L2 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|counter_cella0~COUT at LC_X5_Y11_N5
--operation mode is arithmetic

K1L2 = AMPP_FUNCTION(K1_safe_q[0]);

--K1L3 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|counter_cella0~COUTCOUT1_3 at LC_X5_Y11_N5
--operation mode is arithmetic

K1L3 = AMPP_FUNCTION(K1_safe_q[0]);


--K1_safe_q[2] is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|safe_q[2] at LC_X5_Y11_N7
--operation mode is arithmetic

K1_safe_q[2] = AMPP_FUNCTION(!A1L51, K1_safe_q[2], F1L31, !L1_Q[3], F1L82, K1L5, K1L6);

--K1L8 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|counter_cella2~COUT at LC_X5_Y11_N7
--operation mode is arithmetic

K1L8 = AMPP_FUNCTION(K1_safe_q[2], K1L5);

--K1L9 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|counter_cella2~COUTCOUT1_2 at LC_X5_Y11_N7
--operation mode is arithmetic

K1L9 = AMPP_FUNCTION(K1_safe_q[2], K1L6);


--K1_safe_q[3] is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|lpm_counter:ram_rom_data_shift_cntr_reg_rtl_1|cntr_re8:auto_generated|safe_q[3] at LC_X5_Y11_N8
--operation mode is normal

K1_safe_q[3] = AMPP_FUNCTION(!A1L51, F1L31, K1_safe_q[3], !L1_Q[3], F1L82, K1L8, K1L9);


--F1L72 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~34 at LC_X8_Y11_N9
--operation mode is normal

F1L72 = AMPP_FUNCTION(K1_safe_q[2], K1_safe_q[0], K1_safe_q[3]);


--F1L21 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1 at LC_X8_Y11_N6
--operation mode is normal

F1L21 = AMPP_FUNCTION(L1_Q[3], F1L72, L1_Q[1], K1_safe_q[1]);


--F1L31 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~3 at LC_X8_Y11_N2
--operation mode is normal

F1L31 = AMPP_FUNCTION(L1_Q[1], P1_state[4], F1L01, L1_Q[2]);


--F1L71 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[0]~72 at LC_X8_Y11_N3
--operation mode is normal

F1L71 = AMPP_FUNCTION(F1L21, F1L31);


--F1L62 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~0 at LC_X8_Y11_N8
--operation mode is normal

F1L62 = AMPP_FUNCTION(F1L72, L1_Q[1], K1_safe_q[1]);


--F1_ram_rom_incr_addr is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr at LC_X8_Y11_N5
--operation mode is normal

F1_ram_rom_incr_addr = AMPP_FUNCTION(L1_Q[2], P1_state[8], F1L01, F1L62);


--L1_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] at LC_X6_Y11_N6
--operation mode is normal

L1_Q[0] = AMPP_FUNCTION(!A1L51, L2_Q[0], L6_Q[0], L3_Q[0], !C1L2, C1L71);


--F1L11 is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~11 at LC_X8_Y11_N7
--operation mode is normal

F1L11 = AMPP_FUNCTION(P1_state[4], F1L01, L1_Q[3]);


--L6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0] at LC_X6_Y12_N8
--operation mode is normal

L6_Q[0] = AMPP_FUNCTION(!A1L51, P1_state[4], L6_Q[1], F1_is_in_use_reg, !C1L2, L6L4);


--G2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0] at LC_X7_Y14_N6
--operation mode is normal

G2_WORD_SR[0] = AMPP_FUNCTION(!A1L51, G2L52, G2L42, G2_WORD_SR[1], G2_word_counter[0], !G1_clear_signal, P1_state[4], C1L4);


--C1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG at LC_X5_Y12_N2
--operation mode is normal

C1_HUB_BYPASS_REG = AMPP_FUNCTION(!A1L51, C1L01, VCC);


--Q1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_bje:auto_generated|dffe1a[0] at LC_X7_Y13_N2
--operation mode is normal

Q1_dffe1a[0] = AMPP_FUNCTION(!A1L51, L6_Q[1], L6_Q[3], L6_Q[2], C1L22, !C1L2, C1L7);


--C1L11 is sld_hub:sld_hub_inst|HUB_TDO~350 at LC_X6_Y11_N1
--operation mode is normal

C1L11 = AMPP_FUNCTION(C1_HUB_BYPASS_REG, Q1_dffe1a[0], G2_WORD_SR[0]);

--L5_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] at LC_X6_Y11_N1
--operation mode is normal

L5_Q[0] = AMPP_FUNCTION(!A1L51, altera_internal_jtag, VCC, GND, C1L51);


--F1_bypass_reg_out is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out at LC_X8_Y14_N0
--operation mode is normal

F1_bypass_reg_out = AMPP_FUNCTION(!A1L51, altera_internal_jtag, !C1L2, C1L42);


--C1L31 is sld_hub:sld_hub_inst|HUB_TDO~358 at LC_X9_Y11_N6
--operation mode is normal

C1L31 = AMPP_FUNCTION(F1_ram_rom_data_reg[0], L1_Q[1], L1_Q[2], F1_bypass_reg_out);


--G1_WORD_SR[0] is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:no_name_gen:info_rom_sr|WORD_SR[0] at LC_X9_Y13_N4
--operation mode is normal

G1_WORD_SR[0] = AMPP_FUNCTION(!A1L51, G1_WORD_SR[1], G1_word_counter[1], P1_state[4], G1L51, !G1_clear_signal, F1L9);


--C1L21 is sld_hub:sld_hub_inst|HUB_TDO~356 at LC_X9_Y11_N7
--operation mode is normal

C1L21 = AMPP_FUNCTION(L1_Q[0], G1_WORD_SR[0], L4_Q[0], C1L31);


--C1L72 is sld_hub:sld_hub_inst|process12~0 at LC_X7_Y12_N7
--operation mode is normal

C1L72 = AMPP_FUNCTION(P1_state[4], P1_state[3]);


--P1_state[7] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7] at LC_X9_Y12_N6
--operation mode is normal

P1_state[7] = AMPP_FUNCTION(!A1L51, A1L71, P1_state[6], VCC);


--C1L8 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~0 at LC_X7_Y13_N4
--operation mode is normal

C1L8 = AMPP_FUNCTION(L4_Q[0], P1_state[5], C1_OK_TO_UPDATE_IR_Q);


--L6_Q[3] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[3] at LC_X6_Y12_N2
--operation mode is normal

L6_Q[3] = AMPP_FUNCTION(!A1L51, P1_state[4], L6_Q[4], F1_ir_loaded_address_reg[2], !C1L2, L6L4);


--F1_ir_loaded_address_reg[1] is altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1] at LC_X7_Y11_N8
--operation mode is normal

F1_ir_loaded_address_reg[1] = AMPP_FUNCTION(!A1L51, J1_safe_q[1], !L1_Q[0], F1L41);


--L6_Q[5] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[5] at LC_X5_Y12_N4
--operation mode is normal

L6_Q[5] = AMPP_FUNCTION(!A1L51, C1L01, !C1L2, C1_IRSR_ENA);


--Q1_dffe1a[3] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_bje:auto_generated|dffe1a[3] at LC_X7_Y13_N1
--operation mode is normal

Q1_dffe1a[3] = AMPP_FUNCTION(!A1L51, L6_Q[1], L6_Q[3], L6_Q[2], C1L22, !C1L2, C1L7);


--L6L3 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]~102 at LC_X7_Y12_N8
--operation mode is normal

L6L3 = AMPP_FUNCTION(L6_Q[5], L6_Q[3], P1_state[4], Q1_dffe1a[3]);


--L6L4 is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]~103 at LC_X7_Y12_N5
--operation mode is normal

L6L4 = AMPP_FUNCTION(C1_jtag_debug_mode_usr1, P1_state[3], P1_state[4], L6L3);


--Q1_dffe1a[7] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_bje:auto_generated|dffe1a[7] at LC_X7_Y13_N3
--operation mode is normal

Q1_dffe1a[7] = AMPP_FUNCTION(!A1L51, L6_Q[1], L6_Q[3], L6_Q[2], C1L22, !C1L2, C1L7);