📄 lpm_rom0.map.rpt
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; stratix_ram_block.inc ; yes ; e:/quartus2/libraries/megafunctions/stratix_ram_block.inc ;
; lpm_mux.inc ; yes ; e:/quartus2/libraries/megafunctions/lpm_mux.inc ;
; lpm_decode.inc ; yes ; e:/quartus2/libraries/megafunctions/lpm_decode.inc ;
; aglobal42.inc ; yes ; e:/quartus2/libraries/megafunctions/aglobal42.inc ;
; altsyncram.inc ; yes ; e:/quartus2/libraries/megafunctions/altsyncram.inc ;
; a_rdenreg.inc ; yes ; e:/quartus2/libraries/megafunctions/a_rdenreg.inc ;
; altrom.inc ; yes ; e:/quartus2/libraries/megafunctions/altrom.inc ;
; altram.inc ; yes ; e:/quartus2/libraries/megafunctions/altram.inc ;
; altdpram.inc ; yes ; e:/quartus2/libraries/megafunctions/altdpram.inc ;
; altqpram.inc ; yes ; e:/quartus2/libraries/megafunctions/altqpram.inc ;
; db/altsyncram_95s.tdf ; yes ; E:/weiling work/lpm/s_box/db/altsyncram_95s.tdf ;
; db/altsyncram_3s92.tdf ; yes ; E:/weiling work/lpm/s_box/db/altsyncram_3s92.tdf ;
; sld_mod_ram_rom.vhd ; yes ; e:/quartus2/libraries/megafunctions/sld_mod_ram_rom.vhd ;
; sld_rom_sr.vhd ; yes ; e:/quartus2/libraries/megafunctions/sld_rom_sr.vhd ;
; sld_hub.vhd ; yes ; e:/quartus2/libraries/megafunctions/sld_hub.vhd ;
; lpm_shiftreg.tdf ; yes ; e:/quartus2/libraries/megafunctions/lpm_shiftreg.tdf ;
; lpm_constant.inc ; yes ; e:/quartus2/libraries/megafunctions/lpm_constant.inc ;
; dffeea.inc ; yes ; e:/quartus2/libraries/megafunctions/dffeea.inc ;
; lpm_decode.tdf ; yes ; e:/quartus2/libraries/megafunctions/lpm_decode.tdf ;
; declut.inc ; yes ; e:/quartus2/libraries/megafunctions/declut.inc ;
; altshift.inc ; yes ; e:/quartus2/libraries/megafunctions/altshift.inc ;
; lpm_compare.inc ; yes ; e:/quartus2/libraries/megafunctions/lpm_compare.inc ;
; db/decode_bje.tdf ; yes ; E:/weiling work/lpm/s_box/db/decode_bje.tdf ;
; sld_dffex.vhd ; yes ; e:/quartus2/libraries/megafunctions/sld_dffex.vhd ;
; lpm_counter.tdf ; yes ; e:/quartus2/libraries/megafunctions/lpm_counter.tdf ;
; lpm_add_sub.inc ; yes ; e:/quartus2/libraries/megafunctions/lpm_add_sub.inc ;
; cmpconst.inc ; yes ; e:/quartus2/libraries/megafunctions/cmpconst.inc ;
; lpm_counter.inc ; yes ; e:/quartus2/libraries/megafunctions/lpm_counter.inc ;
; alt_synch_counter.inc ; yes ; e:/quartus2/libraries/megafunctions/alt_synch_counter.inc ;
; alt_synch_counter_f.inc ; yes ; e:/quartus2/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc ; yes ; e:/quartus2/libraries/megafunctions/alt_counter_f10ke.inc ;
; alt_counter_stratix.inc ; yes ; e:/quartus2/libraries/megafunctions/alt_counter_stratix.inc ;
; db/cntr_ov8.tdf ; yes ; E:/weiling work/lpm/s_box/db/cntr_ov8.tdf ;
; db/cntr_re8.tdf ; yes ; E:/weiling work/lpm/s_box/db/cntr_re8.tdf ;
+----------------------------------+-----------------+-------------------------------------------------------------+
+--------------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+-----------------------------------+--------------------------+
; Resource ; Usage ;
+-----------------------------------+--------------------------+
; Logic cells ; 160 ;
; Total combinational functions ; 129 ;
; Total 4-input functions ; 41 ;
; Total 3-input functions ; 45 ;
; Total 2-input functions ; 37 ;
; Total 1-input functions ; 6 ;
; Total 0-input functions ; 0 ;
; Combinational cells for routing ; 0 ;
; Total registers ; 103 ;
; Total logic cells in carry chains ; 17 ;
; I/O pins ; 17 ;
; Total memory bits ; 2048 ;
; Maximum fan-out node ; altera_internal_jtag~TDO ;
; Maximum fan-out ; 118 ;
; Total fan-out ; 856 ;
; Average fan-out ; 4.48 ;
+-----------------------------------+--------------------------+
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+--------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+--------------+
; altsyncram:altsyncram_component|altsyncram_95s:auto_generated|altsyncram_3s92:altsyncram1|ALTSYNCRAM ; AUTO ; True Dual Port ; 256 ; 8 ; 256 ; 8 ; 2048 ; lpm_rom0.mif ;
+------------------------------------------------------------------------------------------------------+------+----------------+--------------+--------------+--------------+--------------+------+--------------+
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
Info: Processing started: Sun Dec 25 23:47:23 2005
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off lpm_rom0 -c lpm_rom0
Info: Using design file lpm_rom0.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
Info: Found design unit 1: lpm_rom0-SYN
Info: Found entity 1: lpm_rom0
Info: Found 1 design units, including 1 entities, in source file ../../../quartus2/libraries/megafunctions/altsyncram.tdf
Info: Found entity 1: altsyncram
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_95s.tdf
Info: Found entity 1: altsyncram_95s
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_3s92.tdf
Info: Found entity 1: altsyncram_3s92
Info: Found 3 design units, including 1 entities, in source file ../../../quartus2/libraries/megafunctions/sld_mod_ram_rom.vhd
Info: Found design unit 1: sld_mod_ram_rom_pack
Info: Found design unit 2: sld_mod_ram_rom-rtl
Info: Found entity 1: sld_mod_ram_rom
Info: Found 2 design units, including 1 entities, in source file ../../../quartus2/libraries/megafunctions/sld_rom_sr.vhd
Info: Found design unit 1: sld_rom_sr-INFO_REG
Info: Found entity 1: sld_rom_sr
Info: Found 6 design units, including 2 entities, in source file ../../../quartus2/libraries/megafunctions/sld_hub.vhd
Info: Found design unit 1: HUB_PACK
Info: Found design unit 2: JTAG_PACK
Info: Found design unit 3: sld_hub-rtl
Info: Found design unit 4: sld_jtag_state_machine-rtl
Info: Found entity 1: sld_hub
Info: Found entity 2: sld_jtag_state_machine
Info: Found 1 design units, including 1 entities, in source file ../../../quartus2/libraries/megafunctions/lpm_shiftreg.tdf
Info: Found entity 1: lpm_shiftreg
Info: Found 1 design units, including 1 entities, in source file ../../../quartus2/libraries/megafunctions/lpm_decode.tdf
Info: Found entity 1: lpm_decode
Info: Found 1 design units, including 1 entities, in source file db/decode_bje.tdf
Info: Found entity 1: decode_bje
Info: Found 2 design units, including 1 entities, in source file ../../../quartus2/libraries/megafunctions/sld_dffex.vhd
Info: Found design unit 1: sld_dffex-DFFEX
Info: Found entity 1: sld_dffex
Info: Inferred 2 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: "altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~56"
Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "altsyncram:altsyncram_component|altsyncram_95s:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0]~12"
Info: Found 1 design units, including 1 entities, in source file ../../../quartus2/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file db/cntr_ov8.tdf
Info: Found entity 1: cntr_ov8
Info: Found 1 design units, including 1 entities, in source file db/cntr_re8.tdf
Info: Found entity 1: cntr_re8
Info: Registers with preset signals will power-up high
Info: Implemented 191 device resources after synthesis - the final resource count might be different
Info: Implemented 13 input pins
Info: Implemented 9 output pins
Info: Implemented 160 logic cells
Info: Implemented 8 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
Info: Processing ended: Sun Dec 25 23:47:30 2005
Info: Elapsed time: 00:00:08
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