syslib.c

vxworks下16550SIO Drv

     */ 
LOCAL MTRR sysMtrr =
    { 					/* MTRR table */
    {0,0},				/* MTRR_CAP register */
    {0,0},				/* MTRR_DEFTYPE register */
    					/* Fixed Range MTRRs */
    {{{MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB}},
     {{MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB, MTRR_WB}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_WC, MTRR_WC, MTRR_WC, MTRR_WC}},
     {{MTRR_WP, MTRR_WP, MTRR_WP, MTRR_WP, MTRR_WP, MTRR_WP, MTRR_WP, MTRR_WP}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC}},
     {{MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC, MTRR_UC}}},
    {{0LL, 0LL},			/* Variable Range MTRRs */
     {0LL, 0LL},
     {0LL, 0LL},
     {0LL, 0LL},
     {0LL, 0LL},
     {0LL, 0LL},
     {0LL, 0LL},
     {0LL, 0LL}}
    };
#endif	/* (CPU == PENTIUM) */


/* forward declarations */

LOCAL void sysStrayInt   (void);
char *sysPhysMemTop	 (void);
STATUS sysMmuMapAdd	 (void *address, UINT len, UINT initialStateMask,
                    	  UINT initialState);
LOCAL void sysIntInitPIC (void);
LOCAL void sysIntEoiGet  (VOIDFUNCPTR * vector, 
			  VOIDFUNCPTR * routineBoi, int * parameterBoi,
			  VOIDFUNCPTR * routineEoi, int * parameterEoi);


/* includes (source file) */

#include "mem/nullNvRam.c"
#include "vme/nullVme.c"
#include "sysSerial16550.c"

#if	defined(VIRTUAL_WIRE_MODE)
#   include "intrCtl/loApicIntr.c"
#   include "intrCtl/i8259Intr.c"
#   ifdef INCLUDE_APIC_TIMER
#      include "timer/loApicTimer.c"	/* includes timestamp driver */
#   else
#      include "timer/i8253Timer.c"	/* includes timestamp driver */
#   endif /* INCLUDE_APIC_TIMER */
#elif	defined(SYMMETRIC_IO_MODE)
#   include "intrCtl/loApicIntr.c"
#   include "intrCtl/i8259Intr.c"
#   include "intrCtl/ioApicIntr.c"
#   ifdef INCLUDE_APIC_TIMER
#      include "timer/loApicTimer.c"	/* includes timestamp driver */
#   else
#      include "timer/i8253Timer.c"	/* includes timestamp driver */
#   endif /* INCLUDE_APIC_TIMER */
#else
#   include "intrCtl/i8259Intr.c"
#   include "timer/i8253Timer.c"	/* includes timestamp driver */
#endif	/* defined(VIRTUAL_WIRE_MODE) */

#ifdef	INCLUDE_PCI
#   include "pci/pciConfigLib.c"
#   include "pci/pciIntLib.c"
#   ifdef	INCLUDE_SHOW_ROUTINES
#	include "pci/pciConfigShow.c"
#   endif	/* INCLUDE_SHOW_ROUTINES */
#endif	/* INCLUDE_PCI */

#ifdef	INCLUDE_PCMCIA
#   include "pcmcia/pccardLib.c"
#   include "pcmcia/pccardShow.c"
#endif	/* INCLUDE_PCMCIA */

/* include ultraEnd driver support routines */

#ifdef INCLUDE_ULTRA_END
#include "sysUltraEnd.c"	
#endif /* INCLUDE_ULTRA_END */

/* include elt3c509End driver support routines */ 

#ifdef INCLUDE_ELT_3C509_END
#include "sysElt3c509End.c"
#endif /* INCLUDE_ELT_3C509_END */
/*bluewind for end*/
#ifdef INCLUDE_RTL_81X9_END
#include "sysRtl81x9End.c"
#endif /* INCLUDE_RTL_81X9_END */

/* include ne2000End driver support routines */

#ifdef INCLUDE_ENE_END
#include "sysNe2000End.c"
#endif /* INCLUDE_ENE_END */

/* include el3c90xEnd driver support routines */

#ifdef INCLUDE_EL_3C90X_END
#   include "sysEl3c90xEnd.c"
#endif /* INCLUDE_EL_3C90X_END */

#include "sysNetif.c"		/* network driver support */
#include "sysScsi.c"		/* scsi support */

/*******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* RETURNS: A pointer to the string "PC 386, 486, PENTIUM or PENTIUMPRO".
*/

char *sysModel (void)

    {
#if	(CPU == I80386)
    return ("PC 386");
#elif	(CPU == I80486)
    return ("PC 486");
#elif	(CPU_VARIANT == PENTIUM)
    return ("PC PENTIUM");
#elif	(CPU_VARIANT == PENTIUMPRO)
    return ("PC PENTIUMPRO");
#endif	/* (CPU == I80386) */
    }

/*******************************************************************************
*
* sysBspRev - return the BSP version and revision number
*
* This routine returns a pointer to a BSP version and revision number, for
* example, 1.1/0. BSP_REV is concatenated to BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

/*******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various features of the i386/i486 board.
* It is called from usrInit() in usrConfig.c.
*
* NOTE: This routine should not be called directly by the user application.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    PHYS_MEM_DESC *pMmu;
    int ix = 0;

#if	(CPU == PENTIUM)

    /* enable MTRR (Memory Type Range Registers) */

    if ((sysCpuId.feature & CPUID_MTRR) == CPUID_MTRR)
	{
        pentiumMtrrDisable ();		/* disable MTRR */
#ifdef	INCLUDE_MTRR_GET
        (void) pentiumMtrrGet (&sysMtrr); /* get MTRR initialized by BIOS */
#else
        (void) pentiumMtrrSet (&sysMtrr); /* set your own MTRR */
#endif	/* INCLUDE_MTRR_GET */
        pentiumMtrrEnable ();		/* enable MTRR */
	}

#ifdef	INCLUDE_PMC
    /* enable PMC (Performance Monitoring Counters) */

    if ((sysProcessor == X86CPU_PENTIUMPRO) && 
	((sysCpuId.feature & CPUID_MSR) == CPUID_MSR))
	{
	pentiumPmcStop ();		/* stop PMC0 and PMC1 */
	pentiumPmcReset ();		/* reset PMC0 and PMC1 */

	/* 
	 * select events of your interest, such as:
	 * PMC_HW_INT_RX        - number of hardware interrupts received
	 * PMC_MISALIGN_MEM_REF - number of misaligned data memory references
	 */

	(void) pentiumPmcStart (PMC_EN | PMC_OS | PMC_UMASK_00 | PMC_HW_INT_RX,
		        PMC_EN | PMC_OS | PMC_UMASK_00 | PMC_MISALIGN_MEM_REF);
	}
#endif	/* INCLUDE_PMC */

    /* enable MCA (Machine Check Architecture) */

    if ((sysCpuId.feature & CPUID_MCE) == CPUID_MCE)
	{
#ifdef	INCLUDE_SHOW_ROUTINES
	IMPORT FUNCPTR excMcaInfoShow;
	
	/* 
	 * if excMcaInfoShow is not NULL, it is called in the default
	 * exception handler when Machine Check Exception happened
	 */

	excMcaInfoShow = (FUNCPTR) pentiumMcaShow;
#endif	/* INCLUDE_SHOW_ROUTINES */

        if ((sysCpuId.feature & CPUID_MCA) == CPUID_MCA)
	    {
	    UINT32 zero[2] = {0x00000000,0x00000000};
	    UINT32 one[2]  = {0xffffffff,0xffffffff};
	    UINT32 cap[2];
	    int mcaBanks;
	    int ix;

	    /* enable all MCA features if MCG_CTL register is present */

	    pentiumMsrGet (MSR_MCG_CAP, (long long int *)&cap);
	    if (cap[0] & MCG_CTL_P)
	        pentiumMsrSet (MSR_MCG_CTL, (long long int *)&one);

	    mcaBanks = cap[0] & MCG_COUNT;	/* get number of banks */

	    /* enable logging of all errors except for the MC0_CTL register */

	    for (ix = 1; ix < mcaBanks; ix++)
	        pentiumMsrSet (MSR_MC0_CTL+(ix * 4), (long long int *)&one);

	    /* clear all errors */

	    for (ix = 0; ix < mcaBanks; ix++)
	        pentiumMsrSet (MSR_MC0_STATUS+(ix * 4), (long long int *)&zero);
	    }

	pentiumCr4Set (pentiumCr4Get () | CR4_MCE); /* enable MC exception */
	}

#endif	/* (CPU == PENTIUM) */

    /* initialize the number of active mappings (sysPhysMemDescNumEnt) */

    pMmu = &sysPhysMemDesc[0];

    for (ix = 0; ix < NELEMENTS (sysPhysMemDesc); ix++) 
        if (pMmu->virtualAddr != (void *)DUMMY_VIRT_ADDR)
            pMmu++;
        else
            break;

    sysPhysMemDescNumEnt = ix;

    /* initialize the PIC (Programmable Interrupt Controller) */

    sysIntInitPIC ();
    intEoiGet = sysIntEoiGet;	/* function pointer used in intConnect () */

    /* initialize PCI and related devices */

#ifdef  INCLUDE_PCI

    pciConfigLibInit (PCI_MECHANISM_1, PCI_CONFIG_ADDR, PCI_CONFIG_DATA, NONE);
    pciIntLibInit ();

    /* 
     * PCI-to-PCI bridge initialization should be done here, if it is.
     * It is not necessary for Intel 430HX PCISET, which splits
     * the extended memory area as follows:
     *   - Flash BIOS area from 4GByte to (4GB - 512KB)
     *   - DRAM memory from 1MB to a maximum of 512MB
     *   - PCI memory space from the top of DRAM to (4GB - 512KB)
     */

#if defined (INCLUDE_FEI) || defined (INCLUDE_FEI_END)
    sys557PciInit ();
#endif  /* INCLUDE_FEI || INCLUDE_FEI_END */
		#ifdef  INCLUDE_EEV
		syseeVPciInit ();
		#endif  /* INCLUDE_EEV */

#ifdef INCLUDE_LN_97X_END
    sysLan97xPciInit ();
#endif /* INCLUDE_LN_97X_END */

#ifdef INCLUDE_EL_3C90X_END
    sysEl3c90xPciInit ();
#endif /* INCLUDE_EL_3C90X_END */
/*bluewind for end*/
#ifdef INCLUDE_RTL_81X9_END
   sysRtl81x9PciInit ();
#endif /* INCLUDE_RTL_81X9_END */

#ifdef INCLUDE_SCSI
#ifdef  INCLUDE_AIC_7880
    sysAic7880PciInit ();
#endif  /* INCLUDE_AIC_7880 */
#endif  /* INCLUDE_SCSI */

/*06A*/
#if INCLUDE_06A
/*2003-1-7 7:54 donleo for usb*/
	sysUsbOhciPciInit();
#endif 
/**/

#endif /* INCLUDE_PCI */

    /* initializes the serial devices */

    sysSerialHwInit ();      /* initialize serial data structure */
    }

/*******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: N/A
*/

void sysHwInit2 (void)

    {

#if defined (INCLUDE_ADD_BOOTMEM)

    /*
     * We memAddToPool some upper memory into any low memory
     * x86 "rom" images pool.  The x86 low memory images reside
     * from 0x8000 to 0xa0000.  By memAddToPool'ing some upper
     * memory here, we allow devices a larger pool to swim within.
     * (SPR#21338).  This is no longer performed in bootConfig.c
     */

#if (ADDED_BOOTMEM_SIZE != 0x0)
 
    /*
     * if &end (compiler symbol) is in lower memory, then we assume 
     * this is a low memory image, and add some upper memory to the pool.
     */
 
    if ((int)&end < 0x100000)
        {
        /* Only do this if there is enough memory. Default is 4MB min. */
 
        if ((int)memTopPhys >= (0x00200000 + ADDED_BOOTMEM_SIZE))
            {
            memAddToPool ((char *)memTopPhys - ADDED_BOOTMEM_SIZE,
                          ADDED_BOOTMEM_SIZE);
            }
        }
#endif  /* (ADDED_BOOTMEM_SIZE !=0) */
#endif  /* INCLUDE_ADD_BOOTMEM defined */
 




    /* connect sys clock interrupt and auxiliary clock interrupt*/

#ifdef	INCLUDE_APIC_TIMER
    (void)intConnect (INUM_TO_IVEC (TIMER_INT_VEC), sysClkInt, 0);
#ifdef PIT0_FOR_AUX
    (void)intConnect (INUM_TO_IVEC (PIT0_INT_VEC), sysAuxClkInt, 0);
#else
    (void)intConnect (INUM_TO_IVEC (RTC_INT_VEC), sysAuxClkInt, 0);
#endif /* PIT0_FOR_AUX */
#else
    (void)intConnect (INUM_TO_IVEC (PIT0_INT_VEC), sysClkInt, 0);
    (void)intConnect (INUM_TO_IVEC (RTC_INT_VEC), sysAuxClkInt, 0);
#endif	/* INCLUDE_APIC_TIMER */

    /* connect serial interrupt */  

    sysSerialHwInit2();

    /* connect stray(spurious/phantom) interrupt */  

#if     defined(VIRTUAL_WIRE_MODE)
    (void)intConnect (INUM_TO_IVEC (SPURIOUS_INT_VEC), sysStrayInt, 0);
    (void)intConnect (INUM_TO_IVEC (LPT_INT_VEC), sysStrayInt, 0);
#elif   defined(SYMMETRIC_IO_MODE)
    (void)intConnect (INUM_TO_IVEC (SPURIOUS_INT_VEC), sysStrayInt, 0);
#else
    (void)intConnect (INUM_TO_IVEC (LPT_INT_VEC), sysStrayInt, 0);
#endif  /* defined(VIRTUAL_WIRE_MODE) */

#ifdef	INCLUDE_PC_CONSOLE

    /* connect keyboard Controller 8042 chip interrupt */

    (void) intConnect (INUM_TO_IVEC (KBD_INT_VEC), kbdIntr, 0);

#endif	/* INCLUDE_PC_CONSOLE */

    }