un_shannon.vqm

设计与验证verilog hdl

//
// Written by Synplify
// Synplify 8.1.0, Build 539R.
// Wed Mar 08 18:30:48 2006
//
// Source file index table:
// Object locations will have the form <file>:<line>
// file 0 "noname"
// file 1 "\c:\eda\synplicity\fpga_81\lib\altera\altera.v "
// file 2 "\c:\eda\synplicity\fpga_81\lib\altera\cyclone.v "
// file 3 "\c:\eda\synplicity\fpga_81\lib\altera\altera_mf.v "
// file 4 "\c:\eda\synplicity\fpga_81\lib\altera\altera_lpm.v "
// file 5 "\c:\prj\chapter5\example-5-8\source\un_shannon.v "

// VQM4.1+ 
module un_shannon (
  in0,
  in1,
  in2,
  late,
  en,
  out
);
input [7:0] in0 ;
input [7:0] in1 ;
input [7:0] in2 ;
input late ;
input en ;
output out /* synthesis syn_tristate = 1 */;
wire late ;
wire en ;
wire out ;
wire [7:0] in0_c;
wire [7:0] in1_c;
wire [7:0] in2_c;
wire VCC ;
wire GND ;
wire un6_out_NE_1_a_x ;
wire late_c ;
wire un6_out_a_0_add1 ;
wire un6_out_NE_2_a_x ;
wire un6_out_a_0_add3 ;
wire un6_out_NE_3_a_x ;
wire un6_out_a_0_add5 ;
wire outz ;
wire en_c ;
wire un6_out_NE_1 ;
wire un6_out_NE_2 ;
wire un6_out_NE_6 ;
wire un6_out_a_0_add7 ;
wire un6_out_NE_6_a ;
wire un6_out_a_0_add6 ;
wire un6_out_NE_3 ;
wire un6_out_a_0_add4 ;
wire un6_out_a_0_add2 ;
wire un6_out_a_0_add0 ;
wire un6_out_a_0_carry_6 ;
wire un6_out_a_0_carry_5 ;
wire un6_out_a_0_carry_4 ;
wire un6_out_a_0_carry_3 ;
wire un6_out_a_0_carry_2 ;
wire un6_out_a_0_carry_1 ;
wire un6_out_a_0_carry_0 ;
//@1:1
  assign VCC = 1'b1;
//@1:1
  assign GND = 1'b0;
  cyclone_lcell un6_out_NE_1_a_x_cZ (
	.combout(un6_out_NE_1_a_x),
	.dataa(in0_c[1]),
	.datab(late_c),
	.datac(un6_out_a_0_add1),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_1_a_x_cZ.operation_mode="normal";
defparam un6_out_NE_1_a_x_cZ.output_mode="comb_only";
defparam un6_out_NE_1_a_x_cZ.lut_mask="1e1e";
defparam un6_out_NE_1_a_x_cZ.synch_mode="off";
defparam un6_out_NE_1_a_x_cZ.sum_lutc_input="datac";
  cyclone_lcell un6_out_NE_2_a_x_cZ (
	.combout(un6_out_NE_2_a_x),
	.dataa(in0_c[3]),
	.datab(late_c),
	.datac(un6_out_a_0_add3),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_2_a_x_cZ.operation_mode="normal";
defparam un6_out_NE_2_a_x_cZ.output_mode="comb_only";
defparam un6_out_NE_2_a_x_cZ.lut_mask="1e1e";
defparam un6_out_NE_2_a_x_cZ.synch_mode="off";
defparam un6_out_NE_2_a_x_cZ.sum_lutc_input="datac";
  cyclone_lcell un6_out_NE_3_a_x_cZ (
	.combout(un6_out_NE_3_a_x),
	.dataa(in0_c[5]),
	.datab(late_c),
	.datac(un6_out_a_0_add5),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_3_a_x_cZ.operation_mode="normal";
defparam un6_out_NE_3_a_x_cZ.output_mode="comb_only";
defparam un6_out_NE_3_a_x_cZ.lut_mask="1e1e";
defparam un6_out_NE_3_a_x_cZ.synch_mode="off";
defparam un6_out_NE_3_a_x_cZ.sum_lutc_input="datac";
// @5:5
  cyclone_lcell out_cZ (
	.combout(outz),
	.dataa(en_c),
	.datab(un6_out_NE_1),
	.datac(un6_out_NE_2),
	.datad(un6_out_NE_6),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam out_cZ.operation_mode="normal";
defparam out_cZ.output_mode="comb_only";
defparam out_cZ.lut_mask="0002";
defparam out_cZ.synch_mode="off";
defparam out_cZ.sum_lutc_input="datac";
  cyclone_lcell un6_out_NE_6_cZ (
	.combout(un6_out_NE_6),
	.dataa(un6_out_a_0_add7),
	.datab(late_c),
	.datac(in0_c[7]),
	.datad(un6_out_NE_6_a),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_6_cZ.operation_mode="normal";
defparam un6_out_NE_6_cZ.output_mode="comb_only";
defparam un6_out_NE_6_cZ.lut_mask="a9ff";
defparam un6_out_NE_6_cZ.synch_mode="off";
defparam un6_out_NE_6_cZ.sum_lutc_input="datac";
  cyclone_lcell un6_out_NE_6_a_cZ (
	.combout(un6_out_NE_6_a),
	.dataa(in0_c[6]),
	.datab(late_c),
	.datac(un6_out_a_0_add6),
	.datad(un6_out_NE_3),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_6_a_cZ.operation_mode="normal";
defparam un6_out_NE_6_a_cZ.output_mode="comb_only";
defparam un6_out_NE_6_a_cZ.lut_mask="001e";
defparam un6_out_NE_6_a_cZ.synch_mode="off";
defparam un6_out_NE_6_a_cZ.sum_lutc_input="datac";
  cyclone_lcell un6_out_NE_3_cZ (
	.combout(un6_out_NE_3),
	.dataa(un6_out_a_0_add4),
	.datab(late_c),
	.datac(in0_c[4]),
	.datad(un6_out_NE_3_a_x),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_3_cZ.operation_mode="normal";
defparam un6_out_NE_3_cZ.output_mode="comb_only";
defparam un6_out_NE_3_cZ.lut_mask="a9ff";
defparam un6_out_NE_3_cZ.synch_mode="off";
defparam un6_out_NE_3_cZ.sum_lutc_input="datac";
  cyclone_lcell un6_out_NE_2_cZ (
	.combout(un6_out_NE_2),
	.dataa(un6_out_a_0_add2),
	.datab(late_c),
	.datac(in0_c[2]),
	.datad(un6_out_NE_2_a_x),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_2_cZ.operation_mode="normal";
defparam un6_out_NE_2_cZ.output_mode="comb_only";
defparam un6_out_NE_2_cZ.lut_mask="a9ff";
defparam un6_out_NE_2_cZ.synch_mode="off";
defparam un6_out_NE_2_cZ.sum_lutc_input="datac";
  cyclone_lcell un6_out_NE_1_cZ (
	.combout(un6_out_NE_1),
	.dataa(un6_out_a_0_add0),
	.datab(late_c),
	.datac(in0_c[0]),
	.datad(un6_out_NE_1_a_x),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_NE_1_cZ.operation_mode="normal";
defparam un6_out_NE_1_cZ.output_mode="comb_only";
defparam un6_out_NE_1_cZ.lut_mask="a9ff";
defparam un6_out_NE_1_cZ.synch_mode="off";
defparam un6_out_NE_1_cZ.sum_lutc_input="datac";
// @5:5
  cyclone_lcell un6_out_a_0_add7_cZ (
	.combout(un6_out_a_0_add7),
	.dataa(in1_c[7]),
	.datab(in2_c[7]),
	.datac(VCC),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.cin(un6_out_a_0_carry_6),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_a_0_add7_cZ.cin_used="true";
defparam un6_out_a_0_add7_cZ.operation_mode="normal";
defparam un6_out_a_0_add7_cZ.output_mode="comb_only";
defparam un6_out_a_0_add7_cZ.lut_mask="6969";
defparam un6_out_a_0_add7_cZ.synch_mode="off";
defparam un6_out_a_0_add7_cZ.sum_lutc_input="cin";
// @5:5
  cyclone_lcell un6_out_a_0_add6_cZ (
	.combout(un6_out_a_0_add6),
	.cout(un6_out_a_0_carry_6),
	.dataa(in1_c[6]),
	.datab(in2_c[6]),
	.datac(VCC),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.cin(un6_out_a_0_carry_5),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_a_0_add6_cZ.cin_used="true";
defparam un6_out_a_0_add6_cZ.operation_mode="arithmetic";
defparam un6_out_a_0_add6_cZ.output_mode="comb_only";
defparam un6_out_a_0_add6_cZ.lut_mask="69b2";
defparam un6_out_a_0_add6_cZ.synch_mode="off";
defparam un6_out_a_0_add6_cZ.sum_lutc_input="cin";
// @5:5
  cyclone_lcell un6_out_a_0_add5_cZ (
	.combout(un6_out_a_0_add5),
	.cout(un6_out_a_0_carry_5),
	.dataa(in1_c[5]),
	.datab(in2_c[5]),
	.datac(VCC),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.cin(un6_out_a_0_carry_4),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_a_0_add5_cZ.cin_used="true";
defparam un6_out_a_0_add5_cZ.operation_mode="arithmetic";
defparam un6_out_a_0_add5_cZ.output_mode="comb_only";
defparam un6_out_a_0_add5_cZ.lut_mask="69b2";
defparam un6_out_a_0_add5_cZ.synch_mode="off";
defparam un6_out_a_0_add5_cZ.sum_lutc_input="cin";
// @5:5
  cyclone_lcell un6_out_a_0_add4_cZ (
	.combout(un6_out_a_0_add4),
	.cout(un6_out_a_0_carry_4),
	.dataa(in1_c[4]),
	.datab(in2_c[4]),
	.datac(VCC),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.cin(un6_out_a_0_carry_3),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_a_0_add4_cZ.cin_used="true";
defparam un6_out_a_0_add4_cZ.operation_mode="arithmetic";
defparam un6_out_a_0_add4_cZ.output_mode="comb_only";
defparam un6_out_a_0_add4_cZ.lut_mask="69b2";
defparam un6_out_a_0_add4_cZ.synch_mode="off";
defparam un6_out_a_0_add4_cZ.sum_lutc_input="cin";
// @5:5
  cyclone_lcell un6_out_a_0_add3_cZ (
	.combout(un6_out_a_0_add3),
	.cout(un6_out_a_0_carry_3),
	.dataa(in1_c[3]),
	.datab(in2_c[3]),
	.datac(VCC),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.cin(un6_out_a_0_carry_2),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_a_0_add3_cZ.cin_used="true";
defparam un6_out_a_0_add3_cZ.operation_mode="arithmetic";
defparam un6_out_a_0_add3_cZ.output_mode="comb_only";
defparam un6_out_a_0_add3_cZ.lut_mask="69b2";
defparam un6_out_a_0_add3_cZ.synch_mode="off";
defparam un6_out_a_0_add3_cZ.sum_lutc_input="cin";
// @5:5
  cyclone_lcell un6_out_a_0_add2_cZ (
	.combout(un6_out_a_0_add2),
	.cout(un6_out_a_0_carry_2),
	.dataa(in1_c[2]),
	.datab(in2_c[2]),
	.datac(VCC),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.cin(un6_out_a_0_carry_1),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_a_0_add2_cZ.cin_used="true";
defparam un6_out_a_0_add2_cZ.operation_mode="arithmetic";
defparam un6_out_a_0_add2_cZ.output_mode="comb_only";
defparam un6_out_a_0_add2_cZ.lut_mask="69b2";
defparam un6_out_a_0_add2_cZ.synch_mode="off";
defparam un6_out_a_0_add2_cZ.sum_lutc_input="cin";
// @5:5
  cyclone_lcell un6_out_a_0_add1_cZ (
	.combout(un6_out_a_0_add1),
	.cout(un6_out_a_0_carry_1),
	.dataa(in1_c[1]),
	.datab(in2_c[1]),
	.datac(VCC),
	.datad(VCC),
	.aclr(GND),
	.sclr(GND),
	.sload(GND),
	.ena(VCC),
	.cin(un6_out_a_0_carry_0),
	.inverta(GND),
	.aload(GND),
	.regcascin(GND)
);
defparam un6_out_a_0_add1_cZ.cin_used="true";
defparam un6_out_a_0_add1_cZ.operation_mode="arithmetic";
defparam un6_out_a_0_add1_cZ.output_mode="comb_only";
defparam un6_out_a_0_add1_cZ.lut_mask="69b2";
defparam un6_out_a_0_add1_cZ.synch_mode="off";
defparam un6_out_a_0_add1_cZ.sum_lutc_input="cin";
// @5:5