serial.vhd

51单片机内核vhdl实现 xilinx平台的

            ----------------------------------
            -- r_start flip-flop
            ----------------------------------
               r_start_ff <= r_start;
            
            end if;
         end if;
      end process;
   
   
   --------------------------------------------------------------------
   -- Falling edge detection on the r_start 
   -- r_start_fall is high active during single clk period
   --------------------------------------------------------------------
   r_start_fall_proc :
    --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
         
         -------------------------------------
         -- Synchronous reset
         -------------------------------------
            if rst='1' then
               r_start_fall <= '0';
            else
            
            -------------------------------------
            -- Synchronous write
            -------------------------------------
            -- Falling edge detection
            ----------------------------------
               if r_start='0' and r_start_ff='1' then
                  r_start_fall <= '1';
               else
                  r_start_fall <= '0';
               end if;
            
            end if;
         end if;
      end process;
   
   
   --------------------------------------------------------------------
   -- Falling edge detection on the ri
   -- ri_fall is high active during single clk period
   --------------------------------------------------------------------
   ri_fall_proc :
    --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
         
         -------------------------------------
         -- Synchronous reset
         -------------------------------------
            if rst='1' then
               ri_fall <= '0';
               ri_ff   <= '0';
            else
            
            -------------------------------------
            -- Synchronous write
            -------------------------------------
            -- Falling edge detection
            ----------------------------------
               if xx='0' and ri_ff='1' then
                  ri_fall <= '1';
               else
                  ri_fall <= '0';
               end if;
            
            ----------------------------------
            -- t0 input flip-flop
            ----------------------------------
               ri_ff <= xx;
            
            end if;
         end if;
      end process;
   
   
   --------------------------------------------------------------------
   receive_proc:
    --------------------------------------------------------------------
      process (clk)
      begin
         if clk'event and clk='1' then
         
         -------------------------------------
         -- Synchronous reset
         -------------------------------------
            if rst='1' then
               sbuf_r        <= SBUF_RV;
               r_baud_count  <= "0000";
               receive       <= '0';
               r_shift_reg   <= "11111111111";
               r_shift_temp   <= '0';
               r_shift_count <= "0000";
               r_start       <= '0';   
               r_start_ok    <= '0';
            
            else
            -------------------------------------
            -- Synchronous write
            -------------------------------------
            -- receive clk divide by 16
            ----------------------------------
               if rxd_fall = '1' and r_start = '0' then
                  r_baud_count <= "0000"; 
               elsif b_clk='1' then
                  r_baud_count <= r_baud_count + '1';
               end if;
            
            ----------------------------------
            -- Receive register shift
            ----------------------------------
               case scon(7 downto 6) is
               -------------------------------
               -- Mode 0
               -------------------------------
                  when "00" =>
                     if (
                           (receive='1') and 
                           (
                              (cycle=2 or
                               cycle=4 or
                               cycle=6 or
                               cycle=8
                              ) and 
                              (phase=4)
                           )  --clk_count="1011"
                        )
                     then 
                        r_shift_reg(9 downto 0) <= 
                           r_shift_reg(10 downto 1);
                        r_shift_reg(10) <= r_shift_temp;
                        r_shift_count   <= r_shift_count-'1';  
                        if r_shift_count="0001" then       
                           r_start <= '0';                  
                           receive <= '0';                  
                        end if;                       
                     elsif (
                              (receive='1') and     
                              (
                                 (cycle=2 or
                                  cycle=4 or
                                  cycle=6 or
                                  cycle=8
                                 ) and 
                                 (phase=2)
                              )
                           )
                     then
                        r_shift_temp <= rxd_ff0;
                     end if;
               
               -------------------------------
               -- Mode 1
               -------------------------------
                  when "01" =>
                     if (r_baud_count="1001" and
                         b_clk='1' and
                         r_start = '1' and 
                         not (r_shift_count = "0000")
                        )
                     then                     
                        r_shift_reg(9 downto 0) <= 
                           r_shift_reg(10 downto 1);
                        r_shift_reg(10) <= rxd_val; 
                        r_shift_count   <= r_shift_count-'1';
                        if r_shift_count = "0001" then
                           r_start <= '0';
                           receive <= '0';
                        end if;                  
                        if (r_shift_count = "1010") then
                           if (rxd_val = '0') then
                              r_start_ok <= '1';
                           else  
                              r_start    <= '0';
                              receive    <= '0';
                              r_shift_count <= "0000"; 
                           end if;  
                        end if;  
                     end if;                       
                     if (r_start_fall='1' and r_start_ok='1') then
                        r_start_ok <= '0';  
                     end if;  
               -------------------------------
               -- Mode 2, 3
               -------------------------------
                  when others =>
                     if (r_baud_count="1001" and
                         b_clk='1' and
                         receive = '1' and 
                         not (r_shift_count = "0000")
                        )
                     then                     
                        r_shift_reg(9 downto 0) <= 
                           r_shift_reg(10 downto 1);
                        r_shift_reg(10) <= rxd_val; 
                     
                        r_shift_count <= r_shift_count-'1';
                        if r_shift_count = "0010" then
                           r_start <= '0';
                        end if;                  
                        if r_shift_count = "0001" then
                           receive <= '0';
                        end if;                  
                        if (r_shift_count = "1011") then
                           if (rxd_val = '0') then
                              r_start_ok <= '1';
                           else  
                              r_start    <= '0';
                              receive    <= '0';
                              r_shift_count <= "0000"; 
                           end if;  
                        end if;  
                     end if;                       
                     if (r_start_fall='1' and r_start_ok='1') then
                        r_start_ok <= '0';  
                     end if;  
               end case;      
               if (
                     (cycle=2 or
                      cycle=4 or
                      cycle=6 or
                      cycle=8
                     ) and 
                     (phase=4) and
                     (r_start = '1')
                  )
               then
                  if receive = '0' then
                     receive <= '1';
                  end if;
               end if;    
            
            ----------------------------------
            -- Receive shift enable
            ----------------------------------
               if (
                     (rxd_fall = '1' and
                      not (scon(7 downto 6)="00") and
                      scon(4)='1' and
                      r_shift_count="0000"
                     ) or
                     (ri_fall = '1' and
                      scon(7 downto 6)="00" and
                      scon(4)='1'
                     )
                  )
               then
                  r_start <= '1';
               end if;
            
            ----------------------------------
            -- Receive count load
            ----------------------------------
            -- Mode 0
            ----------------------------------
               if scon(7 downto 6)="00" then
                  if  ri_fall='1' and scon(4)='1' then
                     r_shift_count <= "1000";      
                  end if;   
               ----------------------------------
               -- Mode 1, 2, 3
               ----------------------------------
               elsif (r_start_rise='1' and
                      r_shift_count = "0000")
               then
                  if (scon(7 downto 6)="01") then
                     r_shift_count <= "1010";
                  else   
                     r_shift_count <= "1011";
                  end if;   
               end if;  
            
               if r_start_fall = '1' then   
                  if (scon(7 downto 6)="00") then
                     sbuf_r <= r_shift_reg(10 downto 3);
                  else 
                     if (r_start_ok ='1' and scon(0)='0') then
                        if scon(5)='1' then
                           if r_shift_reg(10)='1' then
                              sbuf_r <= r_shift_reg(9 downto 2);  
                           end if;
                        else
                           sbuf_r <= r_shift_reg(9 downto 2);  
                        end if;   
                     end if;
                  end if;
               end if;
            end if;         
         end if;
      end process;
   
   
   --------------------------------------------------------------------
   -- Special Function registers read
   --------------------------------------------------------------------
   sfr_read :
   --------------------------------------------------------------------
      sfrdataser <=
         scon   when sfraddr=SCON_ID else
         sbuf_r; 
   
   end RTL;
--*******************************************************************--