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-- Pullup drivers :
--------------------------------------------------------------------
p0_pullup : p0 <= (others => 'H');
p1_pullup : p1 <= (others => 'H');
p2_pullup : p2 <= (others => 'H');
p3_pullup : p3 <= (others => 'H');
--------------------------------------------------------------------
-- Indirect drivers for Shift Register 0
-- Instance for Multiprocessor Test Bench only
-- It should not be used in other cases
--------------------------------------------------------------------
--shift0_clk_hand : shift0_clk <= TO_X01(p3(0));
--shift0_we_hand : shift0_we <= TO_X01(p3(5));
--shift0_oe_hand : shift0_oe <= TO_X01(p3(4));
--shift0_biti_hand : shift0_biti <= TO_X01(p3(1));
--shift0_bito_hand : p3(0) <= shift0_bito;
--------------------------------------------------------------------
-- Indirect drivers for Shift Register 1
-- Instance for Multiprocessor Test Bench only
-- It should not be used in other cases
--------------------------------------------------------------------
--shift1_clk_hand : shift1_clk <= TO_X01(p1(3));
--shift1_we_hand : shift1_we <= TO_X01(p3(5));
--shift1_oe_hand : shift1_oe <= TO_X01(p3(4));
--shift1_biti_hand : shift1_biti <= TO_X01(p1(2));
--shift1_bito_hand : p1(2) <= shift1_bito;
--------------------------------------------------------------------
-- Statement for Multiprocessor Test Bench only
-- It should not be used in other cases
--------------------------------------------------------------------
-- p3_drv : p3 <= p1;
--------------------------------------------------------------------
-----------------------------------------------------------------
-- Test Bench Shift Register
-- Instance for Multiprocessor Test Bench only
-- It should not be used in other cases
-----------------------------------------------------------------
--U_EXT_SHIFT0 : EXTERNAL_SHIFT_REGISTER
-- generic map (
-- DATAWIDTH => 8
-- )
-- port map (
-- clk => shift0_clk,
-- rst => reset,
-- we => shift0_we,
-- oe => shift0_oe,
-- biti => shift0_biti,
-- bito => shift0_bito
-- );
-----------------------------------------------------------------
-----------------------------------------------------------------
-- Test Bench Shift Register
-- Instance for Multiprocessor Test Bench only
-- It should not be used in other cases
-----------------------------------------------------------------
--U_EXT_SHIFT1 : EXTERNAL_SHIFT_REGISTER
-- generic map (
-- DATAWIDTH => 8
-- )
-- port map (
-- clk => shift1_clk,
-- rst => reset,
-- we => shift1_we,
-- oe => shift1_oe,
-- biti => shift1_biti,
-- bito => shift1_bito
-- );
-----------------------------------------------------------------
-----------------------------------------------------------------
-- Address bus high
-----------------------------------------------------------------
addrbushigh_drv : addrbus(15 downto 8) <= p2;
-----------------------------------------------------------------
-- Address latch register
-----------------------------------------------------------------
U_LATCH : EXTERNAL_LATCH_REGISTER
-----------------------------------------------------------------
generic map (
DATAWIDTH => 8
)
port map (
strobe => ale,
databusi => p0,
databuso => addrbus(7 downto 0)
);
-----------------------------------------------------------------
-- C8051 based chip instance
-----------------------------------------------------------------
U_CHIP_C8051 : CHIP_C8051
generic map (
RAMSIZE => INTRAMSIZE,
ROMSIZE => INTROMSIZE,
ROMFILE => INTROMFILE,
FILEPATH => TESTPATH & TESTNAME & "/"
)
port map (
reset => reset,
xtal1 => xtal1,
ea => ea,
p0 => p0,
p1 => p1,
p2 => p2,
p3 => p3,
psen => psen,
ale => ale,
xtal2 => xtal2
);
-----------------------------------------------------------------
-- Test Bench Clock Generator unit
-----------------------------------------------------------------
U_EXT_CLOCK : EXTERNAL_CLOCK_GENERATOR
generic map (
PERIOD => CLOCKPERIOD,
DUTY => CLOCKDUTY,
SYNCSTART => SYNCSTART,
SYNCSTOP => SYNCSTOP
)
port map (
reset => reset,
ale => ale,
clk => xtal1
);
-----------------------------------------------------------------
-- Indirect drivers for Data Memory
-----------------------------------------------------------------
ram_rd_hand : ram_rd <= TO_X01(p3(7));
ram_wr_hand : ram_wr <= TO_X01(p3(6));
-----------------------------------------------------------------
-- Test Bench Data Memory unit
-----------------------------------------------------------------
U_EXT_RAM : EXTERNAL_DATA_MEMORY
generic map (
DATAWIDTH => 8,
ADDRWIDTH => EXTRAMSIZE
)
port map (
addrbus => addrbus (EXTRAMSIZE-1 downto 0),
rd => ram_rd,
wr => ram_wr,
databusi => p0,
databuso => p0
);
-----------------------------------------------------------------
-- Test Bench Program Memory unit
-----------------------------------------------------------------
U_EXT_ROM : EXTERNAL_PROGRAM_MEMORY
generic map (
DATAWIDTH => 8,
ADDRWIDTH => EXTROMSIZE,
ROMFILE => EXTROMFILE,
FILEPATH => TESTPATH & TESTNAME & "/"
)
port map (
addrbus => addrbus (EXTROMSIZE-1 downto 0),
rd => psen,
databus => p0
);
-----------------------------------------------------------------
-- Test Bench Stimulator
-----------------------------------------------------------------
U_EXT_STIM : EXTERNAL_STIMULATOR
generic map (
STIMFILE => STIMFILE,
FILEPATH => TESTPATH & TESTNAME & "/"
)
port map (
p0 => p0,
p1 => p1,
p2 => p2,
p3 => p3,
rst => reset,
ea => ea
);
-----------------------------------------------------------------
-- Test Bench SIM Comparator
-----------------------------------------------------------------
U_EXT_SIMCOMP : EXTERNAL_COMPARATOR
generic map (
MODE => SIMCOMPMODE,
DUTY => SIMCOMPDUTY,
TESTNAME => TESTNAME,
TESTPATH => TESTPATH,
COMPFILE => SIMCOMPFILE,
DIFFFILE => SIMDIFFFILE
)
port map (
p0 => p0,
p1 => p1,
p2 => p2,
p3 => p3,
rst => reset,
ale => ale,
psen => psen,
ea => ea,
clk => xtal1
);
-----------------------------------------------------------------
-- Indirect drivers for ACS Comparator
-----------------------------------------------------------------
acscomp_wr_hand : acscomp_wr <= TO_X01(p3(6));
-----------------------------------------------------------------
-- Test Bench ACS Comparator
-----------------------------------------------------------------
U_EXT_ACSCOMP : EXTERNAL_ACCESS_COMPARATOR
generic map (
MODE => ACSCOMPMODE,
DATAWIDTH => 8,
ADDRWIDTH => 16,
TESTNAME => TESTNAME,
TESTPATH => TESTPATH,
COMPFILE => ACSCOMPFILE,
DIFFFILE => ACSDIFFFILE
)
port map (
rst => reset,
addrbus => addrbus(15 downto 0),
databus => p0,
wr => acscomp_wr
);
end STRUCTURAL;
--*******************************************************************--
-- pragma translation_off
configuration TYPICAL_C8051_EXTRAM_EXTROM of TB_C8051 is
for STRUCTURAL
-----------------------------------------------------------------
-- C8051 based chip instance
-----------------------------------------------------------------
for U_CHIP_C8051 : CHIP_C8051
use configuration C8051_LIB.CHIP_C8051_STRUCTURE;
end for;
-----------------------------------------------------------------
-- Test Bench Clock Generator
-----------------------------------------------------------------
for U_EXT_CLOCK : EXTERNAL_CLOCK_GENERATOR
use entity C8051_LIB.EXTERNAL_CLOCK_GENERATOR(SIM);
end for;
-----------------------------------------------------------------
-- Test Bench Shift Register unit
-- Configuration for Multiprocessor Test Bench only
-- It should not be used in other cases
-----------------------------------------------------------------
--for U_EXT_SHIFT0 : EXTERNAL_SHIFT_REGISTER
--use entity C8051_LIB.EXTERNAL_SHIFT_REGISTER(SIM);
--end for;
-----------------------------------------------------------------
-----------------------------------------------------------------
-- Test Bench Shift Register unit
-- Configuration for Multiprocessor Test Bench only
-- It should not be used in other cases
-----------------------------------------------------------------
--for U_EXT_SHIFT1 : EXTERNAL_SHIFT_REGISTER
--use entity C8051_LIB.EXTERNAL_SHIFT_REGISTER(SIM);
--end for;
-----------------------------------------------------------------
-----------------------------------------------------------------
-- Address latch register
-----------------------------------------------------------------
for U_LATCH : EXTERNAL_LATCH_REGISTER
use entity C8051_LIB.EXTERNAL_LATCH_REGISTER(SIM);
end for;
-----------------------------------------------------------------
-- Test Bench Data Memory unit
-----------------------------------------------------------------
for U_EXT_RAM : EXTERNAL_DATA_MEMORY
use entity C8051_LIB.EXTERNAL_DATA_MEMORY(SIM);
end for;
-----------------------------------------------------------------
-- Test Bench Program Memory unit
-----------------------------------------------------------------
for U_EXT_ROM : EXTERNAL_PROGRAM_MEMORY
use entity C8051_LIB.EXTERNAL_PROGRAM_MEMORY(SIM);
end for;
-----------------------------------------------------------------
-- Test Bench Stimulator
-----------------------------------------------------------------
for U_EXT_STIM : EXTERNAL_STIMULATOR
use entity C8051_LIB.EXTERNAL_STIMULATOR(SIM);
end for;
-----------------------------------------------------------------
-- Test Bench SIM Comparator
-----------------------------------------------------------------
for U_EXT_SIMCOMP : EXTERNAL_COMPARATOR
use entity C8051_LIB.EXTERNAL_COMPARATOR(SIM);
end for;
-----------------------------------------------------------------
-- Test Bench ACS Comparator
-----------------------------------------------------------------
for U_EXT_ACSCOMP : EXTERNAL_ACCESS_COMPARATOR
use entity C8051_LIB.EXTERNAL_ACCESS_COMPARATOR(SIM);
end for;
end for;
end TYPICAL_C8051_EXTRAM_EXTROM;
-- pragma translation_on
--*******************************************************************--
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