stm32f10x_usart.txt

STM32F103ZET6+UCOSII+UCGUI源码

; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\stm32f10x_usart.o --depend=.\Obj\stm32f10x_usart.d --device=DARMSTM --apcs=interwork -O3 -I..\..\include -I..\..\..\FWLib\library\inc -I..\..\..\USBLib\library\inc -I..\..\Config -I..\..\GUI\Core -I..\..\GUI\Font -I..\..\GUI\ConvertColor -I..\..\GUI\AntiAlias -I..\..\GUI\ConvertMono -I..\..\GUI\JPEG -I..\..\GUI\MemDev -I..\..\GUI\MultiLayer -I..\..\GUI\Widget -I..\..\GUI\WM -IC:\Keil\ARM\INC\ST\STM32F10x ..\..\..\FWLib\library\src\stm32f10x_usart.c]
                          THUMB

                          AREA ||i.USART_ClearFlag||, CODE, READONLY, ALIGN=1

                  USART_ClearFlag PROC
;;;866    *******************************************************************************/
;;;867    void USART_ClearFlag(USART_TypeDef* USARTx, u16 USART_FLAG)
000000  43c9              MVNS     r1,r1
;;;868    {
;;;869      /* Check the parameters */
;;;870      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;871      assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
;;;872      assert_param(IS_USART_PERIPH_FLAG(USARTx, USART_FLAG)); /* The CTS flag is not available for UART4 and UART5 */   
;;;873       
;;;874      USARTx->SR = (u16)~USART_FLAG;
000002  8001              STRH     r1,[r0,#0]
;;;875    }
000004  4770              BX       lr
;;;876    
                          ENDP


                          AREA ||i.USART_ClearITPendingBit||, CODE, READONLY, ALIGN=1

                  USART_ClearITPendingBit PROC
;;;973    *******************************************************************************/
;;;974    void USART_ClearITPendingBit(USART_TypeDef* USARTx, u16 USART_IT)
000000  0a0a              LSRS     r2,r1,#8
;;;975    {
;;;976      u16 bitpos = 0x00, itmask = 0x00;
;;;977    
;;;978      /* Check the parameters */
;;;979      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;980      assert_param(IS_USART_CLEAR_IT(USART_IT));
;;;981      assert_param(IS_USART_PERIPH_IT(USARTx, USART_IT)); /* The CTS interrupt is not available for UART4 and UART5 */
;;;982      
;;;983      bitpos = USART_IT >> 0x08;
;;;984    
;;;985      itmask = (u16)((u16)0x01 << bitpos);
000002  2101              MOVS     r1,#1
000004  4091              LSLS     r1,r1,r2
;;;986      USARTx->SR = (u16)~itmask;
000006  43c9              MVNS     r1,r1
000008  8001              STRH     r1,[r0,#0]
;;;987    }
00000a  4770              BX       lr
;;;988    
                          ENDP


                          AREA ||i.USART_ClockInit||, CODE, READONLY, ALIGN=1

                  USART_ClockInit PROC
;;;254    *******************************************************************************/
;;;255    void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
000000  b530              PUSH     {r4,r5,lr}
;;;256    {
;;;257      u32 tmpreg = 0x00;
;;;258    
;;;259      /* Check the parameters */
;;;260      assert_param(IS_USART_123_PERIPH(USARTx));
;;;261      assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
;;;262      assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
;;;263      assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
;;;264      assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));              
;;;265      
;;;266    /*---------------------------- USART CR2 Configuration -----------------------*/
;;;267      tmpreg = USARTx->CR2;
000002  8a02              LDRH     r2,[r0,#0x10]
;;;268      /* Clear CLKEN, CPOL, CPHA and LBCL bits */
;;;269      tmpreg &= CR2_CLOCK_CLEAR_Mask;
000004  f24f03ff          MOV      r3,#0xf0ff
000008  401a              ANDS     r2,r2,r3
;;;270    
;;;271      /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
;;;272      /* Set CLKEN bit according to USART_Clock value */
;;;273      /* Set CPOL bit according to USART_CPOL value */
;;;274      /* Set CPHA bit according to USART_CPHA value */
;;;275      /* Set LBCL bit according to USART_LastBit value */
;;;276      tmpreg |= (u32)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | 
00000a  880b              LDRH     r3,[r1,#0]
00000c  884d              LDRH     r5,[r1,#2]
00000e  888c              LDRH     r4,[r1,#4]
000010  88c9              LDRH     r1,[r1,#6]
000012  432b              ORRS     r3,r3,r5
000014  430c              ORRS     r4,r4,r1
000016  4323              ORRS     r3,r3,r4
000018  4313              ORRS     r3,r3,r2
;;;277                     USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit;
;;;278    
;;;279      /* Write to USART CR2 */
;;;280      USARTx->CR2 = (u16)tmpreg;
00001a  8203              STRH     r3,[r0,#0x10]
;;;281    }
00001c  bd30              POP      {r4,r5,pc}
;;;282    
                          ENDP


                          AREA ||i.USART_ClockStructInit||, CODE, READONLY, ALIGN=1

                  USART_ClockStructInit PROC
;;;290    *******************************************************************************/
;;;291    void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
000000  2100              MOVS     r1,#0
;;;292    {
;;;293      /* USART_ClockInitStruct members default value */
;;;294      USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
000002  8001              STRH     r1,[r0,#0]
;;;295      USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
000004  8041              STRH     r1,[r0,#2]
;;;296      USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
000006  8081              STRH     r1,[r0,#4]
;;;297      USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
000008  80c1              STRH     r1,[r0,#6]
;;;298    }
00000a  4770              BX       lr
;;;299    
                          ENDP


                          AREA ||i.USART_Cmd||, CODE, READONLY, ALIGN=1

                  USART_Cmd PROC
;;;310    *******************************************************************************/
;;;311    void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
000000  2900              CMP      r1,#0
;;;312    {
;;;313      /* Check the parameters */
;;;314      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;315      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;316      
;;;317      if (NewState != DISABLE)
;;;318      {
;;;319        /* Enable the selected USART by setting the UE bit in the CR1 register */
;;;320        USARTx->CR1 |= CR1_UE_Set;
000002  8981              LDRH     r1,[r0,#0xc]
000004  d002              BEQ      |L5.12|
000006  f4415100          ORR      r1,r1,#0x2000
00000a  e001              B        |L5.16|
                  |L5.12|
;;;321      }
;;;322      else
;;;323      {
;;;324        /* Disable the selected USART by clearing the UE bit in the CR1 register */
;;;325        USARTx->CR1 &= CR1_UE_Reset;
00000c  f4215100          BIC      r1,r1,#0x2000
                  |L5.16|
000010  8181              STRH     r1,[r0,#0xc]          ;320
;;;326      }
;;;327    }
000012  4770              BX       lr
;;;328    
                          ENDP


                          AREA ||i.USART_DMACmd||, CODE, READONLY, ALIGN=1

                  USART_DMACmd PROC
;;;412    *******************************************************************************/
;;;413    void USART_DMACmd(USART_TypeDef* USARTx, u16 USART_DMAReq, FunctionalState NewState)
000000  2a00              CMP      r2,#0
;;;414    {
;;;415      /* Check the parameters */
;;;416      assert_param(IS_USART_1234_PERIPH(USARTx));
;;;417      assert_param(IS_USART_DMAREQ(USART_DMAReq));  
;;;418      assert_param(IS_FUNCTIONAL_STATE(NewState)); 
;;;419    
;;;420      if (NewState != DISABLE)
;;;421      {
;;;422        /* Enable the DMA transfer for selected requests by setting the DMAT and/or
;;;423           DMAR bits in the USART CR3 register */
;;;424        USARTx->CR3 |= USART_DMAReq;
000002  8a82              LDRH     r2,[r0,#0x14]
000004  d001              BEQ      |L6.10|
000006  430a              ORRS     r2,r2,r1
000008  e000              B        |L6.12|
                  |L6.10|
;;;425      }
;;;426      else
;;;427      {
;;;428        /* Disable the DMA transfer for selected requests by clearing the DMAT and/or
;;;429           DMAR bits in the USART CR3 register */
;;;430        USARTx->CR3 &= (u16)~USART_DMAReq;
00000a  438a              BICS     r2,r2,r1
                  |L6.12|
00000c  8282              STRH     r2,[r0,#0x14]         ;424
;;;431      }
;;;432    }
00000e  4770              BX       lr
;;;433    
                          ENDP


                          AREA ||i.USART_DeInit||, CODE, READONLY, ALIGN=2

                  USART_DeInit PROC
;;;89     *******************************************************************************/
;;;90     void USART_DeInit(USART_TypeDef* USARTx)
000000  4a18              LDR      r2,|L7.100|
;;;91     {
000002  b510              PUSH     {r4,lr}
;;;92       /* Check the parameters */
;;;93       assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;94     
;;;95       switch (*(u32*)&USARTx)
000004  1a81              SUBS     r1,r0,r2
000006  1513              ASRS     r3,r2,#20
000008  4290              CMP      r0,r2
00000a  d01b              BEQ      |L7.68|
00000c  dc07              BGT      |L7.30|
00000e  4916              LDR      r1,|L7.104|
000010  1840              ADDS     r0,r0,r1
000012  d014              BEQ      |L7.62|
000014  4298              CMP      r0,r3
000016  d123              BNE      |L7.96|
;;;96       {
;;;97         case USART1_BASE:
;;;98           RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
;;;99           RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);
;;;100          break;
;;;101    
;;;102        case USART2_BASE:
;;;103          RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE);
;;;104          RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE);
;;;105          break;
;;;106    
;;;107        case USART3_BASE:
;;;108          RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE);
000018  2101              MOVS     r1,#1
00001a  048c              LSLS     r4,r1,#18
;;;109          RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE);
;;;110          break;
00001c  e017              B        |L7.78|
                  |L7.30|
00001e  4299              CMP      r1,r3                 ;95
000020  d013              BEQ      |L7.74|
000022  f5b14f6c          CMP      r1,#0xec00            ;95
000026  d11b              BNE      |L7.96|
000028  2101              MOVS     r1,#1                 ;98
00002a  038c              LSLS     r4,r1,#14             ;98
00002c  4620              MOV      r0,r4                 ;98
00002e  f7fffffe          BL       RCC_APB2PeriphResetCmd
000032  4620              MOV      r0,r4                 ;99
000034  e8bd4010          POP      {r4,lr}               ;99
000038  2100              MOVS     r1,#0                 ;99
00003a  f7ffbffe          B.W      RCC_APB2PeriphResetCmd
                  |L7.62|
00003e  2101              MOVS     r1,#1                 ;103
000040  044c              LSLS     r4,r1,#17             ;103
000042  e004              B        |L7.78|
                  |L7.68|
;;;111        
;;;112        case UART4_BASE:
;;;113          RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE);
000044  2101              MOVS     r1,#1
000046  04cc              LSLS     r4,r1,#19
;;;114          RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE);
;;;115          break;
000048  e001              B        |L7.78|
                  |L7.74|
;;;116        
;;;117        case UART5_BASE:
;;;118          RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE);
00004a  2101              MOVS     r1,#1
00004c  050c              LSLS     r4,r1,#20
                  |L7.78|
00004e  4620              MOV      r0,r4
000050  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;119          RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE);
000054  4620              MOV      r0,r4
000056  e8bd4010          POP      {r4,lr}
00005a  2100              MOVS     r1,#0
00005c  f7ffbffe          B.W      RCC_APB1PeriphResetCmd
                  |L7.96|
;;;120          break;            
;;;121    
;;;122        default:
;;;123          break;
;;;124      }
;;;125    }
000060  bd10              POP      {r4,pc}
;;;126    
                          ENDP

000062  0000              DCW      0x0000
                  |L7.100|
                          DCD      0x40004c00
                  |L7.104|
                          DCD      0xbfffbc00

                          AREA ||i.USART_GetFlagStatus||, CODE, READONLY, ALIGN=1

                  USART_GetFlagStatus PROC
;;;820    *******************************************************************************/
;;;821    FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, u16 USART_FLAG)
000000  4602              MOV      r2,r0
;;;822    {
;;;823      FlagStatus bitstatus = RESET;
;;;824    
;;;825      /* Check the parameters */
;;;826      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;827      assert_param(IS_USART_FLAG(USART_FLAG));
;;;828      assert_param(IS_USART_PERIPH_FLAG(USARTx, USART_FLAG)); /* The CTS flag is not available for UART4 and UART5 */   
;;;829    
;;;830      if ((USARTx->SR & USART_FLAG) != (u16)RESET)
000002  8812              LDRH     r2,[r2,#0]
000004  2000              MOVS     r0,#0                 ;823
000006  420a              TST      r2,r1
000008  d000              BEQ      |L8.12|
;;;831      {
;;;832        bitstatus = SET;
00000a  2001              MOVS     r0,#1
                  |L8.12|
;;;833      }
;;;834      else
;;;835      {
;;;836        bitstatus = RESET;
;;;837      }
;;;838      return bitstatus;
;;;839    }
00000c  4770              BX       lr
;;;840    
                          ENDP


                          AREA ||i.USART_GetITStatus||, CODE, READONLY, ALIGN=1

                  USART_GetITStatus PROC
;;;899    *******************************************************************************/
;;;900    ITStatus USART_GetITStatus(USART_TypeDef* USARTx, u16 USART_IT)
000000  b570              PUSH     {r4-r6,lr}
;;;901    {
;;;902      u32 bitpos = 0x00, itmask = 0x00, usartreg = 0x00;
;;;903      ITStatus bitstatus = RESET;
;;;904    
;;;905      /* Check the parameters */
;;;906      assert_param(IS_USART_ALL_PERIPH(USARTx));
;;;907      assert_param(IS_USART_IT(USART_IT));
;;;908      assert_param(IS_USART_PERIPH_IT(USARTx, USART_IT)); /* The CTS interrupt is not available for UART4 and UART5 */  
;;;909      
;;;910      /* Get the USART register index */
;;;911      usartreg = (((u8)USART_IT) >> 0x05);
;;;912    
;;;913      /* Get the interrupt position */
;;;914      itmask = USART_IT & IT_Mask;
000002  f001061f          AND      r6,r1,#0x1f
;;;915    
;;;916      itmask = (u32)0x01 << itmask;
000006  2501              MOVS     r5,#1
000008  2400              MOVS     r4,#0                 ;903
00000a  f3c11342          UBFX     r3,r1,#5,#3           ;911
00000e  fa05f206          LSL      r2,r5,r6
;;;917      
;;;918      if (usartreg == 0x01) /* The IT  is in CR1 register */
000012  2b01              CMP      r3,#1
000014  d101              BNE      |L9.26|
;;;919      {
;;;920        itmask &= USARTx->CR1;
000016  8983              LDRH     r3,[r0,#0xc]