stm32f10x_i2c.txt

STM32F103ZET6+UCOSII+UCGUI源码

;;;1026     {
;;;1027       /* I2C_FLAG is set */
;;;1028       bitstatus = SET;
000014  2001              MOVS     r0,#1
                  |L16.22|
;;;1029     }
;;;1030     else
;;;1031     {
;;;1032       /* I2C_FLAG is reset */
;;;1033       bitstatus = RESET;
;;;1034     }
;;;1035     /* Return the I2C_FLAG status */
;;;1036     return  bitstatus;
;;;1037   }
000016  4770              BX       lr
;;;1038   
                          ENDP


                          AREA ||i.I2C_GetITStatus||, CODE, READONLY, ALIGN=1

                  I2C_GetITStatus PROC
;;;1131   *******************************************************************************/
;;;1132   ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, u32 I2C_IT)
000000  4602              MOV      r2,r0
;;;1133   {
;;;1134     ITStatus bitstatus = RESET;
;;;1135     u32 i2cstatus = 0;
;;;1136     u32 flag1 = 0, flag2 = 0;
;;;1137   
;;;1138     /* Check the parameters */
;;;1139     assert_param(IS_I2C_ALL_PERIPH(I2Cx));
;;;1140     assert_param(IS_I2C_GET_IT(I2C_IT));
;;;1141   
;;;1142     /* Read the I2Cx status register */
;;;1143     flag1 = I2Cx->SR1;
000002  8a93              LDRH     r3,[r2,#0x14]
000004  2000              MOVS     r0,#0                 ;1134
;;;1144     flag2 = I2Cx->SR2;
000006  8b12              LDRH     r2,[r2,#0x18]
;;;1145     flag2 = (flag2 & FLAG_Mask) << 16;
;;;1146   
;;;1147     /* Get the I2C status value */
;;;1148     i2cstatus = flag1 | flag2;
;;;1149   
;;;1150     /* Get bit[23:0] of the flag */
;;;1151     I2C_IT &= FLAG_Mask;
000008  f021417f          BIC      r1,r1,#0xff000000
00000c  ea434302          ORR      r3,r3,r2,LSL #16      ;1148
;;;1152   
;;;1153     /* Check the status of the specified I2C flag */
;;;1154     if ((i2cstatus & I2C_IT) != (u32)RESET)
000010  420b              TST      r3,r1
000012  d000              BEQ      |L17.22|
;;;1155     {
;;;1156       /* I2C_IT is set */
;;;1157       bitstatus = SET;
000014  2001              MOVS     r0,#1
                  |L17.22|
;;;1158     }
;;;1159     else
;;;1160     {
;;;1161       /* I2C_IT is reset */
;;;1162       bitstatus = RESET;
;;;1163     }
;;;1164     /* Return the I2C_IT status */
;;;1165     return  bitstatus;
;;;1166   }
000016  4770              BX       lr
;;;1167   
                          ENDP


                          AREA ||i.I2C_GetLastEvent||, CODE, READONLY, ALIGN=1

                  I2C_GetLastEvent PROC
;;;895    *******************************************************************************/
;;;896    u32 I2C_GetLastEvent(I2C_TypeDef* I2Cx)
000000  8a81              LDRH     r1,[r0,#0x14]
;;;897    {
;;;898      u32 lastevent = 0;
;;;899      u32 flag1 = 0, flag2 = 0;
;;;900    
;;;901      /* Check the parameters */
;;;902      assert_param(IS_I2C_ALL_PERIPH(I2Cx));
;;;903    
;;;904      /* Read the I2Cx status register */
;;;905      flag1 = I2Cx->SR1;
;;;906      flag2 = I2Cx->SR2;
000002  8b00              LDRH     r0,[r0,#0x18]
;;;907      flag2 = flag2 << 16;
;;;908    
;;;909      /* Get the last event value from I2C status register */
;;;910      lastevent = (flag1 | flag2) & FLAG_Mask;
000004  ea414100          ORR      r1,r1,r0,LSL #16
000008  f021407f          BIC      r0,r1,#0xff000000
;;;911    
;;;912      /* Return status */
;;;913      return lastevent;
;;;914    }
00000c  4770              BX       lr
;;;915    
                          ENDP


                          AREA ||i.I2C_GetPEC||, CODE, READONLY, ALIGN=1

                  I2C_GetPEC PROC
;;;796    *******************************************************************************/
;;;797    u8 I2C_GetPEC(I2C_TypeDef* I2Cx)
000000  8b00              LDRH     r0,[r0,#0x18]
;;;798    {
;;;799      /* Check the parameters */
;;;800      assert_param(IS_I2C_ALL_PERIPH(I2Cx));
;;;801    
;;;802      /* Return the selected I2C PEC value */
;;;803      return ((I2Cx->SR2) >> 8);
000002  0a00              LSRS     r0,r0,#8
;;;804    }
000004  4770              BX       lr
;;;805    
                          ENDP


                          AREA ||i.I2C_ITConfig||, CODE, READONLY, ALIGN=1

                  I2C_ITConfig PROC
;;;534    *******************************************************************************/
;;;535    void I2C_ITConfig(I2C_TypeDef* I2Cx, u16 I2C_IT, FunctionalState NewState)
000000  2a00              CMP      r2,#0
;;;536    {
;;;537      /* Check the parameters */
;;;538      assert_param(IS_I2C_ALL_PERIPH(I2Cx));
;;;539      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;540      assert_param(IS_I2C_CONFIG_IT(I2C_IT));
;;;541      
;;;542      if (NewState != DISABLE)
;;;543      {
;;;544        /* Enable the selected I2C interrupts */
;;;545        I2Cx->CR2 |= I2C_IT;
000002  8882              LDRH     r2,[r0,#4]
000004  d001              BEQ      |L20.10|
000006  430a              ORRS     r2,r2,r1
000008  e000              B        |L20.12|
                  |L20.10|
;;;546      }
;;;547      else
;;;548      {
;;;549        /* Disable the selected I2C interrupts */
;;;550        I2Cx->CR2 &= (u16)~I2C_IT;
00000a  438a              BICS     r2,r2,r1
                  |L20.12|
00000c  8082              STRH     r2,[r0,#4]            ;545
;;;551      }
;;;552    }
00000e  4770              BX       lr
;;;553    
                          ENDP


                          AREA ||i.I2C_Init||, CODE, READONLY, ALIGN=2

                  I2C_Init PROC
;;;145    ******************************************************************************/
;;;146    void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
000000  b570              PUSH     {r4-r6,lr}
;;;147    {
000002  4604              MOV      r4,r0
;;;148      u16 tmpreg = 0, freqrange = 0;
;;;149      u16 result = 0x04;
;;;150      u32 pclk1 = 8000000;
;;;151      RCC_ClocksTypeDef  rcc_clocks;
;;;152    
;;;153      /* Check the parameters */
;;;154      assert_param(IS_I2C_ALL_PERIPH(I2Cx));
;;;155      assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
;;;156      assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));
;;;157      assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
;;;158      assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));
;;;159      assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
;;;160      assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed));
;;;161    
;;;162    /*---------------------------- I2Cx CR2 Configuration ------------------------*/
;;;163      /* Get the I2Cx CR2 value */
;;;164      tmpreg = I2Cx->CR2;
000004  8880              LDRH     r0,[r0,#4]
000006  b086              SUB      sp,sp,#0x18           ;147
000008  460d              MOV      r5,r1                 ;147
;;;165      /* Clear frequency FREQ[5:0] bits */
;;;166      tmpreg &= CR2_FREQ_Reset;
00000a  f020063f          BIC      r6,r0,#0x3f
;;;167      /* Get pclk1 frequency value */
;;;168      RCC_GetClocksFreq(&rcc_clocks);
00000e  a801              ADD      r0,sp,#4
000010  f7fffffe          BL       RCC_GetClocksFreq
;;;169      pclk1 = rcc_clocks.PCLK1_Frequency;
;;;170      /* Set frequency bits depending on pclk1 value */
;;;171      freqrange = (u16)(pclk1 / 1000000);
000014  4926              LDR      r1,|L21.176|
000016  9803              LDR      r0,[sp,#0xc]
000018  fbb0f1f1          UDIV     r1,r0,r1
00001c  b289              UXTH     r1,r1
;;;172      tmpreg |= freqrange;
00001e  430e              ORRS     r6,r6,r1
;;;173      /* Write to I2Cx CR2 */
;;;174      I2Cx->CR2 = tmpreg;
000020  80a6              STRH     r6,[r4,#4]
;;;175    
;;;176    /*---------------------------- I2Cx CCR Configuration ------------------------*/
;;;177      /* Disable the selected I2C peripheral to configure TRISE */
;;;178      I2Cx->CR1 &= CR1_PE_Reset;
000022  8822              LDRH     r2,[r4,#0]
000024  f0220201          BIC      r2,r2,#1
000028  8022              STRH     r2,[r4,#0]
;;;179    
;;;180      /* Reset tmpreg value */
;;;181      /* Clear F/S, DUTY and CCR[11:0] bits */
;;;182      tmpreg = 0;
;;;183    
;;;184      /* Configure speed in standard mode */
;;;185      if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
00002a  4b22              LDR      r3,|L21.180|
00002c  68ea              LDR      r2,[r5,#0xc]
00002e  429a              CMP      r2,r3
000030  d81c              BHI      |L21.108|
;;;186      {
;;;187        /* Standard mode speed calculate */
;;;188        result = (u16)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));
000032  0052              LSLS     r2,r2,#1
000034  fbb0f0f2          UDIV     r0,r0,r2
000038  b280              UXTH     r0,r0
;;;189        /* Test if CCR value is under 0x4*/
;;;190        if (result < 0x04)
00003a  2804              CMP      r0,#4
00003c  d200              BCS      |L21.64|
;;;191        {
;;;192          /* Set minimum allowed value */
;;;193          result = 0x04;  
00003e  2004              MOVS     r0,#4
                  |L21.64|
;;;194        }
;;;195        /* Set speed value for standard mode */
;;;196        tmpreg |= result;	  
;;;197        /* Set Maximum Rise Time for standard mode */
;;;198        I2Cx->TRISE = freqrange + 1; 
000040  1c49              ADDS     r1,r1,#1
000042  8421              STRH     r1,[r4,#0x20]
;;;199      }
;;;200      /* Configure speed in fast mode */
;;;201      else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/
;;;202      {
;;;203        if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
;;;204        {
;;;205          /* Fast mode speed calculate: Tlow/Thigh = 2 */
;;;206          result = (u16)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));
;;;207        }
;;;208        else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/
;;;209        {
;;;210          /* Fast mode speed calculate: Tlow/Thigh = 16/9 */
;;;211          result = (u16)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));
;;;212          /* Set DUTY bit */
;;;213          result |= I2C_DutyCycle_16_9;
;;;214        }
;;;215        /* Test if CCR value is under 0x1*/
;;;216        if ((result & CCR_CCR_Set) == 0)
;;;217        {
;;;218          /* Set minimum allowed value */
;;;219          result |= (u16)0x0001;  
;;;220        }
;;;221        /* Set speed value and set F/S bit for fast mode */
;;;222        tmpreg |= result | CCR_FS_Set;
;;;223        /* Set Maximum Rise Time for fast mode */
;;;224        I2Cx->TRISE = (u16)(((freqrange * 300) / 1000) + 1);  
;;;225      }
;;;226      /* Write to I2Cx CCR */
;;;227      I2Cx->CCR = tmpreg;
000044  83a0              STRH     r0,[r4,#0x1c]
;;;228    
;;;229      /* Enable the selected I2C peripheral */
;;;230      I2Cx->CR1 |= CR1_PE_Set;
000046  8820              LDRH     r0,[r4,#0]
000048  f0400001          ORR      r0,r0,#1
00004c  8020              STRH     r0,[r4,#0]
;;;231    
;;;232    /*---------------------------- I2Cx CR1 Configuration ------------------------*/
;;;233      /* Get the I2Cx CR1 value */
;;;234      tmpreg = I2Cx->CR1;
00004e  8820              LDRH     r0,[r4,#0]
;;;235      /* Clear ACK, SMBTYPE and  SMBUS bits */
;;;236      tmpreg &= CR1_CLEAR_Mask;
000050  f64f31f5          MOV      r1,#0xfbf5
000054  4008              ANDS     r0,r0,r1
;;;237      /* Configure I2Cx: mode and acknowledgement */
;;;238      /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */
;;;239      /* Set ACK bit according to I2C_Ack value */
;;;240      tmpreg |= (u16)((u32)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
000056  8829              LDRH     r1,[r5,#0]
000058  88ea              LDRH     r2,[r5,#6]
00005a  4311              ORRS     r1,r1,r2
00005c  4301              ORRS     r1,r1,r0
;;;241      /* Write to I2Cx CR1 */
;;;242      I2Cx->CR1 = tmpreg;
00005e  8021              STRH     r1,[r4,#0]
;;;243    
;;;244    /*---------------------------- I2Cx OAR1 Configuration -----------------------*/
;;;245      /* Set I2Cx Own Address1 and acknowledged address */
;;;246      I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
000060  8928              LDRH     r0,[r5,#8]
000062  88a9              LDRH     r1,[r5,#4]
000064  4308              ORRS     r0,r0,r1
000066  8120              STRH     r0,[r4,#8]
;;;247    }
000068  b006              ADD      sp,sp,#0x18
00006a  bd70              POP      {r4-r6,pc}
                  |L21.108|
00006c  886b              LDRH     r3,[r5,#2]            ;203
00006e  f5a3463f          SUB      r6,r3,#0xbf00         ;203
000072  3eff              SUBS     r6,r6,#0xff           ;203
000074  d105              BNE      |L21.130|
000076  eb020242          ADD      r2,r2,r2,LSL #1       ;206
00007a  fbb0f0f2          UDIV     r0,r0,r2              ;206
00007e  b280              UXTH     r0,r0                 ;206
000080  e008              B        |L21.148|
                  |L21.130|
000082  eb0203c2          ADD      r3,r2,r2,LSL #3       ;211
000086  eb031202          ADD      r2,r3,r2,LSL #4       ;211
00008a  fbb0f0f2          UDIV     r0,r0,r2              ;211
00008e  b280              UXTH     r0,r0                 ;211
000090  f4404080          ORR      r0,r0,#0x4000         ;213
                  |L21.148|
000094  0502              LSLS     r2,r0,#20             ;216
000096  d101              BNE      |L21.156|
000098  f0400001          ORR      r0,r0,#1              ;219
                  |L21.156|
00009c  f44f7296          MOV      r2,#0x12c             ;224
0000a0  4351              MULS     r1,r2,r1              ;224
0000a2  f44f727a          MOV      r2,#0x3e8             ;224
0000a6  fbb1f1f2          UDIV     r1,r1,r2              ;224
0000aa  f4404000          ORR      r0,r0,#0x8000         ;222
0000ae  e7c7              B        |L21.64|
;;;248    
                          ENDP