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📄 stm32f10x_spi.txt

📁 STM32F103ZET6+UCOSII+UCGUI源码
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;;;813      assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
;;;814    
;;;815      /* Get the SPI/I2S IT index */
;;;816      itpos = (u16)((u16)0x01 << (SPI_I2S_IT & (u8)0x0F));
000002  f001030f          AND      r3,r1,#0xf
000006  2401              MOVS     r4,#1
000008  4602              MOV      r2,r0                 ;807
00000a  fa04f303          LSL      r3,r4,r3
00000e  2000              MOVS     r0,#0                 ;808
;;;817    
;;;818      /* Get the SPI/I2S IT mask */
;;;819      itmask = SPI_I2S_IT >> 4;
000010  0909              LSRS     r1,r1,#4
;;;820      /* Set the IT mask */
;;;821      itmask = (u16)((u16)0x01 << itmask);
000012  408c              LSLS     r4,r4,r1
000014  b2a1              UXTH     r1,r4
;;;822      /* Get the SPI_I2S_IT enable bit status */
;;;823      enablestatus = (SPIx->CR2 & itmask) ;
000016  8894              LDRH     r4,[r2,#4]
000018  b29b              UXTH     r3,r3                 ;816
;;;824    
;;;825      /* Check the status of the specified SPI/I2S interrupt */
;;;826      if (((SPIx->SR & itpos) != (u16)RESET) && enablestatus)
00001a  8912              LDRH     r2,[r2,#8]
00001c  ea040401          AND      r4,r4,r1              ;823
000020  421a              TST      r2,r3
000022  d002              BEQ      |L15.42|
000024  2c00              CMP      r4,#0
000026  d000              BEQ      |L15.42|
;;;827      {
;;;828        /* SPI_I2S_IT is set */
;;;829        bitstatus = SET;
000028  2001              MOVS     r0,#1
                  |L15.42|
;;;830      }
;;;831      else
;;;832      {
;;;833        /* SPI_I2S_IT is reset */
;;;834        bitstatus = RESET;
;;;835      }
;;;836      /* Return the SPI_I2S_IT status */
;;;837      return bitstatus;
;;;838    }
00002a  bd10              POP      {r4,pc}
;;;839    
                          ENDP


                          AREA ||i.SPI_I2S_ITConfig||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ITConfig PROC
;;;395    *******************************************************************************/
;;;396    void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, u8 SPI_I2S_IT, FunctionalState NewState)
000000  0909              LSRS     r1,r1,#4
;;;397    {
;;;398      u16 itpos = 0, itmask = 0 ;
;;;399    
;;;400      /* Check the parameters */
;;;401      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;402      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;403      assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
;;;404    
;;;405      /* Get the SPI/I2S IT index */
;;;406      itpos = SPI_I2S_IT >> 4;
;;;407      /* Set the IT mask */
;;;408      itmask = (u16)((u16)1 << itpos);
000002  2301              MOVS     r3,#1
000004  408b              LSLS     r3,r3,r1
;;;409    
;;;410      if (NewState != DISABLE)
000006  2a00              CMP      r2,#0
;;;411      {
;;;412        /* Enable the selected SPI/I2S interrupt */
;;;413        SPIx->CR2 |= itmask;
000008  8882              LDRH     r2,[r0,#4]
00000a  b299              UXTH     r1,r3                 ;408
00000c  d001              BEQ      |L16.18|
00000e  430a              ORRS     r2,r2,r1
000010  e000              B        |L16.20|
                  |L16.18|
;;;414      }
;;;415      else
;;;416      {
;;;417        /* Disable the selected SPI/I2S interrupt */
;;;418        SPIx->CR2 &= (u16)~itmask;
000012  438a              BICS     r2,r2,r1
                  |L16.20|
000014  8082              STRH     r2,[r0,#4]            ;413
;;;419      }
;;;420    }
000016  4770              BX       lr
;;;421    
                          ENDP


                          AREA ||i.SPI_I2S_ReceiveData||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ReceiveData PROC
;;;485    *******************************************************************************/
;;;486    u16 SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
000000  8980              LDRH     r0,[r0,#0xc]
;;;487    {
;;;488      /* Check the parameters */
;;;489      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;490      
;;;491      /* Return the data in the DR register */
;;;492      return SPIx->DR;
;;;493    }
000002  4770              BX       lr
;;;494    
                          ENDP


                          AREA ||i.SPI_I2S_SendData||, CODE, READONLY, ALIGN=1

                  SPI_I2S_SendData PROC
;;;467    *******************************************************************************/
;;;468    void SPI_I2S_SendData(SPI_TypeDef* SPIx, u16 Data)
000000  8181              STRH     r1,[r0,#0xc]
;;;469    {
;;;470      /* Check the parameters */
;;;471      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;472      
;;;473      /* Write in the DR register the data to be sent */
;;;474      SPIx->DR = Data;
;;;475    }
000002  4770              BX       lr
;;;476    
                          ENDP


                          AREA ||i.SPI_Init||, CODE, READONLY, ALIGN=1

                  SPI_Init PROC
;;;105    ******************************************************************************/
;;;106    void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
000000  b570              PUSH     {r4-r6,lr}
;;;107    {
;;;108      u16 tmpreg = 0;
;;;109      
;;;110      /* check the parameters */
;;;111      assert_param(IS_SPI_ALL_PERIPH(SPIx));   
;;;112      
;;;113      /* Check the SPI parameters */
;;;114      assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
;;;115      assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
;;;116      assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
;;;117      assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
;;;118      assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
;;;119      assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
;;;120      assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
;;;121      assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
;;;122      assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
;;;123    
;;;124    /*---------------------------- SPIx CR1 Configuration ------------------------*/
;;;125      /* Get the SPIx CR1 value */
;;;126      tmpreg = SPIx->CR1;
000002  8802              LDRH     r2,[r0,#0]
;;;127      /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
;;;128      tmpreg &= CR1_CLEAR_Mask;
;;;129      /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
;;;130         master/salve mode, CPOL and CPHA */
;;;131      /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
;;;132      /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
;;;133      /* Set LSBFirst bit according to SPI_FirstBit value */
;;;134      /* Set BR bits according to SPI_BaudRatePrescaler value */
;;;135      /* Set CPOL bit according to SPI_CPOL value */
;;;136      /* Set CPHA bit according to SPI_CPHA value */
;;;137      tmpreg |= (u16)((u32)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
000004  884d              LDRH     r5,[r1,#2]
000006  f4025341          AND      r3,r2,#0x3040         ;128
00000a  880a              LDRH     r2,[r1,#0]
00000c  888c              LDRH     r4,[r1,#4]
00000e  88ce              LDRH     r6,[r1,#6]
000010  432a              ORRS     r2,r2,r5
000012  4334              ORRS     r4,r4,r6
000014  890d              LDRH     r5,[r1,#8]
000016  4322              ORRS     r2,r2,r4
000018  894c              LDRH     r4,[r1,#0xa]
00001a  432a              ORRS     r2,r2,r5
00001c  898d              LDRH     r5,[r1,#0xc]
00001e  4322              ORRS     r2,r2,r4
000020  89cc              LDRH     r4,[r1,#0xe]
000022  432a              ORRS     r2,r2,r5
000024  4322              ORRS     r2,r2,r4
000026  431a              ORRS     r2,r2,r3
;;;138                      SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |  
;;;139                      SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |  
;;;140                      SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
;;;141      /* Write to SPIx CR1 */
;;;142      SPIx->CR1 = tmpreg;
000028  8002              STRH     r2,[r0,#0]
;;;143      
;;;144      /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
;;;145      SPIx->I2SCFGR &= SPI_Mode_Select;		
00002a  8b82              LDRH     r2,[r0,#0x1c]
00002c  f4226200          BIC      r2,r2,#0x800
000030  8382              STRH     r2,[r0,#0x1c]
;;;146    
;;;147    /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
;;;148      /* Write to SPIx CRCPOLY */
;;;149      SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
000032  8a09              LDRH     r1,[r1,#0x10]
000034  8201              STRH     r1,[r0,#0x10]
;;;150    }
000036  bd70              POP      {r4-r6,pc}
;;;151    
                          ENDP


                          AREA ||i.SPI_NSSInternalSoftwareConfig||, CODE, READONLY, ALIGN=1

                  SPI_NSSInternalSoftwareConfig PROC
;;;506    *******************************************************************************/
;;;507    void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft)
000000  f5a1427e          SUB      r2,r1,#0xfe00
;;;508    {
;;;509      /* Check the parameters */
;;;510      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;511      assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
;;;512    
;;;513      if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
;;;514      {
;;;515        /* Set NSS pin internally by software */
;;;516        SPIx->CR1 |= SPI_NSSInternalSoft_Set;
000004  8801              LDRH     r1,[r0,#0]
000006  3aff              SUBS     r2,r2,#0xff           ;513
000008  d002              BEQ      |L20.16|
00000a  f4417180          ORR      r1,r1,#0x100
00000e  e001              B        |L20.20|
                  |L20.16|
;;;517      }
;;;518      else
;;;519      {
;;;520        /* Reset NSS pin internally by software */
;;;521        SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
000010  f4217180          BIC      r1,r1,#0x100
                  |L20.20|
000014  8001              STRH     r1,[r0,#0]            ;516
;;;522      }
;;;523    }
000016  4770              BX       lr
;;;524    
                          ENDP


                          AREA ||i.SPI_SSOutputCmd||, CODE, READONLY, ALIGN=1

                  SPI_SSOutputCmd PROC
;;;533    *******************************************************************************/
;;;534    void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000000  2900              CMP      r1,#0
;;;535    {
;;;536      /* Check the parameters */
;;;537      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;538      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;539    
;;;540      if (NewState != DISABLE)
;;;541      {
;;;542        /* Enable the selected SPI SS output */
;;;543        SPIx->CR2 |= CR2_SSOE_Set;
000002  8881              LDRH     r1,[r0,#4]
000004  d002              BEQ      |L21.12|
000006  f0410104          ORR      r1,r1,#4
00000a  e001              B        |L21.16|
                  |L21.12|
;;;544      }
;;;545      else
;;;546      {
;;;547        /* Disable the selected SPI SS output */
;;;548        SPIx->CR2 &= CR2_SSOE_Reset;
00000c  f0210104          BIC      r1,r1,#4
                  |L21.16|
000010  8081              STRH     r1,[r0,#4]            ;543
;;;549      }
;;;550    }
000012  4770              BX       lr
;;;551    
                          ENDP


                          AREA ||i.SPI_StructInit||, CODE, READONLY, ALIGN=1

                  SPI_StructInit PROC
;;;263    *******************************************************************************/
;;;264    void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
000000  2100              MOVS     r1,#0
;;;265    {
;;;266    /*--------------- Reset SPI init structure parameters values -----------------*/
;;;267      /* Initialize the SPI_Direction member */
;;;268      SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
000002  8001              STRH     r1,[r0,#0]
;;;269    
;;;270      /* initialize the SPI_Mode member */
;;;271      SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
000004  8041              STRH     r1,[r0,#2]
;;;272    
;;;273      /* initialize the SPI_DataSize member */
;;;274      SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
000006  8081              STRH     r1,[r0,#4]
;;;275    
;;;276      /* Initialize the SPI_CPOL member */
;;;277      SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
000008  80c1              STRH     r1,[r0,#6]
;;;278    
;;;279      /* Initialize the SPI_CPHA member */
;;;280      SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
00000a  8101              STRH     r1,[r0,#8]
;;;281    
;;;282      /* Initialize the SPI_NSS member */
;;;283      SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
00000c  8141              STRH     r1,[r0,#0xa]
;;;284    
;;;285      /* Initialize the SPI_BaudRatePrescaler member */
;;;286      SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
00000e  8181              STRH     r1,[r0,#0xc]
;;;287    
;;;288      /* Initialize the SPI_FirstBit member */
;;;289      SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
000010  81c1              STRH     r1,[r0,#0xe]
;;;290    
;;;291      /* Initialize the SPI_CRCPolynomial member */
;;;292      SPI_InitStruct->SPI_CRCPolynomial = 7;
000012  2107              MOVS     r1,#7
000014  8201              STRH     r1,[r0,#0x10]
;;;293    }
000016  4770              BX       lr
;;;294    
                          ENDP


                          AREA ||i.SPI_TransmitCRC||, CODE, READONLY, ALIGN=1

                  SPI_TransmitCRC PROC
;;;581    *******************************************************************************/
;;;582    void SPI_TransmitCRC(SPI_TypeDef* SPIx)
000000  8801              LDRH     r1,[r0,#0]
;;;583    {
;;;584      /* Check the parameters */
;;;585      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;586      
;;;587      /* Enable the selected SPI CRC transmission */
;;;588      SPIx->CR1 |= CR1_CRCNext_Set;
000002  f4415180          ORR      r1,r1,#0x1000
000006  8001              STRH     r1,[r0,#0]
;;;589    }
000008  4770              BX       lr
;;;590    
                          ENDP

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