stm32f10x_spi.txt

STM32F103ZET6+UCOSII+UCGUI源码

                  SPI_DataSizeConfig PROC
;;;562    *******************************************************************************/
;;;563    void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize)
000000  8802              LDRH     r2,[r0,#0]
;;;564    {
;;;565      /* Check the parameters */
;;;566      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;567      assert_param(IS_SPI_DATASIZE(SPI_DataSize));
;;;568    
;;;569      /* Clear DFF bit */
;;;570      SPIx->CR1 &= (u16)~SPI_DataSize_16b;
000002  f4226200          BIC      r2,r2,#0x800
000006  8002              STRH     r2,[r0,#0]
;;;571      /* Set new DFF bit value */
;;;572      SPIx->CR1 |= SPI_DataSize;
000008  8802              LDRH     r2,[r0,#0]
00000a  430a              ORRS     r2,r2,r1
00000c  8002              STRH     r2,[r0,#0]
;;;573    }
00000e  4770              BX       lr
;;;574    
                          ENDP


                          AREA ||i.SPI_GetCRC||, CODE, READONLY, ALIGN=1

                  SPI_GetCRC PROC
;;;630    *******************************************************************************/
;;;631    u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC)
000000  2901              CMP      r1,#1
;;;632    {
;;;633      u16 crcreg = 0;
;;;634    
;;;635      /* Check the parameters */
;;;636      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;637      assert_param(IS_SPI_CRC(SPI_CRC));
;;;638    
;;;639      if (SPI_CRC != SPI_CRC_Rx)
000002  d001              BEQ      |L8.8|
;;;640      {
;;;641        /* Get the Tx CRC register */
;;;642        crcreg = SPIx->TXCRCR;
000004  8b00              LDRH     r0,[r0,#0x18]
;;;643      }
;;;644      else
;;;645      {
;;;646        /* Get the Rx CRC register */
;;;647        crcreg = SPIx->RXCRCR;
;;;648      }
;;;649    
;;;650      /* Return the selected CRC register */
;;;651      return crcreg;
;;;652    }
000006  4770              BX       lr
                  |L8.8|
000008  8a80              LDRH     r0,[r0,#0x14]         ;647
00000a  4770              BX       lr
;;;653    
                          ENDP


                          AREA ||i.SPI_GetCRCPolynomial||, CODE, READONLY, ALIGN=1

                  SPI_GetCRCPolynomial PROC
;;;660    *******************************************************************************/
;;;661    u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
000000  8a00              LDRH     r0,[r0,#0x10]
;;;662    {
;;;663      /* Check the parameters */
;;;664      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;665      
;;;666      /* Return the CRC polynomial register */
;;;667      return SPIx->CRCPR;
;;;668    }
000002  4770              BX       lr
;;;669    
                          ENDP


                          AREA ||i.SPI_I2S_ClearFlag||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ClearFlag PROC
;;;759    *******************************************************************************/
;;;760    void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG)
000000  2920              CMP      r1,#0x20
;;;761    {
;;;762      /* Check the parameters */
;;;763      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;764      assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
;;;765        
;;;766      /* SPI_FLAG_MODF flag clear */
;;;767      if(SPI_I2S_FLAG == SPI_FLAG_MODF)
000002  d105              BNE      |L10.16|
;;;768      {
;;;769        /* Read SR register */
;;;770        (void)SPIx->SR;
000004  8901              LDRH     r1,[r0,#8]
;;;771        
;;;772        /* Write on CR1 register */
;;;773        SPIx->CR1 |= CR1_SPE_Set; 
000006  8801              LDRH     r1,[r0,#0]
000008  f0410140          ORR      r1,r1,#0x40
00000c  8001              STRH     r1,[r0,#0]
;;;774      }
;;;775      /* SPI_I2S_FLAG_OVR flag or I2S_FLAG_UDR flag clear */
;;;776      else if ((SPI_I2S_FLAG == SPI_I2S_FLAG_OVR) || (SPI_I2S_FLAG == I2S_FLAG_UDR))  
;;;777      {
;;;778        /* Read SR register  (Before clearing OVR flag, it is mandatory to read 
;;;779           SPI_I2S_DR register)*/
;;;780        (void)SPIx->SR;
;;;781      }
;;;782      else /* SPI_FLAG_CRCERR flag clear */
;;;783      {
;;;784        /* Clear the selected SPI flag */
;;;785        SPIx->SR = (u16)~SPI_I2S_FLAG;
;;;786      }
;;;787    }
00000e  4770              BX       lr
                  |L10.16|
000010  2940              CMP      r1,#0x40              ;776
000012  d001              BEQ      |L10.24|
000014  2908              CMP      r1,#8                 ;776
000016  d101              BNE      |L10.28|
                  |L10.24|
000018  8900              LDRH     r0,[r0,#8]            ;780
00001a  4770              BX       lr
                  |L10.28|
00001c  43c9              MVNS     r1,r1                 ;785
00001e  8101              STRH     r1,[r0,#8]            ;785
000020  4770              BX       lr
;;;788    
                          ENDP


                          AREA ||i.SPI_I2S_ClearITPendingBit||, CODE, READONLY, ALIGN=1

                  SPI_I2S_ClearITPendingBit PROC
;;;854    *******************************************************************************/
;;;855    void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_I2S_IT)
000000  2955              CMP      r1,#0x55
;;;856    {
;;;857      u16 itpos = 0;
;;;858    
;;;859      /* Check the parameters */
;;;860      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;861      assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
;;;862    
;;;863      /* SPI_IT_MODF pending bit clear */
;;;864      if(SPI_I2S_IT == SPI_IT_MODF)
000002  d105              BNE      |L11.16|
;;;865      {
;;;866        /* Read SR register */
;;;867        (void)SPIx->SR;
000004  8901              LDRH     r1,[r0,#8]
;;;868        /* Write on CR1 register */
;;;869        SPIx->CR1 |= CR1_SPE_Set; 
000006  8801              LDRH     r1,[r0,#0]
000008  f0410140          ORR      r1,r1,#0x40
00000c  8001              STRH     r1,[r0,#0]
;;;870      }
;;;871      /* SPI_I2S_IT_OVR or I2S_IT_UDR pending bit clear */ 
;;;872      else if((SPI_I2S_IT == SPI_I2S_IT_OVR) || (SPI_I2S_IT == I2S_IT_UDR))    
;;;873      {
;;;874        /* Read SR register */
;;;875        (void)(SPIx->SR);
;;;876      }  
;;;877      else   /* SPI_IT_CRCERR pending bit clear */
;;;878      {
;;;879        /* Get the SPI/I2S IT index */
;;;880        itpos = (u16)((u16)0x01 << (SPI_I2S_IT & (u8)0x0F));
;;;881        /* Clear the selected SPI/I2S interrupt pending bits */
;;;882        SPIx->SR = (u16)~itpos;
;;;883      }
;;;884    }
00000e  4770              BX       lr
                  |L11.16|
000010  2956              CMP      r1,#0x56              ;872
000012  d001              BEQ      |L11.24|
000014  2953              CMP      r1,#0x53              ;872
000016  d101              BNE      |L11.28|
                  |L11.24|
000018  8900              LDRH     r0,[r0,#8]            ;875
00001a  4770              BX       lr
                  |L11.28|
00001c  f001020f          AND      r2,r1,#0xf            ;880
000020  2101              MOVS     r1,#1                 ;880
000022  4091              LSLS     r1,r1,r2              ;880
000024  43c9              MVNS     r1,r1                 ;882
000026  8101              STRH     r1,[r0,#8]            ;882
000028  4770              BX       lr
;;;885    
                          ENDP


                          AREA ||i.SPI_I2S_DMACmd||, CODE, READONLY, ALIGN=1

                  SPI_I2S_DMACmd PROC
;;;438    *******************************************************************************/
;;;439    void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, u16 SPI_I2S_DMAReq, FunctionalState NewState)
000000  2a00              CMP      r2,#0
;;;440    {
;;;441      /* Check the parameters */
;;;442      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;443      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;444      assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
;;;445    
;;;446      if (NewState != DISABLE)
;;;447      {
;;;448        /* Enable the selected SPI/I2S DMA requests */
;;;449        SPIx->CR2 |= SPI_I2S_DMAReq;
000002  8882              LDRH     r2,[r0,#4]
000004  d001              BEQ      |L12.10|
000006  430a              ORRS     r2,r2,r1
000008  e000              B        |L12.12|
                  |L12.10|
;;;450      }
;;;451      else
;;;452      {
;;;453        /* Disable the selected SPI/I2S DMA requests */
;;;454        SPIx->CR2 &= (u16)~SPI_I2S_DMAReq;
00000a  438a              BICS     r2,r2,r1
                  |L12.12|
00000c  8082              STRH     r2,[r0,#4]            ;449
;;;455      }
;;;456    }
00000e  4770              BX       lr
;;;457    
                          ENDP


                          AREA ||i.SPI_I2S_DeInit||, CODE, READONLY, ALIGN=2

                  SPI_I2S_DeInit PROC
;;;61     *******************************************************************************/
;;;62     void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
000000  4911              LDR      r1,|L13.72|
;;;63     {
000002  b510              PUSH     {r4,lr}
;;;64       /* Check the parameters */
;;;65       assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;66       
;;;67       switch (*(u32*)&SPIx)
000004  1840              ADDS     r0,r0,r1
000006  d010              BEQ      |L13.42|
000008  f5b06f80          CMP      r0,#0x400
00000c  d010              BEQ      |L13.48|
00000e  f5b04f78          CMP      r0,#0xf800
000012  d118              BNE      |L13.70|
;;;68       {
;;;69         case SPI1_BASE:
;;;70           /* Enable SPI1 reset state */
;;;71           RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
000014  2101              MOVS     r1,#1
000016  030c              LSLS     r4,r1,#12
000018  4620              MOV      r0,r4
00001a  f7fffffe          BL       RCC_APB2PeriphResetCmd
;;;72           /* Release SPI1 from reset state */
;;;73           RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
00001e  4620              MOV      r0,r4
000020  e8bd4010          POP      {r4,lr}
000024  2100              MOVS     r1,#0
000026  f7ffbffe          B.W      RCC_APB2PeriphResetCmd
                  |L13.42|
;;;74           break;
;;;75     
;;;76         case SPI2_BASE:
;;;77           /* Enable SPI2 reset state */
;;;78           RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
00002a  2101              MOVS     r1,#1
00002c  038c              LSLS     r4,r1,#14
;;;79           /* Release SPI2 from reset state */
;;;80           RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
;;;81           break;
00002e  e001              B        |L13.52|
                  |L13.48|
;;;82     
;;;83         case SPI3_BASE:
;;;84           /* Enable SPI3 reset state */
;;;85           RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
000030  2101              MOVS     r1,#1
000032  03cc              LSLS     r4,r1,#15
                  |L13.52|
000034  4620              MOV      r0,r4
000036  f7fffffe          BL       RCC_APB1PeriphResetCmd
;;;86           /* Release SPI3 from reset state */
;;;87           RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
00003a  4620              MOV      r0,r4
00003c  e8bd4010          POP      {r4,lr}
000040  2100              MOVS     r1,#0
000042  f7ffbffe          B.W      RCC_APB1PeriphResetCmd
                  |L13.70|
;;;88           break;
;;;89     
;;;90         default:
;;;91           break;
;;;92       }
;;;93     }
000046  bd10              POP      {r4,pc}
;;;94     
                          ENDP

                  |L13.72|
                          DCD      0xbfffc800

                          AREA ||i.SPI_I2S_GetFlagStatus||, CODE, READONLY, ALIGN=1

                  SPI_I2S_GetFlagStatus PROC
;;;719    *******************************************************************************/
;;;720    FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG)
000000  4602              MOV      r2,r0
;;;721    {
;;;722      FlagStatus bitstatus = RESET;
;;;723    
;;;724      /* Check the parameters */
;;;725      assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;726      assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
;;;727    
;;;728      /* Check the status of the specified SPI/I2S flag */
;;;729      if ((SPIx->SR & SPI_I2S_FLAG) != (u16)RESET)
000002  8912              LDRH     r2,[r2,#8]
000004  2000              MOVS     r0,#0                 ;722
000006  420a              TST      r2,r1
000008  d000              BEQ      |L14.12|
;;;730      {
;;;731        /* SPI_I2S_FLAG is set */
;;;732        bitstatus = SET;
00000a  2001              MOVS     r0,#1
                  |L14.12|
;;;733      }
;;;734      else
;;;735      {
;;;736        /* SPI_I2S_FLAG is reset */
;;;737        bitstatus = RESET;
;;;738      }
;;;739      /* Return the SPI_I2S_FLAG status */
;;;740      return  bitstatus;
;;;741    }
00000c  4770              BX       lr
;;;742    
                          ENDP


                          AREA ||i.SPI_I2S_GetITStatus||, CODE, READONLY, ALIGN=1

                  SPI_I2S_GetITStatus PROC
;;;805    *******************************************************************************/
;;;806    ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_I2S_IT)
000000  b510              PUSH     {r4,lr}
;;;807    {
;;;808      ITStatus bitstatus = RESET;
;;;809      u16 itpos = 0, itmask = 0, enablestatus = 0;
;;;810    
;;;811      /* Check the parameters */
;;;812      assert_param(IS_SPI_ALL_PERIPH(SPIx));