📄 stm32f10x_spi.txt
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; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\stm32f10x_spi.o --depend=.\Obj\stm32f10x_spi.d --device=DARMSTM --apcs=interwork -O3 -I..\..\include -I..\..\..\FWLib\library\inc -I..\..\..\USBLib\library\inc -I..\..\Config -I..\..\GUI\Core -I..\..\GUI\Font -I..\..\GUI\ConvertColor -I..\..\GUI\AntiAlias -I..\..\GUI\ConvertMono -I..\..\GUI\JPEG -I..\..\GUI\MemDev -I..\..\GUI\MultiLayer -I..\..\GUI\Widget -I..\..\GUI\WM -IC:\Keil\ARM\INC\ST\STM32F10x ..\..\..\FWLib\library\src\stm32f10x_spi.c]
THUMB
AREA ||i.I2S_Cmd||, CODE, READONLY, ALIGN=1
I2S_Cmd PROC
;;;360 *******************************************************************************/
;;;361 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000000 2900 CMP r1,#0
;;;362 {
;;;363 /* Check the parameters */
;;;364 assert_param(IS_SPI_23_PERIPH(SPIx));
;;;365 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;366
;;;367 if (NewState != DISABLE)
;;;368 {
;;;369 /* Enable the selected SPI peripheral (in I2S mode) */
;;;370 SPIx->I2SCFGR |= I2SCFGR_I2SE_Set;
000002 8b81 LDRH r1,[r0,#0x1c]
000004 d002 BEQ |L1.12|
000006 f4416180 ORR r1,r1,#0x400
00000a e001 B |L1.16|
|L1.12|
;;;371 }
;;;372 else
;;;373 {
;;;374 /* Disable the selected SPI peripheral (in I2S mode) */
;;;375 SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset;
00000c f4216180 BIC r1,r1,#0x400
|L1.16|
000010 8381 STRH r1,[r0,#0x1c] ;370
;;;376 }
;;;377 }
000012 4770 BX lr
;;;378
ENDP
AREA ||i.I2S_Init||, CODE, READONLY, ALIGN=1
I2S_Init PROC
;;;163 ******************************************************************************/
;;;164 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
000000 b5f0 PUSH {r4-r7,lr}
;;;165 {
000002 4605 MOV r5,r0
000004 460c MOV r4,r1
;;;166 u16 tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
000006 2002 MOVS r0,#2
000008 2100 MOVS r1,#0
;;;167 u32 tmp = 0;
;;;168 RCC_ClocksTypeDef RCC_Clocks;
;;;169
;;;170 /* Check the I2S parameters */
;;;171 assert_param(IS_SPI_23_PERIPH(SPIx));
;;;172 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
;;;173 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
;;;174 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
;;;175 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
;;;176 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
;;;177 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
;;;178
;;;179 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
;;;180
;;;181 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
;;;182 SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask;
00000a 8baa LDRH r2,[r5,#0x1c]
00000c b085 SUB sp,sp,#0x14 ;165
00000e 2601 MOVS r6,#1 ;166
000010 f24f0340 MOV r3,#0xf040
000014 401a ANDS r2,r2,r3
000016 83aa STRH r2,[r5,#0x1c]
;;;183 SPIx->I2SPR = 0x0002;
000018 8428 STRH r0,[r5,#0x20]
;;;184
;;;185 /* Get the I2SCFGR register value */
;;;186 tmpreg = SPIx->I2SCFGR;
00001a 8baf LDRH r7,[r5,#0x1c]
;;;187
;;;188 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
;;;189 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
00001c 8922 LDRH r2,[r4,#8]
00001e 2a02 CMP r2,#2
000020 d024 BEQ |L2.108|
;;;190 {
;;;191 i2sodd = (u16)0;
;;;192 i2sdiv = (u16)2;
;;;193 }
;;;194 /* If the requested audio frequency is not the default, compute the prescaler */
;;;195 else
;;;196 {
;;;197 /* Check the frame length (For the Prescaler computing) */
;;;198 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
000022 88a0 LDRH r0,[r4,#4]
000024 b100 CBZ r0,|L2.40|
;;;199 {
;;;200 /* Packet length is 16 bits */
;;;201 packetlength = 1;
;;;202 }
;;;203 else
;;;204 {
;;;205 /* Packet length is 32 bits */
;;;206 packetlength = 2;
000026 2602 MOVS r6,#2
|L2.40|
;;;207 }
;;;208 /* Get System Clock frequency */
;;;209 RCC_GetClocksFreq(&RCC_Clocks);
000028 4668 MOV r0,sp
00002a f7fffffe BL RCC_GetClocksFreq
;;;210
;;;211 /* Compute the Real divider depending on the MCLK output state with a flaoting point */
;;;212 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
00002e 88e0 LDRH r0,[r4,#6]
000030 f5b07f00 CMP r0,#0x200
000034 d106 BNE |L2.68|
;;;213 {
;;;214 /* MCLK output is enabled */
;;;215 tmp = (u16)(((10 * RCC_Clocks.SYSCLK_Frequency) / (256 * I2S_InitStruct->I2S_AudioFreq)) + 5);
000036 9800 LDR r0,[sp,#0]
000038 8921 LDRH r1,[r4,#8]
00003a eb000080 ADD r0,r0,r0,LSL #2
00003e 0040 LSLS r0,r0,#1
000040 0209 LSLS r1,r1,#8
000042 e006 B |L2.82|
|L2.68|
;;;216 }
;;;217 else
;;;218 {
;;;219 /* MCLK output is disabled */
;;;220 tmp = (u16)(((10 * RCC_Clocks.SYSCLK_Frequency) / (32 * packetlength * I2S_InitStruct->I2S_AudioFreq)) + 5);
000044 8922 LDRH r2,[r4,#8]
000046 9800 LDR r0,[sp,#0]
000048 0171 LSLS r1,r6,#5
00004a eb000080 ADD r0,r0,r0,LSL #2
00004e 4351 MULS r1,r2,r1
000050 0040 LSLS r0,r0,#1
|L2.82|
000052 fbb0f0f1 UDIV r0,r0,r1
000056 1d40 ADDS r0,r0,#5
000058 b280 UXTH r0,r0
;;;221 }
;;;222
;;;223 /* Remove the flaoting point */
;;;224 tmp = tmp/10;
00005a 210a MOVS r1,#0xa
00005c fbb0f0f1 UDIV r0,r0,r1
;;;225
;;;226 /* Check the parity of the divider */
;;;227 i2sodd = (u16)(tmp & (u16)0x0001);
000060 f0000101 AND r1,r0,#1
;;;228
;;;229 /* Compute the i2sdiv prescaler */
;;;230 i2sdiv = (u16)((tmp - i2sodd) / 2);
000064 1a40 SUBS r0,r0,r1
000066 f3c0004f UBFX r0,r0,#1,#16
;;;231
;;;232 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
;;;233 i2sodd = (u16) (i2sodd << 8);
00006a 0209 LSLS r1,r1,#8
|L2.108|
;;;234 }
;;;235
;;;236 /* Test if the divider is 1 or 0 */
;;;237 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
00006c 1e82 SUBS r2,r0,#2
00006e 2afe CMP r2,#0xfe
000070 d301 BCC |L2.118|
;;;238 {
;;;239 /* Set the default values */
;;;240 i2sdiv = 2;
000072 2002 MOVS r0,#2
;;;241 i2sodd = 0;
000074 2100 MOVS r1,#0
|L2.118|
;;;242 }
;;;243
;;;244 /* Write to SPIx I2SPR register the computed value */
;;;245 SPIx->I2SPR = (u16)(i2sdiv | i2sodd | I2S_InitStruct->I2S_MCLKOutput);
000076 88e2 LDRH r2,[r4,#6]
000078 4308 ORRS r0,r0,r1
00007a 4302 ORRS r2,r2,r0
00007c 842a STRH r2,[r5,#0x20]
;;;246
;;;247 /* Configure the I2S with the SPI_InitStruct values */
;;;248 tmpreg |= (u16)(I2S_Mode_Select | I2S_InitStruct->I2S_Mode | \
00007e 8820 LDRH r0,[r4,#0]
000080 8862 LDRH r2,[r4,#2]
000082 88a1 LDRH r1,[r4,#4]
000084 8963 LDRH r3,[r4,#0xa]
000086 4310 ORRS r0,r0,r2
000088 4319 ORRS r1,r1,r3
00008a 4308 ORRS r0,r0,r1
00008c 4338 ORRS r0,r0,r7
00008e f4406000 ORR r0,r0,#0x800
;;;249 I2S_InitStruct->I2S_Standard | I2S_InitStruct->I2S_DataFormat | \
;;;250 I2S_InitStruct->I2S_CPOL);
;;;251
;;;252 /* Write to SPIx I2SCFGR */
;;;253 SPIx->I2SCFGR = tmpreg;
000092 83a8 STRH r0,[r5,#0x1c]
;;;254 }
000094 b005 ADD sp,sp,#0x14
000096 bdf0 POP {r4-r7,pc}
;;;255
ENDP
AREA ||i.I2S_StructInit||, CODE, READONLY, ALIGN=1
I2S_StructInit PROC
;;;302 *******************************************************************************/
;;;303 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
000000 2100 MOVS r1,#0
;;;304 {
;;;305 /*--------------- Reset I2S init structure parameters values -----------------*/
;;;306 /* Initialize the I2S_Mode member */
;;;307 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
000002 8001 STRH r1,[r0,#0]
;;;308
;;;309 /* Initialize the I2S_Standard member */
;;;310 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
000004 8041 STRH r1,[r0,#2]
;;;311
;;;312 /* Initialize the I2S_DataFormat member */
;;;313 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
000006 8081 STRH r1,[r0,#4]
;;;314
;;;315 /* Initialize the I2S_MCLKOutput member */
;;;316 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
000008 80c1 STRH r1,[r0,#6]
;;;317
;;;318 /* Initialize the I2S_AudioFreq member */
;;;319 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
00000a 2202 MOVS r2,#2
00000c 8102 STRH r2,[r0,#8]
;;;320
;;;321 /* Initialize the I2S_CPOL member */
;;;322 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
00000e 8141 STRH r1,[r0,#0xa]
;;;323 }
000010 4770 BX lr
;;;324
ENDP
AREA ||i.SPI_BiDirectionalLineConfig||, CODE, READONLY, ALIGN=1
SPI_BiDirectionalLineConfig PROC
;;;682 *******************************************************************************/
;;;683 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction)
000000 f5b14f80 CMP r1,#0x4000
;;;684 {
;;;685 /* Check the parameters */
;;;686 assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;687 assert_param(IS_SPI_DIRECTION(SPI_Direction));
;;;688
;;;689 if (SPI_Direction == SPI_Direction_Tx)
;;;690 {
;;;691 /* Set the Tx only mode */
;;;692 SPIx->CR1 |= SPI_Direction_Tx;
000004 8801 LDRH r1,[r0,#0]
000006 d102 BNE |L4.14|
000008 f4414180 ORR r1,r1,#0x4000
00000c e001 B |L4.18|
|L4.14|
;;;693 }
;;;694 else
;;;695 {
;;;696 /* Set the Rx only mode */
;;;697 SPIx->CR1 &= SPI_Direction_Rx;
00000e f4214180 BIC r1,r1,#0x4000
|L4.18|
000012 8001 STRH r1,[r0,#0] ;692
;;;698 }
;;;699 }
000014 4770 BX lr
;;;700
ENDP
AREA ||i.SPI_CalculateCRC||, CODE, READONLY, ALIGN=1
SPI_CalculateCRC PROC
;;;600 *******************************************************************************/
;;;601 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
000000 2900 CMP r1,#0
;;;602 {
;;;603 /* Check the parameters */
;;;604 assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;605 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;606
;;;607 if (NewState != DISABLE)
;;;608 {
;;;609 /* Enable the selected SPI CRC calculation */
;;;610 SPIx->CR1 |= CR1_CRCEN_Set;
000002 8801 LDRH r1,[r0,#0]
000004 d002 BEQ |L5.12|
000006 f4415100 ORR r1,r1,#0x2000
00000a e001 B |L5.16|
|L5.12|
;;;611 }
;;;612 else
;;;613 {
;;;614 /* Disable the selected SPI CRC calculation */
;;;615 SPIx->CR1 &= CR1_CRCEN_Reset;
00000c f4215100 BIC r1,r1,#0x2000
|L5.16|
000010 8001 STRH r1,[r0,#0] ;610
;;;616 }
;;;617 }
000012 4770 BX lr
;;;618
ENDP
AREA ||i.SPI_Cmd||, CODE, READONLY, ALIGN=1
SPI_Cmd PROC
;;;333 *******************************************************************************/
;;;334 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
000000 2900 CMP r1,#0
;;;335 {
;;;336 /* Check the parameters */
;;;337 assert_param(IS_SPI_ALL_PERIPH(SPIx));
;;;338 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;339
;;;340 if (NewState != DISABLE)
;;;341 {
;;;342 /* Enable the selected SPI peripheral */
;;;343 SPIx->CR1 |= CR1_SPE_Set;
000002 8801 LDRH r1,[r0,#0]
000004 d002 BEQ |L6.12|
000006 f0410140 ORR r1,r1,#0x40
00000a e001 B |L6.16|
|L6.12|
;;;344 }
;;;345 else
;;;346 {
;;;347 /* Disable the selected SPI peripheral */
;;;348 SPIx->CR1 &= CR1_SPE_Reset;
00000c f0210140 BIC r1,r1,#0x40
|L6.16|
000010 8001 STRH r1,[r0,#0] ;343
;;;349 }
;;;350 }
000012 4770 BX lr
;;;351
ENDP
AREA ||i.SPI_DataSizeConfig||, CODE, READONLY, ALIGN=1
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