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📄 stm32f10x_nvic.txt

📁 STM32F103ZET6+UCOSII+UCGUI源码
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;;;345    *******************************************************************************/
;;;346    ITStatus NVIC_GetIRQChannelActiveBitStatus(u8 NVIC_IRQChannel)
000000  4601              MOV      r1,r0
;;;347    {
;;;348      ITStatus activeirqstatus = RESET;
;;;349      u32 tmp = 0x00;
;;;350    
;;;351      /* Check the parameters */
;;;352      assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
;;;353      
;;;354      tmp = ((u32)0x01 << (NVIC_IRQChannel & (u32)0x1F));
000002  f001031f          AND      r3,r1,#0x1f
000006  2201              MOVS     r2,#1
000008  409a              LSLS     r2,r2,r3
00000a  2000              MOVS     r0,#0                 ;348
;;;355    
;;;356      if (((NVIC->IABR[(NVIC_IRQChannel >> 0x05)]) & tmp) == tmp )
00000c  0949              LSRS     r1,r1,#5
00000e  f04f23e0          MOV      r3,#0xe000e000
000012  eb030181          ADD      r1,r3,r1,LSL #2
000016  f8d11300          LDR      r1,[r1,#0x300]
00001a  438a              BICS     r2,r2,r1
00001c  d100              BNE      |L13.32|
;;;357      {
;;;358        activeirqstatus = SET;
00001e  2001              MOVS     r0,#1
                  |L13.32|
;;;359      }
;;;360      else
;;;361      {
;;;362        activeirqstatus = RESET;
;;;363      }
;;;364      return activeirqstatus;
;;;365    }
000020  4770              BX       lr
;;;366    
                          ENDP


                          AREA ||i.NVIC_GetIRQChannelPendingBitStatus||, CODE, READONLY, ALIGN=1

                  NVIC_GetIRQChannelPendingBitStatus PROC
;;;273    *******************************************************************************/
;;;274    ITStatus NVIC_GetIRQChannelPendingBitStatus(u8 NVIC_IRQChannel)
000000  4601              MOV      r1,r0
;;;275    {
;;;276      ITStatus pendingirqstatus = RESET;
;;;277      u32 tmp = 0x00;
;;;278      
;;;279      /* Check the parameters */
;;;280      assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_IRQChannel));
;;;281      
;;;282      tmp = ((u32)0x01 << (NVIC_IRQChannel & (u32)0x1F));
000002  f001031f          AND      r3,r1,#0x1f
000006  2201              MOVS     r2,#1
000008  409a              LSLS     r2,r2,r3
00000a  2000              MOVS     r0,#0                 ;276
;;;283    
;;;284      if (((NVIC->ISPR[(NVIC_IRQChannel >> 0x05)]) & tmp) == tmp)
00000c  0949              LSRS     r1,r1,#5
00000e  f04f23e0          MOV      r3,#0xe000e000
000012  eb030181          ADD      r1,r3,r1,LSL #2
000016  f8d11200          LDR      r1,[r1,#0x200]
00001a  438a              BICS     r2,r2,r1
00001c  d100              BNE      |L14.32|
;;;285      {
;;;286        pendingirqstatus = SET;
00001e  2001              MOVS     r0,#1
                  |L14.32|
;;;287      }
;;;288      else
;;;289      {
;;;290        pendingirqstatus = RESET;
;;;291      }
;;;292      return pendingirqstatus;
;;;293    }
000020  4770              BX       lr
;;;294    
                          ENDP


                          AREA ||i.NVIC_GetSystemHandlerActiveBitStatus||, CODE, READONLY, ALIGN=2

                  NVIC_GetSystemHandlerActiveBitStatus PROC
;;;643    *******************************************************************************/
;;;644    ITStatus NVIC_GetSystemHandlerActiveBitStatus(u32 SystemHandler)
000000  4601              MOV      r1,r0
;;;645    {
;;;646      ITStatus bitstatus  = RESET;
;;;647    
;;;648      u32 tmp = 0x00, tmppos = 0x00;
;;;649    
;;;650      /* Check the parameters */
;;;651      assert_param(IS_GET_ACTIVE_SYSTEM_HANDLER(SystemHandler));
;;;652      
;;;653      tmppos = (SystemHandler >> 0x0E) & (u32)0x0F;
000002  f3c13283          UBFX     r2,r1,#14,#4
000006  2000              MOVS     r0,#0                 ;646
;;;654    
;;;655      tmppos = (u32)0x01 << tmppos;
000008  2101              MOVS     r1,#1
00000a  4091              LSLS     r1,r1,r2
00000c  4a03              LDR      r2,|L15.28|
;;;656    
;;;657      tmp = SCB->SHCSR & tmppos;
00000e  6812              LDR      r2,[r2,#0]
000010  400a              ANDS     r2,r2,r1
;;;658    
;;;659      if (tmp == tmppos)
000012  428a              CMP      r2,r1
000014  d100              BNE      |L15.24|
;;;660      {
;;;661        bitstatus = SET;
000016  2001              MOVS     r0,#1
                  |L15.24|
;;;662      }
;;;663      else
;;;664      {
;;;665        bitstatus = RESET;
;;;666      }
;;;667      return bitstatus;
;;;668    }
000018  4770              BX       lr
;;;669    
                          ENDP

00001a  0000              DCW      0x0000
                  |L15.28|
                          DCD      0xe000ed24

                          AREA ||i.NVIC_GetSystemHandlerPendingBitStatus||, CODE, READONLY, ALIGN=2

                  NVIC_GetSystemHandlerPendingBitStatus PROC
;;;551    *******************************************************************************/
;;;552    ITStatus NVIC_GetSystemHandlerPendingBitStatus(u32 SystemHandler)
000000  4601              MOV      r1,r0
;;;553    {
;;;554      ITStatus bitstatus  = RESET;
;;;555      u32 tmp = 0x00, tmppos = 0x00;
;;;556    
;;;557      /* Check the parameters */
;;;558      assert_param(IS_GET_PENDING_SYSTEM_HANDLER(SystemHandler));
;;;559      
;;;560      tmppos = (SystemHandler >> 0x0A);
;;;561      tmppos &= (u32)0x0F;
000002  f3c12283          UBFX     r2,r1,#10,#4
000006  2000              MOVS     r0,#0                 ;554
;;;562    
;;;563      tmppos = (u32)0x01 << tmppos;
000008  2101              MOVS     r1,#1
00000a  4091              LSLS     r1,r1,r2
00000c  4a03              LDR      r2,|L16.28|
;;;564    
;;;565      tmp = SCB->SHCSR & tmppos;
00000e  6812              LDR      r2,[r2,#0]
000010  400a              ANDS     r2,r2,r1
;;;566    
;;;567      if (tmp == tmppos)
000012  428a              CMP      r2,r1
000014  d100              BNE      |L16.24|
;;;568      {
;;;569        bitstatus = SET;
000016  2001              MOVS     r0,#1
                  |L16.24|
;;;570      }
;;;571      else
;;;572      {
;;;573        bitstatus = RESET;
;;;574      }
;;;575      return bitstatus;
;;;576    }
000018  4770              BX       lr
;;;577    
                          ENDP

00001a  0000              DCW      0x0000
                  |L16.28|
                          DCD      0xe000ed24

                          AREA ||i.NVIC_Init||, CODE, READONLY, ALIGN=1

                  NVIC_Init PROC
;;;115    *******************************************************************************/
;;;116    void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
000000  b5f0              PUSH     {r4-r7,lr}
;;;117    {
;;;118      u32 tmppriority = 0x00, tmpreg = 0x00, tmpmask = 0x00;
;;;119      u32 tmppre = 0, tmpsub = 0x0F;
000002  220f              MOVS     r2,#0xf
;;;120    
;;;121      /* Check the parameters */
;;;122      assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
;;;123      assert_param(IS_NVIC_IRQ_CHANNEL(NVIC_InitStruct->NVIC_IRQChannel));
;;;124      assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));  
;;;125      assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
;;;126        
;;;127      if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
000004  78c4              LDRB     r4,[r0,#3]
;;;128      {
;;;129        /* Compute the Corresponding IRQ Priority --------------------------------*/    
;;;130        tmppriority = (0x700 - (SCB->AIRCR & (u32)0x700))>> 0x08;
;;;131        tmppre = (0x4 - tmppriority);
;;;132        tmpsub = tmpsub >> tmppriority;
;;;133        
;;;134        tmppriority = (u32)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
;;;135        tmppriority |=  NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
;;;136    
;;;137        tmppriority = tmppriority << 0x04;
;;;138        tmppriority = ((u32)tmppriority) << ((NVIC_InitStruct->NVIC_IRQChannel & (u8)0x03) * 0x08);
000006  7801              LDRB     r1,[r0,#0]
000008  f04f23e0          MOV      r3,#0xe000e000        ;130
;;;139        
;;;140        tmpreg = NVIC->IPR[(NVIC_InitStruct->NVIC_IRQChannel >> 0x02)];
;;;141        tmpmask = (u32)0xFF << ((NVIC_InitStruct->NVIC_IRQChannel & (u8)0x03) * 0x08);
;;;142        tmpreg &= ~tmpmask;
;;;143        tmppriority &= tmpmask;  
;;;144        tmpreg |= tmppriority;
;;;145    
;;;146        NVIC->IPR[(NVIC_InitStruct->NVIC_IRQChannel >> 0x02)] = tmpreg;
;;;147        
;;;148        /* Enable the Selected IRQ Channels --------------------------------------*/
;;;149        NVIC->ISER[(NVIC_InitStruct->NVIC_IRQChannel >> 0x05)] =
00000c  2701              MOVS     r7,#1
00000e  b344              CBZ      r4,|L17.98|
000010  f8d34d0c          LDR      r4,[r3,#0xd0c]        ;130
000014  7886              LDRB     r6,[r0,#2]            ;135
000016  f40464e0          AND      r4,r4,#0x700          ;130
00001a  f5c464e0          RSB      r4,r4,#0x700          ;130
00001e  0a24              LSRS     r4,r4,#8              ;130
000020  f1c40504          RSB      r5,r4,#4              ;131
000024  40e2              LSRS     r2,r2,r4              ;132
000026  7844              LDRB     r4,[r0,#1]            ;134
000028  4016              ANDS     r6,r6,r2              ;135
00002a  40ac              LSLS     r4,r4,r5              ;134
00002c  4326              ORRS     r6,r6,r4              ;135
00002e  078a              LSLS     r2,r1,#30             ;138
000030  0135              LSLS     r5,r6,#4              ;135
000032  0ed2              LSRS     r2,r2,#27             ;138
000034  4095              LSLS     r5,r5,r2              ;138
000036  f0210103          BIC      r1,r1,#3              ;140
00003a  18cc              ADDS     r4,r1,r3              ;140
00003c  f8d46400          LDR      r6,[r4,#0x400]        ;140
000040  21ff              MOVS     r1,#0xff              ;141
000042  4091              LSLS     r1,r1,r2              ;141
000044  438e              BICS     r6,r6,r1              ;142
000046  400d              ANDS     r5,r5,r1              ;143
000048  432e              ORRS     r6,r6,r5              ;144
00004a  f8c46400          STR      r6,[r4,#0x400]        ;146
00004e  7800              LDRB     r0,[r0,#0]
000050  0941              LSRS     r1,r0,#5
000052  f000001f          AND      r0,r0,#0x1f
000056  eb030181          ADD      r1,r3,r1,LSL #2
00005a  4087              LSLS     r7,r7,r0
00005c  f8c17100          STR      r7,[r1,#0x100]
;;;150          (u32)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (u8)0x1F);
;;;151      }
;;;152      else
;;;153      {
;;;154        /* Disable the Selected IRQ Channels -------------------------------------*/
;;;155        NVIC->ICER[(NVIC_InitStruct->NVIC_IRQChannel >> 0x05)] =
;;;156          (u32)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (u8)0x1F);
;;;157      }
;;;158    }
000060  bdf0              POP      {r4-r7,pc}
                  |L17.98|
000062  f001001f          AND      r0,r1,#0x1f           ;155
000066  4087              LSLS     r7,r7,r0              ;155
000068  0948              LSRS     r0,r1,#5              ;155
00006a  eb030080          ADD      r0,r3,r0,LSL #2       ;155
00006e  f8c07180          STR      r7,[r0,#0x180]        ;155
000072  bdf0              POP      {r4-r7,pc}
;;;159    
                          ENDP


                          AREA ||i.NVIC_PriorityGroupConfig||, CODE, READONLY, ALIGN=2

                  NVIC_PriorityGroupConfig PROC
;;;96     *******************************************************************************/
;;;97     void NVIC_PriorityGroupConfig(u32 NVIC_PriorityGroup)
000000  4902              LDR      r1,|L18.12|
;;;98     {
;;;99       /* Check the parameters */
;;;100      assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
;;;101      
;;;102      /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
;;;103      SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
000002  4308              ORRS     r0,r0,r1
000004  4902              LDR      r1,|L18.16|
000006  6008              STR      r0,[r1,#0]
;;;104    }
000008  4770              BX       lr
;;;105    
                          ENDP

00000a  0000              DCW      0x0000
                  |L18.12|
                          DCD      0x05fa0000
                  |L18.16|
                          DCD      0xe000ed0c

                          AREA ||i.NVIC_RESETFAULTMASK||, CODE, READONLY, ALIGN=1

                  NVIC_RESETFAULTMASK PROC
;;;219    *******************************************************************************/
;;;220    void NVIC_RESETFAULTMASK(void)
000000  f7ffbffe          B.W      __RESETFAULTMASK
;;;221    {
;;;222      __RESETFAULTMASK();
;;;223    }
;;;224    
                          ENDP


                          AREA ||i.NVIC_RESETPRIMASK||, CODE, READONLY, ALIGN=1

                  NVIC_RESETPRIMASK PROC
;;;195    *******************************************************************************/
;;;196    void NVIC_RESETPRIMASK(void)
000000  f7ffbffe          B.W      __RESETPRIMASK
;;;197    {
;;;198      __RESETPRIMASK();
;;;199    }
;;;200    

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