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📄 stm32f10x_adc.txt

📁 STM32F103ZET6+UCOSII+UCGUI源码
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;;;602    void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime)
000000  b570              PUSH     {r4-r6,lr}
;;;603    {
;;;604      u32 tmpreg1 = 0, tmpreg2 = 0;
;;;605    
;;;606      /* Check the parameters */
;;;607      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;608      assert_param(IS_ADC_CHANNEL(ADC_Channel));
;;;609      assert_param(IS_ADC_REGULAR_RANK(Rank));
;;;610      assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
;;;611    
;;;612      /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
;;;613      if (ADC_Channel > ADC_Channel_9)
;;;614      {
;;;615        /* Get the old register value */
;;;616        tmpreg1 = ADCx->SMPR1;
;;;617        /* Calculate the mask to clear */
;;;618        tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10));
000002  2607              MOVS     r6,#7
000004  2909              CMP      r1,#9                 ;613
000006  d90a              BLS      |L29.30|
000008  68c5              LDR      r5,[r0,#0xc]          ;616
00000a  f1a1040a          SUB      r4,r1,#0xa
00000e  eb040444          ADD      r4,r4,r4,LSL #1
000012  40a6              LSLS     r6,r6,r4
;;;619        /* Clear the old discontinuous mode channel count */
;;;620        tmpreg1 &= ~tmpreg2;
000014  43b5              BICS     r5,r5,r6
;;;621        /* Calculate the mask to set */
;;;622        tmpreg2 = (u32)ADC_SampleTime << (3 * (ADC_Channel - 10));
000016  40a3              LSLS     r3,r3,r4
;;;623        /* Set the discontinuous mode channel count */
;;;624        tmpreg1 |= tmpreg2;
000018  431d              ORRS     r5,r5,r3
;;;625        /* Store the new register value */
;;;626        ADCx->SMPR1 = tmpreg1;
00001a  60c5              STR      r5,[r0,#0xc]
00001c  e007              B        |L29.46|
                  |L29.30|
;;;627      }
;;;628      else /* ADC_Channel include in ADC_Channel_[0..9] */
;;;629      {
;;;630        /* Get the old register value */
;;;631        tmpreg1 = ADCx->SMPR2;
00001e  6905              LDR      r5,[r0,#0x10]
;;;632        /* Calculate the mask to clear */
;;;633        tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
000020  eb010441          ADD      r4,r1,r1,LSL #1
000024  40a6              LSLS     r6,r6,r4
;;;634        /* Clear the old discontinuous mode channel count */
;;;635        tmpreg1 &= ~tmpreg2;
000026  43b5              BICS     r5,r5,r6
;;;636        /* Calculate the mask to set */
;;;637        tmpreg2 = (u32)ADC_SampleTime << (3 * ADC_Channel);
000028  40a3              LSLS     r3,r3,r4
;;;638        /* Set the discontinuous mode channel count */
;;;639        tmpreg1 |= tmpreg2;
00002a  431d              ORRS     r5,r5,r3
;;;640        /* Store the new register value */
;;;641        ADCx->SMPR2 = tmpreg1;
00002c  6105              STR      r5,[r0,#0x10]
                  |L29.46|
;;;642      }
;;;643      /* For Rank 1 to 6 */
;;;644      if (Rank < 7)
;;;645      {
;;;646        /* Get the old register value */
;;;647        tmpreg1 = ADCx->SQR3;
;;;648        /* Calculate the mask to clear */
;;;649        tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1));
00002e  231f              MOVS     r3,#0x1f
000030  2a07              CMP      r2,#7                 ;644
000032  d209              BCS      |L29.72|
000034  6b44              LDR      r4,[r0,#0x34]         ;647
000036  1e52              SUBS     r2,r2,#1
000038  eb020282          ADD      r2,r2,r2,LSL #2
00003c  4093              LSLS     r3,r3,r2
;;;650        /* Clear the old SQx bits for the selected rank */
;;;651        tmpreg1 &= ~tmpreg2;
00003e  439c              BICS     r4,r4,r3
;;;652        /* Calculate the mask to set */
;;;653        tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 1));
000040  4091              LSLS     r1,r1,r2
;;;654        /* Set the SQx bits for the selected rank */
;;;655        tmpreg1 |= tmpreg2;
000042  430c              ORRS     r4,r4,r1
;;;656        /* Store the new register value */
;;;657        ADCx->SQR3 = tmpreg1;
000044  6344              STR      r4,[r0,#0x34]
;;;658      }
;;;659      /* For Rank 7 to 12 */
;;;660      else if (Rank < 13)
;;;661      {
;;;662        /* Get the old register value */
;;;663        tmpreg1 = ADCx->SQR2;
;;;664        /* Calculate the mask to clear */
;;;665        tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7));
;;;666        /* Clear the old SQx bits for the selected rank */
;;;667        tmpreg1 &= ~tmpreg2;
;;;668        /* Calculate the mask to set */
;;;669        tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 7));
;;;670        /* Set the SQx bits for the selected rank */
;;;671        tmpreg1 |= tmpreg2;
;;;672        /* Store the new register value */
;;;673        ADCx->SQR2 = tmpreg1;
;;;674      }
;;;675      /* For Rank 13 to 16 */
;;;676      else
;;;677      {
;;;678        /* Get the old register value */
;;;679        tmpreg1 = ADCx->SQR1;
;;;680        /* Calculate the mask to clear */
;;;681        tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13));
;;;682        /* Clear the old SQx bits for the selected rank */
;;;683        tmpreg1 &= ~tmpreg2;
;;;684        /* Calculate the mask to set */
;;;685        tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 13));
;;;686        /* Set the SQx bits for the selected rank */
;;;687        tmpreg1 |= tmpreg2;
;;;688        /* Store the new register value */
;;;689        ADCx->SQR1 = tmpreg1;
;;;690      }
;;;691    }
000046  bd70              POP      {r4-r6,pc}
                  |L29.72|
000048  2a0d              CMP      r2,#0xd               ;660
00004a  d209              BCS      |L29.96|
00004c  6b04              LDR      r4,[r0,#0x30]         ;663
00004e  1fd2              SUBS     r2,r2,#7              ;665
000050  eb020282          ADD      r2,r2,r2,LSL #2       ;665
000054  4093              LSLS     r3,r3,r2              ;665
000056  439c              BICS     r4,r4,r3              ;667
000058  4091              LSLS     r1,r1,r2              ;669
00005a  430c              ORRS     r4,r4,r1              ;671
00005c  6304              STR      r4,[r0,#0x30]         ;673
00005e  bd70              POP      {r4-r6,pc}
                  |L29.96|
000060  6ac4              LDR      r4,[r0,#0x2c]         ;679
000062  3a0d              SUBS     r2,r2,#0xd            ;681
000064  eb020282          ADD      r2,r2,r2,LSL #2       ;681
000068  4093              LSLS     r3,r3,r2              ;681
00006a  439c              BICS     r4,r4,r3              ;683
00006c  4091              LSLS     r1,r1,r2              ;685
00006e  430c              ORRS     r4,r4,r1              ;687
000070  62c4              STR      r4,[r0,#0x2c]         ;689
000072  bd70              POP      {r4-r6,pc}
;;;692    
                          ENDP


                          AREA ||i.ADC_ResetCalibration||, CODE, READONLY, ALIGN=1

                  ADC_ResetCalibration PROC
;;;357    *******************************************************************************/
;;;358    void ADC_ResetCalibration(ADC_TypeDef* ADCx)
000000  6881              LDR      r1,[r0,#8]
;;;359    {
;;;360      /* Check the parameters */
;;;361      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;362    
;;;363      /* Resets the selected ADC calibartion registers */  
;;;364      ADCx->CR2 |= CR2_RSTCAL_Set;
000002  f0410108          ORR      r1,r1,#8
000006  6081              STR      r1,[r0,#8]
;;;365    }
000008  4770              BX       lr
;;;366    
                          ENDP


                          AREA ||i.ADC_SetInjectedOffset||, CODE, READONLY, ALIGN=1

                  ADC_SetInjectedOffset PROC
;;;1097   *******************************************************************************/
;;;1098   void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, u8 ADC_InjectedChannel, u16 Offset)
000000  5042              STR      r2,[r0,r1]
;;;1099   {
;;;1100     /* Check the parameters */
;;;1101     assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1102     assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
;;;1103     assert_param(IS_ADC_OFFSET(Offset));  
;;;1104   
;;;1105     /* Set the selected injected channel data offset */
;;;1106     *((vu32 *)((*(u32*)&ADCx) + ADC_InjectedChannel)) = (u32)Offset;
;;;1107   }
000002  4770              BX       lr
;;;1108   
                          ENDP


                          AREA ||i.ADC_SoftwareStartConvCmd||, CODE, READONLY, ALIGN=1

                  ADC_SoftwareStartConvCmd PROC
;;;451    *******************************************************************************/
;;;452    void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  2900              CMP      r1,#0
;;;453    {
;;;454      /* Check the parameters */
;;;455      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;456      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;457    
;;;458      if (NewState != DISABLE)
;;;459      {
;;;460        /* Enable the selected ADC conversion on external event and start the selected
;;;461           ADC conversion */
;;;462        ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set;
000002  6881              LDR      r1,[r0,#8]
000004  d002              BEQ      |L32.12|
000006  f44101a0          ORR      r1,r1,#0x500000
00000a  e001              B        |L32.16|
                  |L32.12|
;;;463      }
;;;464      else
;;;465      {
;;;466        /* Disable the selected ADC conversion on external event and stop the selected
;;;467           ADC conversion */
;;;468        ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset;
00000c  f42101a0          BIC      r1,r1,#0x500000
                  |L32.16|
000010  6081              STR      r1,[r0,#8]            ;462
;;;469      }
;;;470    }
000012  4770              BX       lr
;;;471    
                          ENDP


                          AREA ||i.ADC_SoftwareStartInjectedConvCmd||, CODE, READONLY, ALIGN=1

                  ADC_SoftwareStartInjectedConvCmd PROC
;;;902    *******************************************************************************/
;;;903    void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000  2900              CMP      r1,#0
;;;904    {
;;;905      /* Check the parameters */
;;;906      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;907      assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;908    
;;;909      if (NewState != DISABLE)
;;;910      {
;;;911        /* Enable the selected ADC conversion for injected group on external event and start the selected
;;;912           ADC injected conversion */
;;;913        ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set;
000002  6881              LDR      r1,[r0,#8]
000004  d002              BEQ      |L33.12|
000006  f4411102          ORR      r1,r1,#0x208000
00000a  e001              B        |L33.16|
                  |L33.12|
;;;914      }
;;;915      else
;;;916      {
;;;917        /* Disable the selected ADC conversion on external event for injected group and stop the selected
;;;918           ADC injected conversion */
;;;919        ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset;
00000c  f4211102          BIC      r1,r1,#0x208000
                  |L33.16|
000010  6081              STR      r1,[r0,#8]            ;913
;;;920      }
;;;921    }
000012  4770              BX       lr
;;;922    
                          ENDP


                          AREA ||i.ADC_StartCalibration||, CODE, READONLY, ALIGN=1

                  ADC_StartCalibration PROC
;;;403    *******************************************************************************/
;;;404    void ADC_StartCalibration(ADC_TypeDef* ADCx)
000000  6881              LDR      r1,[r0,#8]
;;;405    {
;;;406      /* Check the parameters */
;;;407      assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;408    
;;;409      /* Enable the selected ADC calibration process */  
;;;410      ADCx->CR2 |= CR2_CAL_Set;
000002  f0410104          ORR      r1,r1,#4
000006  6081              STR      r1,[r0,#8]
;;;411    }
000008  4770              BX       lr
;;;412    
                          ENDP


                          AREA ||i.ADC_StructInit||, CODE, READONLY, ALIGN=1

                  ADC_StructInit PROC
;;;234    *******************************************************************************/
;;;235    void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
000000  2100              MOVS     r1,#0
;;;236    {
;;;237      /* Reset ADC init structure parameters values */
;;;238      /* Initialize the ADC_Mode member */
;;;239      ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
;;;240    
;;;241      /* initialize the ADC_ScanConvMode member */
;;;242      ADC_InitStruct->ADC_ScanConvMode = DISABLE;
000002  6001              STR      r1,[r0,#0]
000004  7101              STRB     r1,[r0,#4]
;;;243    
;;;244      /* Initialize the ADC_ContinuousConvMode member */
;;;245      ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
000006  7141              STRB     r1,[r0,#5]
;;;246    
;;;247      /* Initialize the ADC_ExternalTrigConv member */
;;;248      ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
;;;249    
;;;250      /* Initialize the ADC_DataAlign member */
;;;251      ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
000008  6081              STR      r1,[r0,#8]
;;;252    
;;;253      /* Initialize the ADC_NbrOfChannel member */
;;;254      ADC_InitStruct->ADC_NbrOfChannel = 1;
00000a  60c1              STR      r1,[r0,#0xc]
00000c  2101              MOVS     r1,#1
00000e  7401              STRB     r1,[r0,#0x10]
;;;255    }
000010  4770              BX       lr
;;;256    
                          ENDP


                          AREA ||i.ADC_TempSensorVrefintCmd||, CODE, READONLY, ALIGN=2

                  ADC_TempSensorVrefintCmd PROC
;;;1252   *******************************************************************************/
;;;1253   void ADC_TempSensorVrefintCmd(FunctionalState NewState)
000000  4906              LDR      r1,|L36.28|
;;;1254   {
;;;1255     /* Check the parameters */
;;;1256     assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;1257   
;;;1258     if (NewState != DISABLE)
000002  2800              CMP      r0,#0
;;;1259     {
;;;1260       /* Enable the temperature sensor and Vrefint channel*/
;;;1261       ADC1->CR2 |= CR2_TSVREFE_Set;
000004  f8d10408          LDR      r0,[r1,#0x408]
000008  d002              BEQ      |L36.16|
00000a  f4400000          ORR      r0,r0,#0x800000
00000e  e001              B        |L36.20|
                  |L36.16|
;;;1262     }
;;;1263     else
;;;1264     {
;;;1265       /* Disable the temperature sensor and Vrefint channel*/
;;;1266       ADC1->CR2 &= CR2_TSVREFE_Reset;
000010  f4200000          BIC      r0,r0,#0x800000
                  |L36.20|
000014  f8c10408          STR      r0,[r1,#0x408]        ;1261
;;;1267     }
;;;1268   }
000018  4770              BX       lr
;;;1269   
                          ENDP

00001a  0000              DCW      0x0000
                  |L36.28|
                          DCD      0x40012000

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