📄 stm32f10x_adc.txt
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; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\stm32f10x_adc.o --depend=.\Obj\stm32f10x_adc.d --device=DARMSTM --apcs=interwork -O3 -I..\..\include -I..\..\..\FWLib\library\inc -I..\..\..\USBLib\library\inc -I..\..\Config -I..\..\GUI\Core -I..\..\GUI\Font -I..\..\GUI\ConvertColor -I..\..\GUI\AntiAlias -I..\..\GUI\ConvertMono -I..\..\GUI\JPEG -I..\..\GUI\MemDev -I..\..\GUI\MultiLayer -I..\..\GUI\Widget -I..\..\GUI\WM -IC:\Keil\ARM\INC\ST\STM32F10x ..\..\..\FWLib\library\src\stm32f10x_adc.c]
THUMB
AREA ||i.ADC_AnalogWatchdogCmd||, CODE, READONLY, ALIGN=2
ADC_AnalogWatchdogCmd PROC
;;;1155 *******************************************************************************/
;;;1156 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, u32 ADC_AnalogWatchdog)
000000 6842 LDR r2,[r0,#4]
;;;1157 {
;;;1158 u32 tmpreg = 0;
;;;1159
;;;1160 /* Check the parameters */
;;;1161 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1162 assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
;;;1163
;;;1164 /* Get the old register value */
;;;1165 tmpreg = ADCx->CR1;
;;;1166 /* Clear AWDEN, AWDENJ and AWDSGL bits */
;;;1167 tmpreg &= CR1_AWDMode_Reset;
000002 4b02 LDR r3,|L1.12|
000004 401a ANDS r2,r2,r3
;;;1168 /* Set the analog watchdog enable mode */
;;;1169 tmpreg |= ADC_AnalogWatchdog;
000006 430a ORRS r2,r2,r1
;;;1170 /* Store the new register value */
;;;1171 ADCx->CR1 = tmpreg;
000008 6042 STR r2,[r0,#4]
;;;1172 }
00000a 4770 BX lr
;;;1173
ENDP
|L1.12|
DCD 0xff3ffdff
AREA ||i.ADC_AnalogWatchdogSingleChannelConfig||, CODE, READONLY, ALIGN=1
ADC_AnalogWatchdogSingleChannelConfig PROC
;;;1226 *******************************************************************************/
;;;1227 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel)
000000 6842 LDR r2,[r0,#4]
;;;1228 {
;;;1229 u32 tmpreg = 0;
;;;1230
;;;1231 /* Check the parameters */
;;;1232 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1233 assert_param(IS_ADC_CHANNEL(ADC_Channel));
;;;1234
;;;1235 /* Get the old register value */
;;;1236 tmpreg = ADCx->CR1;
;;;1237 /* Clear the Analog watchdog channel select bits */
;;;1238 tmpreg &= CR1_AWDCH_Reset;
000002 f022021f BIC r2,r2,#0x1f
;;;1239 /* Set the Analog watchdog channel */
;;;1240 tmpreg |= ADC_Channel;
000006 430a ORRS r2,r2,r1
;;;1241 /* Store the new register value */
;;;1242 ADCx->CR1 = tmpreg;
000008 6042 STR r2,[r0,#4]
;;;1243 }
00000a 4770 BX lr
;;;1244
ENDP
AREA ||i.ADC_AnalogWatchdogThresholdsConfig||, CODE, READONLY, ALIGN=1
ADC_AnalogWatchdogThresholdsConfig PROC
;;;1184 *******************************************************************************/
;;;1185 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, u16 HighThreshold,
000000 6241 STR r1,[r0,#0x24]
;;;1186 u16 LowThreshold)
;;;1187 {
;;;1188 /* Check the parameters */
;;;1189 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1190 assert_param(IS_ADC_THRESHOLD(HighThreshold));
;;;1191 assert_param(IS_ADC_THRESHOLD(LowThreshold));
;;;1192
;;;1193 /* Set the ADCx high threshold */
;;;1194 ADCx->HTR = HighThreshold;
;;;1195 /* Set the ADCx low threshold */
;;;1196 ADCx->LTR = LowThreshold;
000002 6282 STR r2,[r0,#0x28]
;;;1197 }
000004 4770 BX lr
;;;1198
ENDP
AREA ||i.ADC_AutoInjectedConvCmd||, CODE, READONLY, ALIGN=1
ADC_AutoInjectedConvCmd PROC
;;;759 *******************************************************************************/
;;;760 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000 2900 CMP r1,#0
;;;761 {
;;;762 /* Check the parameters */
;;;763 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;764 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;765
;;;766 if (NewState != DISABLE)
;;;767 {
;;;768 /* Enable the selected ADC automatic injected group conversion */
;;;769 ADCx->CR1 |= CR1_JAUTO_Set;
000002 6841 LDR r1,[r0,#4]
000004 d002 BEQ |L4.12|
000006 f4416180 ORR r1,r1,#0x400
00000a e001 B |L4.16|
|L4.12|
;;;770 }
;;;771 else
;;;772 {
;;;773 /* Disable the selected ADC automatic injected group conversion */
;;;774 ADCx->CR1 &= CR1_JAUTO_Reset;
00000c f4216180 BIC r1,r1,#0x400
|L4.16|
000010 6041 STR r1,[r0,#4] ;769
;;;775 }
;;;776 }
000012 4770 BX lr
;;;777
ENDP
AREA ||i.ADC_ClearFlag||, CODE, READONLY, ALIGN=1
ADC_ClearFlag PROC
;;;1321 *******************************************************************************/
;;;1322 void ADC_ClearFlag(ADC_TypeDef* ADCx, u8 ADC_FLAG)
000000 43c9 MVNS r1,r1
;;;1323 {
;;;1324 /* Check the parameters */
;;;1325 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1326 assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
;;;1327
;;;1328 /* Clear the selected ADC flags */
;;;1329 ADCx->SR = ~(u32)ADC_FLAG;
000002 6001 STR r1,[r0,#0]
;;;1330 }
000004 4770 BX lr
;;;1331
ENDP
AREA ||i.ADC_ClearITPendingBit||, CODE, READONLY, ALIGN=1
ADC_ClearITPendingBit PROC
;;;1386 *******************************************************************************/
;;;1387 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, u16 ADC_IT)
000000 ea6f2111 MVN r1,r1,LSR #8
;;;1388 {
;;;1389 u8 itmask = 0;
;;;1390
;;;1391 /* Check the parameters */
;;;1392 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;1393 assert_param(IS_ADC_IT(ADC_IT));
;;;1394
;;;1395 /* Get the ADC IT index */
;;;1396 itmask = (u8)(ADC_IT >> 8);
;;;1397
;;;1398 /* Clear the selected ADC interrupt pending bits */
;;;1399 ADCx->SR = ~(u32)itmask;
000004 6001 STR r1,[r0,#0]
;;;1400 }
000006 4770 BX lr
;;;1401
ENDP
AREA ||i.ADC_Cmd||, CODE, READONLY, ALIGN=1
ADC_Cmd PROC
;;;265 *******************************************************************************/
;;;266 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000 2900 CMP r1,#0
;;;267 {
;;;268 /* Check the parameters */
;;;269 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;270 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;271
;;;272 if (NewState != DISABLE)
;;;273 {
;;;274 /* Set the ADON bit to wake up the ADC from power down mode */
;;;275 ADCx->CR2 |= CR2_ADON_Set;
000002 6881 LDR r1,[r0,#8]
000004 d002 BEQ |L7.12|
000006 f0410101 ORR r1,r1,#1
00000a e001 B |L7.16|
|L7.12|
;;;276 }
;;;277 else
;;;278 {
;;;279 /* Disable the selected ADC peripheral */
;;;280 ADCx->CR2 &= CR2_ADON_Reset;
00000c f0210101 BIC r1,r1,#1
|L7.16|
000010 6081 STR r1,[r0,#8] ;275
;;;281 }
;;;282 }
000012 4770 BX lr
;;;283
ENDP
AREA ||i.ADC_DMACmd||, CODE, READONLY, ALIGN=1
ADC_DMACmd PROC
;;;293 *******************************************************************************/
;;;294 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000 2900 CMP r1,#0
;;;295 {
;;;296 /* Check the parameters */
;;;297 assert_param(IS_ADC_DMA_PERIPH(ADCx));
;;;298 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;299
;;;300 if (NewState != DISABLE)
;;;301 {
;;;302 /* Enable the selected ADC DMA request */
;;;303 ADCx->CR2 |= CR2_DMA_Set;
000002 6881 LDR r1,[r0,#8]
000004 d002 BEQ |L8.12|
000006 f4417180 ORR r1,r1,#0x100
00000a e001 B |L8.16|
|L8.12|
;;;304 }
;;;305 else
;;;306 {
;;;307 /* Disable the selected ADC DMA request */
;;;308 ADCx->CR2 &= CR2_DMA_Reset;
00000c f4217180 BIC r1,r1,#0x100
|L8.16|
000010 6081 STR r1,[r0,#8] ;303
;;;309 }
;;;310 }
000012 4770 BX lr
;;;311
ENDP
AREA ||i.ADC_DeInit||, CODE, READONLY, ALIGN=2
ADC_DeInit PROC
;;;129 *******************************************************************************/
;;;130 void ADC_DeInit(ADC_TypeDef* ADCx)
000000 490d LDR r1,|L9.56|
;;;131 {
000002 b510 PUSH {r4,lr}
;;;132 /* Check the parameters */
;;;133 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;134
;;;135 switch (*(u32*)&ADCx)
000004 1840 ADDS r0,r0,r1
000006 d011 BEQ |L9.44|
000008 f44f6480 MOV r4,#0x400
00000c 42a0 CMP r0,r4
00000e d010 BEQ |L9.50|
000010 f5b05fc0 CMP r0,#0x1800
000014 d10f BNE |L9.54|
;;;136 {
;;;137 case ADC1_BASE:
;;;138 /* Enable ADC1 reset state */
;;;139 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
;;;140 /* Release ADC1 from reset state */
;;;141 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
;;;142 break;
;;;143
;;;144 case ADC2_BASE:
;;;145 /* Enable ADC2 reset state */
;;;146 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
;;;147 /* Release ADC2 from reset state */
;;;148 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
;;;149 break;
;;;150
;;;151 case ADC3_BASE:
;;;152 /* Enable ADC3 reset state */
;;;153 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
000016 2101 MOVS r1,#1
000018 03cc LSLS r4,r1,#15
|L9.26|
00001a 4620 MOV r0,r4
00001c f7fffffe BL RCC_APB2PeriphResetCmd
;;;154 /* Release ADC3 from reset state */
;;;155 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
000020 4620 MOV r0,r4
000022 e8bd4010 POP {r4,lr}
000026 2100 MOVS r1,#0
000028 f7ffbffe B.W RCC_APB2PeriphResetCmd
|L9.44|
00002c 2101 MOVS r1,#1 ;139
00002e 024c LSLS r4,r1,#9 ;139
000030 e7f3 B |L9.26|
|L9.50|
000032 2101 MOVS r1,#1 ;146
000034 e7f1 B |L9.26|
|L9.54|
;;;156 break;
;;;157
;;;158 default:
;;;159 break;
;;;160 }
;;;161 }
000036 bd10 POP {r4,pc}
;;;162
ENDP
|L9.56|
DCD 0xbffedc00
AREA ||i.ADC_DiscModeChannelCountConfig||, CODE, READONLY, ALIGN=1
ADC_DiscModeChannelCountConfig PROC
;;;511 *******************************************************************************/
;;;512 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, u8 Number)
000000 6842 LDR r2,[r0,#4]
;;;513 {
;;;514 u32 tmpreg1 = 0;
;;;515 u32 tmpreg2 = 0;
;;;516
;;;517 /* Check the parameters */
;;;518 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;519 assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
;;;520
;;;521 /* Get the old register value */
;;;522 tmpreg1 = ADCx->CR1;
;;;523 /* Clear the old discontinuous mode channel count */
;;;524 tmpreg1 &= CR1_DISCNUM_Reset;
;;;525 /* Set the discontinuous mode channel count */
;;;526 tmpreg2 = Number - 1;
000002 1e49 SUBS r1,r1,#1
000004 f4224260 BIC r2,r2,#0xe000 ;524
;;;527 tmpreg1 |= tmpreg2 << 13;
000008 ea423141 ORR r1,r2,r1,LSL #13
;;;528 /* Store the new register value */
;;;529 ADCx->CR1 = tmpreg1;
00000c 6041 STR r1,[r0,#4]
;;;530 }
00000e 4770 BX lr
;;;531
ENDP
AREA ||i.ADC_DiscModeCmd||, CODE, READONLY, ALIGN=1
ADC_DiscModeCmd PROC
;;;542 *******************************************************************************/
;;;543 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
000000 2900 CMP r1,#0
;;;544 {
;;;545 /* Check the parameters */
;;;546 assert_param(IS_ADC_ALL_PERIPH(ADCx));
;;;547 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;548
;;;549 if (NewState != DISABLE)
;;;550 {
;;;551 /* Enable the selected ADC regular discontinuous mode */
;;;552 ADCx->CR1 |= CR1_DISCEN_Set;
000002 6841 LDR r1,[r0,#4]
000004 d002 BEQ |L11.12|
000006 f4416100 ORR r1,r1,#0x800
00000a e001 B |L11.16|
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