fsmc_nand.txt

STM32F103ZET6+UCOSII+UCGUI源码

; generated by ARM C/C++ Compiler with , RVCT4.0 [Build 524] for uVision
; commandline ArmCC [--split_sections --debug -c --asm --interleave -o.\Obj\fsmc_nand.o --depend=.\Obj\fsmc_nand.d --device=DARMSTM --apcs=interwork -O3 -I..\..\include -I..\..\..\FWLib\library\inc -I..\..\..\USBLib\library\inc -I..\..\Config -I..\..\GUI\Core -I..\..\GUI\Font -I..\..\GUI\ConvertColor -I..\..\GUI\AntiAlias -I..\..\GUI\ConvertMono -I..\..\GUI\JPEG -I..\..\GUI\MemDev -I..\..\GUI\MultiLayer -I..\..\GUI\Widget -I..\..\GUI\WM -IC:\Keil\ARM\INC\ST\STM32F10x ..\..\source\fsmc_nand.c]
                          THUMB

                          AREA ||i.FSMC_NAND_AddressIncrement||, CODE, READONLY, ALIGN=1

                  FSMC_NAND_AddressIncrement PROC
;;;464    *******************************************************************************/
;;;465    u32 FSMC_NAND_AddressIncrement(NAND_ADDRESS* Address)
000000  8882              LDRH     r2,[r0,#4]
;;;466    {
;;;467      u32 status = NAND_VALID_ADDRESS;
000002  f44f7180          MOV      r1,#0x100
;;;468     
;;;469      Address->Page++;
000006  1c52              ADDS     r2,r2,#1
000008  b292              UXTH     r2,r2
00000a  8082              STRH     r2,[r0,#4]
;;;470    
;;;471      if(Address->Page == NAND_BLOCK_SIZE)
00000c  2a20              CMP      r2,#0x20
00000e  d110              BNE      |L1.50|
;;;472      {
;;;473        Address->Page = 0;
000010  2300              MOVS     r3,#0
000012  8083              STRH     r3,[r0,#4]
;;;474        Address->Block++;
000014  8842              LDRH     r2,[r0,#2]
000016  1c52              ADDS     r2,r2,#1
000018  b292              UXTH     r2,r2
00001a  8042              STRH     r2,[r0,#2]
;;;475        
;;;476        if(Address->Block == NAND_ZONE_SIZE)
00001c  f5b26f80          CMP      r2,#0x400
000020  d107              BNE      |L1.50|
;;;477        {
;;;478          Address->Block = 0;
000022  8043              STRH     r3,[r0,#2]
;;;479          Address->Zone++;
000024  8802              LDRH     r2,[r0,#0]
000026  1c52              ADDS     r2,r2,#1
000028  b292              UXTH     r2,r2
00002a  8002              STRH     r2,[r0,#0]
;;;480    
;;;481          if(Address->Zone == NAND_MAX_ZONE)
00002c  2a04              CMP      r2,#4
00002e  d100              BNE      |L1.50|
;;;482          {
;;;483            status = NAND_INVALID_ADDRESS;
000030  0049              LSLS     r1,r1,#1
                  |L1.50|
;;;484          }
;;;485        }
;;;486      } 
;;;487      
;;;488      return (status);
000032  4608              MOV      r0,r1
;;;489    }
000034  4770              BX       lr
;;;490    
                          ENDP


                          AREA ||i.FSMC_NAND_EraseBlock||, CODE, READONLY, ALIGN=2

                  FSMC_NAND_EraseBlock PROC
;;;363    *******************************************************************************/
;;;364    u32 FSMC_NAND_EraseBlock(NAND_ADDRESS Address)
000000  4a09              LDR      r2,|L2.40|
;;;365    {
;;;366      *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE0;
000002  2360              MOVS     r3,#0x60
000004  7013              STRB     r3,[r2,#0]
000006  0c03              LSRS     r3,r0,#16
;;;367    
;;;368      *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_1st_CYCLE(ROW_ADDRESS);
000008  eb032080          ADD      r0,r3,r0,LSL #10
00000c  b289              UXTH     r1,r1
00000e  eb011040          ADD      r0,r1,r0,LSL #5
000012  4906              LDR      r1,|L2.44|
000014  7008              STRB     r0,[r1,#0]
;;;369      *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_2nd_CYCLE(ROW_ADDRESS);
000016  0a03              LSRS     r3,r0,#8
000018  700b              STRB     r3,[r1,#0]
;;;370      *(vu8 *)(Bank_NAND_ADDR | ADDR_AREA) = ADDR_3rd_CYCLE(ROW_ADDRESS);
00001a  0c00              LSRS     r0,r0,#16
00001c  7008              STRB     r0,[r1,#0]
;;;371    		
;;;372      *(vu8 *)(Bank_NAND_ADDR | CMD_AREA) = NAND_CMD_ERASE1; 
00001e  20d0              MOVS     r0,#0xd0
000020  7010              STRB     r0,[r2,#0]
;;;373    
;;;374      return (FSMC_NAND_GetStatus());
000022  f7ffbffe          B.W      FSMC_NAND_GetStatus
;;;375    }
;;;376    
                          ENDP

000026  0000              DCW      0x0000
                  |L2.40|
                          DCD      0x70010000
                  |L2.44|
                          DCD      0x70020000

                          AREA ||i.FSMC_NAND_GetStatus||, CODE, READONLY, ALIGN=1

                  FSMC_NAND_GetStatus PROC
;;;400    *******************************************************************************/
;;;401    u32 FSMC_NAND_GetStatus(void)
000000  b500              PUSH     {lr}
;;;402    {
;;;403      u32 timeout = 0x1000000, status = NAND_READY;
000002  f04f7380          MOV      r3,#0x1000000
;;;404    
;;;405      status = FSMC_NAND_ReadStatus(); 
000006  f7fffffe          BL       FSMC_NAND_ReadStatus
;;;406    
;;;407      /* Wait for a NAND operation to complete or a TIMEOUT to occur */
;;;408      while ((status != NAND_READY) &&( timeout != 0x00))
00000a  e002              B        |L3.18|
                  |L3.12|
;;;409      {
;;;410         status = FSMC_NAND_ReadStatus();
00000c  f7fffffe          BL       FSMC_NAND_ReadStatus
;;;411         timeout --;      
000010  1e5b              SUBS     r3,r3,#1
                  |L3.18|
000012  2840              CMP      r0,#0x40              ;408
000014  d002              BEQ      |L3.28|
000016  2b00              CMP      r3,#0                 ;408
000018  d1f8              BNE      |L3.12|
00001a  e001              B        |L3.32|
                  |L3.28|
;;;412      }
;;;413    
;;;414      if(timeout == 0x00)
00001c  2b00              CMP      r3,#0
00001e  d101              BNE      |L3.36|
                  |L3.32|
;;;415      {          
;;;416        status =  NAND_TIMEOUT_ERROR;      
000020  f44f6080          MOV      r0,#0x400
                  |L3.36|
;;;417      } 
;;;418    
;;;419      /* Return the operation status */
;;;420      return (status);      
;;;421    }
000024  bd00              POP      {pc}
;;;422    /******************************************************************************
                          ENDP


                          AREA ||i.FSMC_NAND_Init||, CODE, READONLY, ALIGN=2

                  FSMC_NAND_Init PROC
;;;40     *******************************************************************************/
;;;41     void FSMC_NAND_Init(void)
000000  b570              PUSH     {r4-r6,lr}
;;;42     {
000002  b090              SUB      sp,sp,#0x40
;;;43       GPIO_InitTypeDef GPIO_InitStructure; 
;;;44       FSMC_NANDInitTypeDef FSMC_NANDInitStructure;
;;;45       FSMC_NAND_PCCARDTimingInitTypeDef  p;
;;;46       
;;;47       RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | 
000004  2101              MOVS     r1,#1
000006  f44f70f0          MOV      r0,#0x1e0
00000a  f7fffffe          BL       RCC_APB2PeriphClockCmd
;;;48                              RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE);
;;;49       
;;;50     /*-- GPIO Configuration ------------------------------------------------------*/
;;;51     /* CLE, ALE, D0->D3, NOE, NWE and NCE2  NAND pin configuration  */
;;;52       GPIO_InitStructure.GPIO_Pin =  GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_14 | GPIO_Pin_15 |  
00000e  f64d00b3          MOV      r0,#0xd8b3
000012  f8ad003c          STRH     r0,[sp,#0x3c]
;;;53                                      GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | 
;;;54                                      GPIO_Pin_7;                                  
;;;55       GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
000016  2503              MOVS     r5,#3
000018  f88d503e          STRB     r5,[sp,#0x3e]
;;;56       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00001c  2018              MOVS     r0,#0x18
;;;57     
;;;58       GPIO_Init(GPIOD, &GPIO_InitStructure); 
00001e  4e1f              LDR      r6,|L4.156|
000020  f88d003f          STRB     r0,[sp,#0x3f]         ;56
000024  a90f              ADD      r1,sp,#0x3c
000026  4630              MOV      r0,r6
000028  f7fffffe          BL       GPIO_Init
;;;59     
;;;60     /* D4->D7 NAND pin configuration  */  
;;;61       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
00002c  f44f60f0          MOV      r0,#0x780
000030  f8ad003c          STRH     r0,[sp,#0x3c]
;;;62     
;;;63       GPIO_Init(GPIOE, &GPIO_InitStructure);
000034  a90f              ADD      r1,sp,#0x3c
000036  481a              LDR      r0,|L4.160|
000038  f7fffffe          BL       GPIO_Init
;;;64     
;;;65     
;;;66     /* NWAIT NAND pin configuration */
;;;67       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;   							 
00003c  2440              MOVS     r4,#0x40
00003e  f8ad403c          STRH     r4,[sp,#0x3c]
;;;68       GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
000042  f88d503e          STRB     r5,[sp,#0x3e]
;;;69       GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
000046  2048              MOVS     r0,#0x48
000048  f88d003f          STRB     r0,[sp,#0x3f]
;;;70     
;;;71       GPIO_Init(GPIOD, &GPIO_InitStructure); 
00004c  a90f              ADD      r1,sp,#0x3c
00004e  4630              MOV      r0,r6
000050  f7fffffe          BL       GPIO_Init
;;;72     
;;;73     /* INT2 NAND pin configuration */  
;;;74       GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;   							 
000054  f8ad403c          STRH     r4,[sp,#0x3c]
;;;75       GPIO_Init(GPIOG, &GPIO_InitStructure);
000058  a90f              ADD      r1,sp,#0x3c
00005a  4812              LDR      r0,|L4.164|
00005c  f7fffffe          BL       GPIO_Init
;;;76     
;;;77       /*-- FSMC Configuration ------------------------------------------------------*/
;;;78       p.FSMC_SetupTime = 0x1;
000060  2001              MOVS     r0,#1
;;;79       p.FSMC_WaitSetupTime = 0x3;
;;;80       p.FSMC_HoldSetupTime = 0x2;
;;;81       p.FSMC_HiZSetupTime = 0x1;
000062  e9cd0501          STRD     r0,r5,[sp,#4]
000066  2102              MOVS     r1,#2                 ;80
;;;82     
;;;83       FSMC_NANDInitStructure.FSMC_Bank = FSMC_Bank2_NAND;
000068  e9cd1003          STRD     r1,r0,[sp,#0xc]
00006c  2010              MOVS     r0,#0x10
;;;84       FSMC_NANDInitStructure.FSMC_Waitfeature = FSMC_Waitfeature_Enable;
;;;85       FSMC_NANDInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
00006e  e9cd0105          STRD     r0,r1,[sp,#0x14]
000072  2000              MOVS     r0,#0
;;;86       FSMC_NANDInitStructure.FSMC_ECC = FSMC_ECC_Enable;
;;;87       FSMC_NANDInitStructure.FSMC_ECCPageSize = FSMC_ECCPageSize_512Bytes;
;;;88       FSMC_NANDInitStructure.FSMC_AddressLowMapping = FSMC_AddressLowMapping_Direct;
000074  e9cd0407          STRD     r0,r4,[sp,#0x1c]
000078  0409              LSLS     r1,r1,#16             ;87
;;;89       FSMC_NANDInitStructure.FSMC_TCLRSetupTime = 0x00;
00007a  e9cd1009          STRD     r1,r0,[sp,#0x24]
;;;90       FSMC_NANDInitStructure.FSMC_TARSetupTime = 0x00;
00007e  900b              STR      r0,[sp,#0x2c]
;;;91       FSMC_NANDInitStructure.FSMC_CommonSpaceTimingStruct = &p;
000080  900c              STR      r0,[sp,#0x30]
000082  a801              ADD      r0,sp,#4
;;;92       FSMC_NANDInitStructure.FSMC_AttributeSpaceTimingStruct = &p;
000084  900d              STR      r0,[sp,#0x34]
;;;93     
;;;94       FSMC_NANDInit(&FSMC_NANDInitStructure);
000086  900e              STR      r0,[sp,#0x38]
000088  a805              ADD      r0,sp,#0x14
00008a  f7fffffe          BL       FSMC_NANDInit
;;;95     
;;;96       /* FSMC NAND Bank Cmd Test */
;;;97       FSMC_NANDCmd(FSMC_Bank2_NAND, ENABLE);
00008e  2101              MOVS     r1,#1
000090  2010              MOVS     r0,#0x10
000092  f7fffffe          BL       FSMC_NANDCmd
;;;98     }
000096  b010              ADD      sp,sp,#0x40
000098  bd70              POP      {r4-r6,pc}
;;;99     
                          ENDP

00009a  0000              DCW      0x0000
                  |L4.156|
                          DCD      0x40011400
                  |L4.160|
                          DCD      0x40011800
                  |L4.164|