📄 stm32f10x_gpio.txt
字号:
DCD 0x40010000
AREA ||i.GPIO_Init||, CODE, READONLY, ALIGN=2
GPIO_Init PROC
;;;123 *******************************************************************************/
;;;124 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
000000 b5f0 PUSH {r4-r7,lr}
;;;125 {
;;;126 u32 currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
;;;127 u32 tmpreg = 0x00, pinmask = 0x00;
;;;128
;;;129 /* Check the parameters */
;;;130 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;131 assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
;;;132 assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
;;;133
;;;134 /*---------------------------- GPIO Mode Configuration -----------------------*/
;;;135 currentmode = ((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x0F);
000002 78cb LDRB r3,[r1,#3]
000004 2200 MOVS r2,#0 ;126
;;;136
;;;137 if ((((u32)GPIO_InitStruct->GPIO_Mode) & ((u32)0x10)) != 0x00)
000006 06dc LSLS r4,r3,#27
000008 f003030f AND r3,r3,#0xf ;135
00000c d501 BPL |L6.18|
;;;138 {
;;;139 /* Check the parameters */
;;;140 assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
;;;141 /* Output mode */
;;;142 currentmode |= (u32)GPIO_InitStruct->GPIO_Speed;
00000e 788c LDRB r4,[r1,#2]
000010 4323 ORRS r3,r3,r4
|L6.18|
;;;143 }
;;;144
;;;145 /*---------------------------- GPIO CRL Configuration ------------------------*/
;;;146 /* Configure the eight low port pins */
;;;147 if (((u32)GPIO_InitStruct->GPIO_Pin & ((u32)0x00FF)) != 0x00)
000012 880c LDRH r4,[r1,#0]
;;;148 {
;;;149 tmpreg = GPIOx->CRL;
;;;150
;;;151 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
;;;152 {
;;;153 pos = ((u32)0x01) << pinpos;
;;;154 /* Get the port pins position */
;;;155 currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
;;;156
;;;157 if (currentpin == pos)
;;;158 {
;;;159 pos = pinpos << 2;
;;;160 /* Clear the corresponding low control register bits */
;;;161 pinmask = ((u32)0x0F) << pos;
000014 f04f0c0f MOV r12,#0xf
000018 f0140fff TST r4,#0xff ;147
00001c f04f0e01 MOV lr,#1 ;153
000020 d01a BEQ |L6.88|
000022 6806 LDR r6,[r0,#0] ;149
|L6.36|
000024 880d LDRH r5,[r1,#0] ;155
000026 fa0ef402 LSL r4,lr,r2 ;153
00002a 4025 ANDS r5,r5,r4 ;155
00002c 42a5 CMP r5,r4 ;157
00002e d10f BNE |L6.80|
000030 0095 LSLS r5,r2,#2 ;157
000032 fa0cf705 LSL r7,r12,r5
;;;162 tmpreg &= ~pinmask;
000036 ea260707 BIC r7,r6,r7
;;;163
;;;164 /* Write the mode configuration in the corresponding bits */
;;;165 tmpreg |= (currentmode << pos);
00003a fa03f605 LSL r6,r3,r5
;;;166
;;;167 /* Reset the corresponding ODR bit */
;;;168 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
00003e 78cd LDRB r5,[r1,#3]
000040 433e ORRS r6,r6,r7 ;165
000042 2d28 CMP r5,#0x28
000044 d100 BNE |L6.72|
;;;169 {
;;;170 GPIOx->BRR = (((u32)0x01) << pinpos);
000046 6144 STR r4,[r0,#0x14]
|L6.72|
;;;171 }
;;;172 /* Set the corresponding ODR bit */
;;;173 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
000048 78cd LDRB r5,[r1,#3]
00004a 2d48 CMP r5,#0x48
00004c d100 BNE |L6.80|
;;;174 {
;;;175 GPIOx->BSRR = (((u32)0x01) << pinpos);
00004e 6104 STR r4,[r0,#0x10]
|L6.80|
000050 1c52 ADDS r2,r2,#1 ;151
000052 2a08 CMP r2,#8 ;151
000054 d3e6 BCC |L6.36|
;;;176 }
;;;177 }
;;;178 }
;;;179 GPIOx->CRL = tmpreg;
000056 6006 STR r6,[r0,#0]
|L6.88|
;;;180 }
;;;181
;;;182 /*---------------------------- GPIO CRH Configuration ------------------------*/
;;;183 /* Configure the eight high port pins */
;;;184 if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
000058 880a LDRH r2,[r1,#0]
00005a 2aff CMP r2,#0xff
00005c d91e BLS |L6.156|
;;;185 {
;;;186 tmpreg = GPIOx->CRH;
00005e 6846 LDR r6,[r0,#4]
;;;187 for (pinpos = 0x00; pinpos < 0x08; pinpos++)
000060 f05f0200 MOVS.W r2,#0
|L6.100|
;;;188 {
;;;189 pos = (((u32)0x01) << (pinpos + 0x08));
000064 f1020508 ADD r5,r2,#8
000068 fa0ef405 LSL r4,lr,r5
;;;190 /* Get the port pins position */
;;;191 currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
00006c 880d LDRH r5,[r1,#0]
00006e 4025 ANDS r5,r5,r4
;;;192 if (currentpin == pos)
000070 42a5 CMP r5,r4
000072 d10f BNE |L6.148|
000074 0095 LSLS r5,r2,#2
;;;193 {
;;;194 pos = pinpos << 2;
;;;195 /* Clear the corresponding high control register bits */
;;;196 pinmask = ((u32)0x0F) << pos;
000076 fa0cf705 LSL r7,r12,r5
;;;197 tmpreg &= ~pinmask;
00007a ea260707 BIC r7,r6,r7
;;;198
;;;199 /* Write the mode configuration in the corresponding bits */
;;;200 tmpreg |= (currentmode << pos);
00007e fa03f605 LSL r6,r3,r5
;;;201
;;;202 /* Reset the corresponding ODR bit */
;;;203 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
000082 78cd LDRB r5,[r1,#3]
000084 433e ORRS r6,r6,r7 ;200
000086 2d28 CMP r5,#0x28
000088 d100 BNE |L6.140|
;;;204 {
;;;205 GPIOx->BRR = (((u32)0x01) << (pinpos + 0x08));
00008a 6144 STR r4,[r0,#0x14]
|L6.140|
;;;206 }
;;;207 /* Set the corresponding ODR bit */
;;;208 if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
00008c 78cd LDRB r5,[r1,#3]
00008e 2d48 CMP r5,#0x48
000090 d100 BNE |L6.148|
;;;209 {
;;;210 GPIOx->BSRR = (((u32)0x01) << (pinpos + 0x08));
000092 6104 STR r4,[r0,#0x10]
|L6.148|
000094 1c52 ADDS r2,r2,#1 ;187
000096 2a08 CMP r2,#8 ;187
000098 d3e4 BCC |L6.100|
;;;211 }
;;;212 }
;;;213 }
;;;214 GPIOx->CRH = tmpreg;
00009a 6046 STR r6,[r0,#4]
|L6.156|
;;;215 }
;;;216 }
00009c bdf0 POP {r4-r7,pc}
;;;217
ENDP
AREA ||i.GPIO_PinLockConfig||, CODE, READONLY, ALIGN=1
GPIO_PinLockConfig PROC
;;;414 *******************************************************************************/
;;;415 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, u16 GPIO_Pin)
000000 f4413280 ORR r2,r1,#0x10000
;;;416 {
;;;417 u32 tmp = 0x00010000;
;;;418
;;;419 /* Check the parameters */
;;;420 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
;;;421 assert_param(IS_GPIO_PIN(GPIO_Pin));
;;;422
;;;423 tmp |= GPIO_Pin;
;;;424 /* Set LCKK bit */
;;;425 GPIOx->LCKR = tmp;
000004 6182 STR r2,[r0,#0x18]
;;;426 /* Reset LCKK bit */
;;;427 GPIOx->LCKR = GPIO_Pin;
000006 6181 STR r1,[r0,#0x18]
;;;428 /* Set LCKK bit */
;;;429 GPIOx->LCKR = tmp;
000008 6182 STR r2,[r0,#0x18]
;;;430 /* Read LCKK bit*/
;;;431 tmp = GPIOx->LCKR;
00000a 6981 LDR r1,[r0,#0x18]
;;;432 /* Read LCKK bit*/
;;;433 tmp = GPIOx->LCKR;
00000c 6980 LDR r0,[r0,#0x18]
;;;434 }
00000e 4770 BX lr
;;;435
ENDP
AREA ||i.GPIO_PinRemapConfig||, CODE, READONLY, ALIGN=2
GPIO_PinRemapConfig PROC
;;;515 *******************************************************************************/
;;;516 void GPIO_PinRemapConfig(u32 GPIO_Remap, FunctionalState NewState)
000000 b5f0 PUSH {r4-r7,lr}
;;;517 {
;;;518 u32 tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
;;;519
;;;520 /* Check the parameters */
;;;521 assert_param(IS_GPIO_REMAP(GPIO_Remap));
;;;522 assert_param(IS_FUNCTIONAL_STATE(NewState));
;;;523
;;;524 tmpreg = AFIO->MAPR;
000002 4d10 LDR r5,|L8.68|
000004 686b LDR r3,[r5,#4]
;;;525
;;;526 tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
;;;527 tmp = GPIO_Remap & LSB_MASK;
;;;528
;;;529 if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
;;;530 {
;;;531 tmpreg &= DBGAFR_SWJCFG_MASK;
;;;532 AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
;;;533 }
;;;534 else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
;;;535 {
;;;536 tmp1 = ((u32)0x03) << tmpmask;
;;;537 tmpreg &= ~tmp1;
;;;538 tmpreg |= ~DBGAFR_SWJCFG_MASK;
;;;539 }
;;;540 else
;;;541 {
;;;542 tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
000006 0d44 LSRS r4,r0,#21
000008 0126 LSLS r6,r4,#4
00000a b284 UXTH r4,r0 ;527
00000c f3c05701 UBFX r7,r0,#20,#2 ;529
000010 40b4 LSLS r4,r4,r6
000012 f3c04203 UBFX r2,r0,#16,#4 ;526
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