复件 panel.h

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//----------------------------------------------------------------------------------------------------
// ID Code      : Panel.h No.0000
// Update Note  : 
//
//----------------------------------------------------------------------------------------------------

#ifdef __MAIN__

//--------------------------------------------------
// Panel Configuration :
// _DISP_DOUBLE_PORT | _DISP_EO_SWAP | _DISP_RB_SWAP | _DISP_ML_SWAP |
// _DISP_18_BIT | _RSDS_GC_SWAP | _RSDS_HL_SWAP | _RSDS_PN_SWAP,
//--------------------------------------------------
code PanelType Panel[] =
{
    {   // 0 CMO LVDS 17
        _PANEL_LVDS,                                        // Panel Style

        _DISP_DOUBLE_PORT | _DISP_24_BIT |                  // Panel Configuration
        _DISP_EO_SWAP,

        32,                                                 // Display Horizontal Start Position
        1280,                                               // Display Horizontal Width
        1312,                                               // Display Horizontal End Position

        1408,                                               // Display Horizontal Total Clock Number in One Display Line
        2044,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        1380,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

        12,                                                 // Display Vertical Start Position
        1024,                                               // Display Vertical Height
        1036,                                               // Display Vertical End Position

        1072,                                               // Display Vertical Total Line Number in One Frame
        1272,                                               // Maxinum Display Vertical Total Line Number in One Frame
        1034,                                               // Mininum Display Vertical Total Line Number in One Frame

        16,                                                 // Display H Sync Width
        3,                                                  // Display V Sync Height

        135,                                                // Typical Pixel Clock in MHz
        140,                                                // Maxinum Pixel Clock in MHz
        100,                                                // Mininum Pixel Clock in MHz
    },

    {   // 1  AU RSDS 17
        _PANEL_RSDS,                                        // Panel Style

        _DISP_DOUBLE_PORT | _DISP_18_BIT                    // Panel Configuration
        | _DISP_ML_SWAP | _RSDS_GC_SWAP | _RSDS_PN_SWAP,

        32,                                                 // Display Horizontal Start Position
        1280,                                               // Display Horizontal Width
        1312,                                               // Display Horizontal End Position

        1408,                                               // Display Horizontal Total Clock Number in One Display Line
        2044,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        1380,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

        12,                                                 // Display Vertical Start Position
        1024,                                               // Display Vertical Height
        1036,                                               // Display Vertical End Position

        1152,                                               // Display Vertical Total Line Number in One Frame
        1272,                                               // Maxinum Display Vertical Total Line Number in One Frame
        1040,                                               // Mininum Display Vertical Total Line Number in One Frame

        16,                                                 // Display H Sync Width
        3,                                                  // Display V Sync Height

        138,                                                // Typical Pixel Clock in MHz
        140,                                                // Maxinum Pixel Clock in MHz
        100,                                                // Mininum Pixel Clock in MHz
    },

    {   // 2 AU LVDS 15
        _PANEL_LVDS,                                        // Panel Style

        _DISP_DOUBLE_PORT | _DISP_24_BIT |                  // Panel Configuration
        _DISP_EO_SWAP,

        32,                                                 // Display Horizontal Start Position
        1024,                                               // Display Horizontal Width
        1056,                                               // Display Horizontal End Position

        1152,                                               // Display Horizontal Total Clock Number in One Display Line
        1308,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        1100,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

        12,                                                 // Display Vertical Start Position
        768,                                                // Display Vertical Height
        780,                                                // Display Vertical End Position

        864,                                                // Display Vertical Total Line Number in One Frame
        900,                                                // Maxinum Display Vertical Total Line Number in One Frame
        800,                                                // Mininum Display Vertical Total Line Number in One Frame

        16,                                                 // Display H Sync Width
        3,                                                  // Display V Sync Height

        94,                                                 // Typical Pixel Clock in MHz
        100,                                                // Maxinum Pixel Clock in MHz
        60,                                                 // Mininum Pixel Clock in MHz
    },

    {   // 3 HannStar HSD150MX15
        _PANEL_LVDS,                                        // Panel Style

        _DISP_SINGLE_PORT | _DISP_24_BIT,                   // Panel Configuration
		
        32,                                                 // Display Horizontal Start Position
        1024,                                               // Display Horizontal Width
        1056,                                               // Display Horizontal End Position

        1152,                                               // Display Horizontal Total Clock Number in One Display Line
        1308,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        1100,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

        12,                                                 // Display Vertical Start Position
        768,                                                // Display Vertical Height
        780,                                                // Display Vertical End Position

        806,                                                // Display Vertical Total Line Number in One Frame
        860,                                                // Maxinum Display Vertical Total Line Number in One Frame
        778,                                                // Mininum Display Vertical Total Line Number in One Frame

        16,                                                 // Display H Sync Width
        3,                                                  // Display V Sync Height

        65,                                                 // Typical Pixel Clock in MHz
        80,                                                 // Maxinum Pixel Clock in MHz
        60,                                                 // Mininum Pixel Clock in MHz
    },

    {   // 4 CPT CLAA150XG08
        _PANEL_RSDS,                                        // Panel Style

        _DISP_SINGLE_PORT | _DISP_18_BIT | _DISP_ML_SWAP |	// Panel Configuration
        _DISP_RB_SWAP | _RSDS_PN_SWAP,

        32,                                                 // Display Horizontal Start Position
        1024,                                               // Display Horizontal Width
        1056,                                               // Display Horizontal End Position

        1152,                                               // Display Horizontal Total Clock Number in One Display Line
        1308,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        1100,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

        12,                                                 // Display Vertical Start Position
        768,                                                // Display Vertical Height
        780,                                                // Display Vertical End Position

        806,                                                // Display Vertical Total Line Number in One Frame
        860,                                                // Maxinum Display Vertical Total Line Number in One Frame
        778,                                                // Mininum Display Vertical Total Line Number in One Frame

        16,                                                 // Display H Sync Width
        3,                                                  // Display V Sync Height

        65,                                                 // Typical Pixel Clock in MHz
        80,                                                 // Maxinum Pixel Clock in MHz
        60,                                                 // Mininum Pixel Clock in MHz
    },

    {   // 5 AU TTL M150XN05			//add by cooriee 050520 for ttl
        _PANEL_TTL,                                        // Panel Style

        _DISP_DOUBLE_PORT | _DISP_24_BIT | _DISP_ML_SWAP |	// Panel Configuration
        _DISP_RB_SWAP,

        32,                                                 // Display Horizontal Start Position
        1024,                                               // Display Horizontal Width
        1056,                                               // Display Horizontal End Position

        1152,                                               // Display Horizontal Total Clock Number in One Display Line
        1300,                                               // Maxinum Display Horizontal Total Clock Number in One Display Line
        1100,                                               // Mininum Display Horizontal Total Clock Number in One Display Line

        12,                                                 // Display Vertical Start Position
        768,                                                // Display Vertical Height
        780,                                                // Display Vertical End Position

        806,                                                // Display Vertical Total Line Number in One Frame
        860,                                                // Maxinum Display Vertical Total Line Number in One Frame
        778,                                                // Mininum Display Vertical Total Line Number in One Frame

        68,	//	16,                                                 // Display H Sync Width
        6,	//    3,                                                  // Display V Sync Height

        65,                                                 // Typical Pixel Clock in MHz