gt2510.c

MCP2510的CAN控制器程序

/***************************************************************************/
/*                     MCP2510 Driver(MSP430X147) C-File                   */
/***************************************************************************/

#include "gtcfg.h"
#include "gtconst.h"
#include "gt2510.h"
#include "msp430x14x_EXT.h"

const unsigned char cCANCnfCfg[]=
{
	MCPBAUD_10K_CNF1,
	MCPBAUD_10K_CNF2,
	MCPBAUD_10K_CNF3,

	MCPBAUD_20K_CNF1,
	MCPBAUD_20K_CNF2,
	MCPBAUD_20K_CNF3,

	MCPBAUD_50K_CNF1,
	MCPBAUD_50K_CNF2,
	MCPBAUD_50K_CNF3,

	MCPBAUD_100K_CNF1,
	MCPBAUD_100K_CNF2,
	MCPBAUD_100K_CNF3,

	MCPBAUD_200K_CNF1,
	MCPBAUD_200K_CNF2,
	MCPBAUD_200K_CNF3,

	MCPBAUD_250K_CNF1,
	MCPBAUD_250K_CNF2,
	MCPBAUD_250K_CNF3,

	MCPBAUD_500K_CNF1,
	MCPBAUD_500K_CNF2,
	MCPBAUD_500K_CNF3,

	MCPBAUD_800K_CNF1,
	MCPBAUD_800K_CNF2,
	MCPBAUD_800K_CNF3,

	MCPBAUD_1000K_CNF1,
	MCPBAUD_1000K_CNF2,
	MCPBAUD_1000K_CNF3,
};

//Soft Reset channel
void vResetMcp(void)
{
	CLR_MCPCS; // SPI CS active
	vSimSPIWrite(MCPCMD_RESET);
	SET_MCPCS; // SPI CS inactive
	SET_MCPCS; // SPI CS inacti	
}

//read mcp2510 register
unsigned char cReadMcpReg(unsigned char address)
{
	unsigned char ctmp;

	CLR_MCPCS; // SPI CS active
	vSimSPIWrite(MCPCMD_READ);//Send the read instruction
	vSimSPIWrite(address); //Send the register address
	ctmp = cSimSPIRead();
	SET_MCPCS; // SPI CS inacti	
	return ctmp;
}

//read mcp2510 status
unsigned char cReadMcpStatus(void)
{
	unsigned char ctmp;

	CLR_MCPCS; // SPI CS active
	vSimSPIWrite(MCPCMD_RDSTATUS);// Send the read instruction
	ctmp = cSimSPIRead();
	SET_MCPCS; // SPI CS inactive	

	return ctmp;
}

//write mcp2510 register
void vWriteMcpReg(unsigned char address, unsigned char spidata)
{
	CLR_MCPCS; // SPI CS active
	vSimSPIWrite(MCPCMD_WRITE);
	vSimSPIWrite(address); // Send the register address
	vSimSPIWrite(spidata); //Write the data to the register specified
	SET_MCPCS; // SPI CS inactive					
}

//Soft Require Tx
void vRTSMcp(unsigned char ctxbuf)
{ 
	CLR_MCPCS; // SPI CS active	
	vSimSPIWrite(MCPCMD_RTS + ctxbuf);
	SET_MCPCS; // SPI CS inactive	
}

void vInitMcp(unsigned char cbaudindex)
{
	unsigned int itmp;
	
	CFGOUT_SPISIMO;
	CLR_SPISIMO;
	
	CFGOUT_SPICLK;
	CLR_SPICLK;
	
	CFGOUT_MCPCS;	
	SET_MCPCS;

	CFGOUT_MCPRST;	
	for(itmp=0; itmp<1500; itmp++)
	SET_MCPRST;
	
	for(itmp=0; itmp<1500; itmp++)
	CLR_MCPRST;

	for(itmp=0; itmp<1500; itmp++)
	SET_MCPRST;		

	vWriteMcpReg(MCPREG_RXB0CTRL,RB0CBITS_RXALL);
	vWriteMcpReg(MCPREG_RXB1CTRL,RB0CBITS_RXALL);
	vWriteMcpReg(MCPREG_CANINTE,CANINTEBIT_RX0IE);
	
	vWriteMcpReg(MCPREG_RXF0SIDH,0);
	vWriteMcpReg(MCPREG_RXF0SIDL,0);
	vWriteMcpReg(MCPREG_RXF0EID8,0);
	vWriteMcpReg(MCPREG_RXF0EID0,0);
		
	vWriteMcpReg(MCPREG_RXM0SIDH,0XFF);
	vWriteMcpReg(MCPREG_RXM0SIDL,0XFF);	
	vWriteMcpReg(MCPREG_RXM0EID8,0XFF);
	vWriteMcpReg(MCPREG_RXM0EID0,0XFF);
		
	vWriteMcpReg(MCPREG_CANCTRL,OPMODE_CFG);
	
	cbaudindex *= 3;	
	vWriteMcpReg(MCPREG_CNF1,cCANCnfCfg[cbaudindex+0]);
	vWriteMcpReg(MCPREG_CNF2,cCANCnfCfg[cbaudindex+1]);
	vWriteMcpReg(MCPREG_CNF3,cCANCnfCfg[cbaudindex+2]);
	vWriteMcpReg(MCPREG_CANCTRL,OPMODE_NORMAL);
}

//simulate SPI write function
void vSimSPIWrite(unsigned char cbyte)
{
	unsigned char idx;

	for(idx=0; idx<8; idx++)
	{
		if(cbyte&0X80) SET_SPISIMO;
		else CLR_SPISIMO;
		SET_SPICLK;//write one bit
		CLR_SPICLK;//reset clk
		cbyte = cbyte<<1;
	}
}

//simulate SPI read function
unsigned char cSimSPIRead(void)
{
	unsigned char idx;
	unsigned char ctmp;
	
	ctmp = 0X00;
	for(idx=0; idx<8; idx++)
	{
		ctmp = ctmp<<1;
		SET_SPICLK;//read one bit
		if(bIsSPISOMI) ctmp++;
		CLR_SPICLK;//reset clk
	}
	return ctmp;
}

BOOL bMcp2510Tx(unsigned long lcanid, unsigned char *cbytes)
{
	unsigned char cstatus;
	union UNLONG lid;

	cstatus = cReadMcpReg(MCPREG_TXB0CTRL);
	if(!(cstatus&TBCBIT_ABTF))
	{
		lid.ul = lcanid * 8;
		vWriteMcpReg(MCPREG_TXB0SIDH,lid.ch[3]);
		vWriteMcpReg(MCPREG_TXB0SIDL,(lid.ch[2]&0XE0) + ((lid.ch[2]&0X18)/8) + TSIDLBITS_EXIDE);
		lid.ul = lcanid;
		vWriteMcpReg(MCPREG_TXB0EID8,lid.ch[1]);
		vWriteMcpReg(MCPREG_TXB0EID0,lid.ch[0]);
		vWriteMcpReg(MCPREG_TXB0DLC,TDLCBIT_LEN8);
		vWriteMcpReg(MCPREG_TXB0D0,cbytes[0]);
		vWriteMcpReg(MCPREG_TXB0D1,cbytes[1]);
		vWriteMcpReg(MCPREG_TXB0D2,cbytes[2]);
		vWriteMcpReg(MCPREG_TXB0D3,cbytes[3]);
		vWriteMcpReg(MCPREG_TXB0D4,cbytes[4]);
		vWriteMcpReg(MCPREG_TXB0D5,cbytes[5]);
		vWriteMcpReg(MCPREG_TXB0D6,cbytes[6]);
		vWriteMcpReg(MCPREG_TXB0D7,cbytes[7]);
		vWriteMcpReg(MCPREG_TXB0CTRL,TBCBIT_TXREQ | TBCBITS_TXPHIGH);
		return TRUE;
	}
	else
	{
		vInitMcp(CANBAUD_250K);
		return FALSE;
	}
}

BOOL bMcp2510Rx(unsigned long *lcanid, unsigned char *cbytes)
{	
	unsigned char ctmp;
	unsigned char cstatus;
	union UNLONG lid;
	cstatus = cReadMcpReg(MCPREG_EFLG);
	if(cstatus&EFLG_TXBO)
	{
		vInitMcp(CANBAUD_250K);
		return FALSE;
	}
	cstatus = cReadMcpReg(MCPREG_CANINTF);
	if(cstatus&INTFBIT_RX0IF)
	{
		lid.ul = 0;
		lid.ch[3] = cReadMcpReg(MCPREG_RXB0SIDH);
		ctmp      = cReadMcpReg(MCPREG_RXB0SIDL);
		lid.ch[2] = (ctmp&0XE0)+(ctmp&0X03)*8;
		lid.ul = lid.ul >> 3;
		lid.ch[1] = cReadMcpReg(MCPREG_RXB0EID8);
		lid.ch[0] = cReadMcpReg(MCPREG_RXB0EID0);
		*lcanid = lid.ul;
		cbytes[0] = cReadMcpReg(MCPREG_RXB0D0);
		cbytes[1] = cReadMcpReg(MCPREG_RXB0D1);
		cbytes[2] = cReadMcpReg(MCPREG_RXB0D2);
		cbytes[3] = cReadMcpReg(MCPREG_RXB0D3);
		cbytes[4] = cReadMcpReg(MCPREG_RXB0D4);
		cbytes[5] = cReadMcpReg(MCPREG_RXB0D5);
		cbytes[6] = cReadMcpReg(MCPREG_RXB0D6);
		cbytes[7] = cReadMcpReg(MCPREG_RXB0D7);
		vWriteMcpReg(MCPREG_CANINTF,cstatus&(~INTFBIT_RX0IF));
		return TRUE;
	}
	else return FALSE;
}