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📄 ctrlc1b.mdl

📁 关于电机的.m程序
💻 MDL
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"2 0 0])"
      MaskIconFrame	      on
      MaskIconOpaque	      off
      MaskIconRotate	      "none"
      MaskIconUnits	      "autoscale"
      Port {
	PortNumber		1
	Name			"iC"
	TestPoint		off
	LinearAnalysisOutput	off
	LinearAnalysisInput	off
	RTWStorageClass		"Auto"
	DataLogging		off
	DataLoggingNameMode	"SignalName"
	DataLoggingDecimateData	off
	DataLoggingDecimation	"2"
	DataLoggingLimitDataPoints off
	DataLoggingMaxPoints	"5000"
      }
      System {
	Name			"SWITCH"
	Location		[168, 216, 493, 372]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"portrait"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	ZoomFactor		"78"
	Block {
	  BlockType		  Inport
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	Block {
	  BlockType		  Inport
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	  Position		  [15, 22, 45, 38]
	  Port			  "2"
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	Block {
	  BlockType		  Clock
	  Name			  "Clock"
	  Position		  [65, 90, 85, 110]
	  Decimation		  "10"
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	Block {
	  BlockType		  Reference
	  Name			  "D Latch"
	  Ports			  [2, 2]
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	  SourceBlock		  "simulink_extras/Flip Flops/D Latch"
	  SourceType		  "DLatch"
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	Block {
	  BlockType		  RelationalOperator
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	  Operator		  "<="
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	  BlockType		  Terminator
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	  ShowName		  off
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	Block {
	  BlockType		  Switch
	  Name			  "open\nat  to"
	  Position		  [305, 40, 355, 130]
	  Threshold		  "0.5"
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	Block {
	  BlockType		  Outport
	  Name			  "iC"
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	Line {
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	  SrcPort		  1
	  Points		  [5, 0]
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	  SrcBlock		  "Relational\nOperator"
	  SrcPort		  1
	  Points		  [5, 0]
	  DstBlock		  "D Latch"
	  DstPort		  1
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	Line {
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	  SrcPort		  1
	  Points		  [10, 0; 0, -20]
	  DstBlock		  "Relational\nOperator"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "to"
	  SrcPort		  1
	  DstBlock		  "Relational\nOperator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "D Latch"
	  SrcPort		  2
	  DstBlock		  "Terminator"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Ground"
	  SrcPort		  1
	  DstBlock		  "open\nat  to"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "D Latch"
	  SrcPort		  1
	  DstBlock		  "open\nat  to"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "open\nat  to"
	  SrcPort		  1
	  DstBlock		  "iC"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "I"
	  SrcPort		  1
	  Points		  [5, 0]
	  Branch {
	    Points		    [210, 0; 0, 25]
	    DstBlock		    "open\nat  to"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 105]
	    DstBlock		    "Hit \nCrossing"
	    DstPort		    1
	  }
	}
      }
    }
    Block {
      BlockType		      Sin
      Name		      "Sine Wave"
      Position		      [75, 45, 105, 75]
      BackgroundColor	      "orange"
      SineType		      "Time based"
      Amplitude		      "120*sqrt(2)"
      Frequency		      "2*pi*60"
      SampleTime	      "0"
      Port {
	PortNumber		1
	Name			"vs"
	TestPoint		off
	LinearAnalysisOutput	off
	LinearAnalysisInput	off
	RTWStorageClass		"Auto"
	DataLogging		off
	DataLoggingNameMode	"SignalName"
	DataLoggingDecimateData	off
	DataLoggingDecimation	"2"
	DataLoggingLimitDataPoints off
	DataLoggingMaxPoints	"5000"
      }
    }
    Block {
      BlockType		      Sum
      Name		      "Sum1"
      Ports		      [3, 1]
      Position		      [145, 45, 175, 75]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "||+--"
      Port {
	PortNumber		1
	Name			"vL"
	TestPoint		off
	LinearAnalysisOutput	off
	LinearAnalysisInput	off
	RTWStorageClass		"Auto"
	DataLogging		off
	DataLoggingNameMode	"SignalName"
	DataLoggingDecimateData	off
	DataLoggingDecimation	"2"
	DataLoggingLimitDataPoints off
	DataLoggingMaxPoints	"5000"
      }
    }
    Block {
      BlockType		      Scope
      Name		      "capacitor\ncurrent"
      Ports		      [1]
      Position		      [50, 244, 80, 276]
      Orientation	      "left"
      ForegroundColor	      "green"
      Location		      [612, 109, 1128, 409]
      Open		      on
      NumInputPorts	      "1"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
      }
      List {
	ListType		SelectedSignals
	axes1			""
      }
      TimeRange		      "0.1"
      YMin		      "-8"
      YMax		      "8"
      DataFormat	      "StructureWithTime"
    }
    Block {
      BlockType		      Scope
      Name		      "capacitor\nvoltage"
      Ports		      [1]
      Position		      [50, 184, 80, 216]
      Orientation	      "left"
      ForegroundColor	      "green"
      Location		      [606, 469, 1128, 791]
      Open		      on
      NumInputPorts	      "1"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
      }
      List {
	ListType		SelectedSignals
	axes1			""
      }
      TimeRange		      "0.1"
      YMin		      "-300"
      YMax		      "300"
      DataFormat	      "StructureWithTime"
    }
    Block {
      BlockType		      SubSystem
      Name		      "info"
      Ports		      []
      Position		      [467, 105, 534, 165]
      ForegroundColor	      "darkGreen"
      DropShadow	      on
      ShowName		      off
      TreatAsAtomicUnit	      off
      MaskDisplay	      "plot(-1.5,-1.5,1.5,1.5,cos(0:.01:7),sin(0:.01:7"
") )\ndisp('Info')"
      MaskIconFrame	      on
      MaskIconOpaque	      on
      MaskIconRotate	      "none"
      MaskIconUnits	      "autoscale"
      System {
	Name			"info"
	Location		[503, 522, 977, 701]
	Open			off
	ModelBrowserVisibility	off
	ModelBrowserWidth	200
	ScreenColor		"white"
	PaperOrientation	"landscape"
	PaperPositionMode	"auto"
	PaperType		"usletter"
	PaperUnits		"inches"
	ZoomFactor		"101"
	Annotation {
	  Name			  "RLC switched circuit"
	  Position		  [218, 17]
	  FontSize		  12
	  FontWeight		  "bold"
	}
	Annotation {
	  Name			  " A series RL circuit operates under sinusoi"
"dal voltage excitation for a specified\nlength of time \"to\" when, at the fi"
"rst subsequent current zero, a circuit breaker \nsuddenly opens inserting a c"
"apacitance C in series with the RL circuit. \nThe circuit breaker is simulate"
"d by means of a switch block activated by a\nD latch flipflop block which det"
"ermines a zero-hit crossing immediately following\nthe commanded time \"to\"."
"\nThe source current i as well as the capacitor current iC and voltage vC are"
" \nexhibited as functions of time.\n"
	  Position		  [15, 35]
	  HorizontalAlignment	  "left"
	  VerticalAlignment	  "top"
	  FontSize		  12
	}
      }
    }
    Block {
      BlockType		      Scope
      Name		      "source\ncurrent"
      Ports		      [1]
      Position		      [425, 44, 455, 76]
      ForegroundColor	      "green"
      Location		      [71, 106, 603, 406]
      Open		      on
      NumInputPorts	      "1"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
      }
      List {
	ListType		SelectedSignals
	axes1			""
      }
      TimeRange		      "0.1"
      YMin		      "-150"
      YMax		      "150"
      DataFormat	      "StructureWithTime"
    }
    Block {
      BlockType		      Constant
      Name		      "to"
      Position		      [335, 170, 365, 200]
      Orientation	      "left"
      BackgroundColor	      "orange"
      NamePlacement	      "alternate"
      Value		      "0.05"
    }
    Block {
      BlockType		      Scope
      Name		      "vin"
      Ports		      [1]
      Position		      [30, 19, 60, 51]
      Orientation	      "left"
      ForegroundColor	      "green"
      Location		      [212, 410, 499, 708]
      Open		      off
      NumInputPorts	      "1"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
      }
      TimeRange		      "0.1"
      YMin		      "-200"
      YMax		      "200"
      DataFormat	      "StructureWithTime"
    }
    Line {
      Name		      "vs"
      Labels		      [0, 0]
      SrcBlock		      "Sine Wave"
      SrcPort		      1
      Points		      [10, 0]
      Branch {
	DstBlock		"Sum1"
	DstPort			1
      }
      Branch {
	Points			[0, -25]
	DstBlock		"vin"
	DstPort			1
      }
    }
    Line {
      Name		      "vR"
      Labels		      [1, 1]
      SrcBlock		      "R"
      SrcPort		      1
      Points		      [-70, 0]
      DstBlock		      "Sum1"
      DstPort		      3
    }
    Line {
      Name		      "vC"
      Labels		      [0, 0]
      SrcBlock		      "1/C"
      SrcPort		      1
      Points		      [-20, 0]
      Branch {
	Points			[0, -119]
	DstBlock		"Sum1"
	DstPort			2
      }
      Branch {
	DstBlock		"capacitor\nvoltage"
	DstPort			1
      }
    }
    Line {
      Name		      "iC"
      SrcBlock		      "SWITCH"
      SrcPort		      1
      Points		      [-5, 0]
      Branch {
	DstBlock		"Integrator1"
	DstPort			1
      }
      Branch {
	Labels			[2, 0]
	Points			[0, 60]
	DstBlock		"capacitor\ncurrent"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Integrator1"
      SrcPort		      1
      DstBlock		      "1/C"
      DstPort		      1
    }
    Line {
      SrcBlock		      "to"
      SrcPort		      1
      DstBlock		      "SWITCH"
      DstPort		      1
    }
    Line {
      Name		      "vL"
      Labels		      [0, 0]
      SrcBlock		      "Sum1"
      SrcPort		      1
      DstBlock		      "1/L\n"
      DstPort		      1
    }
    Line {
      SrcBlock		      "1/L\n"
      SrcPort		      1
      DstBlock		      "Integrator"
      DstPort		      1
    }
    Line {
      Name		      "i"
      SrcBlock		      "Integrator"
      SrcPort		      1
      Points		      [60, 0]
      Branch {
	Labels			[1, 0]
	DstBlock		"source\ncurrent"
	DstPort			1
      }
      Branch {
	Points			[0, 70]
	Branch {
	  Points		  [0, 85]
	  DstBlock		  "SWITCH"
	  DstPort		  2
	}
	Branch {
	  DstBlock		  "R"
	  DstPort		  1
	}
      }
    }
    Annotation {
      Name		      "switch opens after \"to\"\nat first zero crossi"
"ng of current"
      Position		      [352, 261]
      FontSize		      12
      FontAngle		      "italic"
    }
    Annotation {
      Name		      "RLC  switched circuit"
      Position		      [245, 16]
      ForegroundColor	      "red"
      FontSize		      14
      FontWeight	      "bold"
    }
  }
}

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