x9c503a.lst
来自「dsp tmslf2407a 汇编,c的原代码,包括i2c,scitimer,f」· LST 代码 · 共 1,294 行 · 第 1/5 页
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1,294 行
237 000e 7804 ADRK 4-LF1
238 000f L1:
239 .line 6
240 ;>>>> i=i;
241 000f 1080 LAC *
242 0010 9080 SACL *
243 .line 4
244 0011 1080 LAC *
245 0012 b801 ADDK 1
246 0013 9080 SACL *
247 0014 6980 ZALS *
248 0015 7c04 SBRK 4-LF1
249 0016 6680 SUBS *
250 0017 7804 ADRK 4-LF1
251 0018 e344 BLZ L1
0019 000f'
252 001a L2:
253 001a EPI0_1:
254 .line 8
255 001a 8b89 MAR * ,AR1
256 001b 7c03 SBRK 3
257 001c 0090 LAR AR0,*-
258 001d 7680 PSHD *
259 001e ef00 RET
260
261 .endfunc 29,000000000H,2
262
263 .sym _setX9c503ToLowest,_setX9c503ToLowest,32,2,0
264 .globl _setX9c503ToLowest
265
266 .func 34
267 ;>>>> void setX9c503ToLowest()
268 ;>>>> uint i;
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Thu Dec 8 11:06:32 2005
Copyright (c) 1987-1999 Texas Instruments Incorporated
x9c503a.asm PAGE 6
269 ******************************************************
270 * FUNCTION DEF : _setX9c503ToLowest
271 ******************************************************
272 001f _setX9c503ToLowest:
273 001f 8aa0 POPD *+
274 0020 80a0 SAR AR0,*+
275 0021 8180 SAR AR1,*
276 0022 b003 LARK AR0,3
277 0023 00ea LAR AR0,*0+,AR2
278
279 .sym _i,1,14,1,16
280 .sym _n,2,14,1,16
281 .line 4
282 ;>>>> uint n = 200;
283 0024 b9c8 LACK 200
284 0025 b202 LARK AR2,2
285 0026 8be0 MAR *0+
286 0027 9090 SACL *-
287 .line 6
288 ;>>>> dpm_cs_0; // cs=0,open x9c503
289 0028 bf80 LACK 65279
0029 feff
290 002a bc00! LDPK _MCRC
291 002b 6e00! AND _MCRC
292 002c 9000! SACL _MCRC
293 002d bf80 LACK 256
002e 0100
294 002f bc00! LDPK _PFDATDIR
295 0030 6d00! OR _PFDATDIR
296 0031 9000! SACL _PFDATDIR
297 0032 bf80 LACK 65534
0033 fffe
298 0034 6e00! AND _PFDATDIR
299 0035 9000! SACL _PFDATDIR
300 .line 7
301 ;>>>> for(i=0;i<n;i++)
302 0036 b900 LACK 0
303 0037 9080 SACL *
304 0038 69a0 ZALS *+
305 0039 6680 SUBS *
306 003a e38c BGEZ L4
003b 0084'
307 003c 8b89 MAR * ,AR1
308 003d L3:
309 .line 9
310 ;>>>> dpm_Vw_0;
311 003d bf80 LACK 65527
003e fff7
312 003f bc00! LDPK _MCRA
313 0040 6e00! AND _MCRA
314 0041 9000! SACL _MCRA
315 0042 bf80 LACK 2048
0043 0800
316 0044 bc00! LDPK _PADATDIR
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Thu Dec 8 11:06:32 2005
Copyright (c) 1987-1999 Texas Instruments Incorporated
x9c503a.asm PAGE 7
317 0045 6d00! OR _PADATDIR
318 0046 9000! SACL _PADATDIR
319 0047 bf80 LACK 65527
0048 fff7
320 0049 6e00! AND _PADATDIR
321 004a 9000! SACL _PADATDIR
322 .line 10
323 ;>>>> dpm_inc_1; // inc = 1
324 004b bf80 LACK 65534
004c fffe
325 004d bc00! LDPK _MCRC
326 004e 6e00! AND _MCRC
327 004f 9000! SACL _MCRC
328 0050 bf80 LACK 257
0051 0101
329 0052 bc00! LDPK _PEDATDIR
330 0053 6d00! OR _PEDATDIR
331 0054 9000! SACL _PEDATDIR
332 .line 11
333 ;>>>> dpm_ud_0;
334 0055 bf80 LACK 65407
0056 ff7f
335 0057 bc00! LDPK _MCRC
336 0058 6e00! AND _MCRC
337 0059 9000! SACL _MCRC
338 005a bf8f LALK 1,15
005b 0001
339 005c bc00! LDPK _PEDATDIR
340 005d 6d00! OR _PEDATDIR
341 005e 9000! SACL _PEDATDIR
342 005f bf80 LACK 65407
0060 ff7f
343 0061 6e00! AND _PEDATDIR
344 0062 9000! SACL _PEDATDIR
345 .line 12
346 ;>>>> delayX9c503(10);
347 0063 b90a LACK 10
348 0064 90a0 SACL *+
349 0065 7a80 CALL _delayX9c503
0066 0000'
350 0067 8b90 MAR *-
351 .line 13
352 ;>>>> dpm_inc_0; // inc = 0
353 0068 bf80 LACK 65534
0069 fffe
354 006a bc00! LDPK _MCRC
355 006b 6e00! AND _MCRC
356 006c 9000! SACL _MCRC
357 006d bf80 LACK 257
006e 0101
358 006f bc00! LDPK _PEDATDIR
359 0070 6d00! OR _PEDATDIR
360 0071 9000! SACL _PEDATDIR
361 0072 bf80 LACK 65534
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Thu Dec 8 11:06:32 2005
Copyright (c) 1987-1999 Texas Instruments Incorporated
x9c503a.asm PAGE 8
0073 fffe
362 0074 6e00! AND _PEDATDIR
363 0075 9000! SACL _PEDATDIR
364 .line 14
365 ;>>>> delayX9c503(50);
366 0076 b932 LACK 50
367 0077 90a0 SACL *+
368 0078 7a80 CALL _delayX9c503
0079 0000'
369 007a 8b9a MAR *-,AR2
370 .line 7
371 007b b201 LARK AR2,1
372 007c 8be0 MAR *0+
373 007d 1080 LAC *
374 007e b801 ADDK 1
375 007f 9080 SACL *
376 0080 69a0 ZALS *+
377 0081 6689 SUBS * ,AR1
378 0082 e344 BLZ L3
0083 003d'
379 0084 L4:
380 .line 16
381 ;>>>> dpm_cs_1; //cs=1,close x9c503
382 0084 bf80 LACK 65279
0085 feff
383 0086 bc00! LDPK _MCRC
384 0087 6e00! AND _MCRC
385 0088 9000! SACL _MCRC
386 0089 bf80 LACK 257
008a 0101
387 008b bc00! LDPK _PFDATDIR
388 008c 6d00! OR _PFDATDIR
389 008d 9000! SACL _PFDATDIR
390 008e EPI0_2:
391 .line 17
392 008e 8b89 MAR * ,AR1
393 008f 7c04 SBRK 4
394 0090 0090 LAR AR0,*-
395 0091 7680 PSHD *
396 0092 ef00 RET
397
398 .endfunc 50,000000000H,3
399
400 .sym _adjustX9c503,_adjustX9c503,32,2,0
401 .globl _adjustX9c503
402
403 .func 56
404 ;>>>> void adjustX9c503(uchar dir,uint n)
405 ******************************************************
406 * FUNCTION DEF : _adjustX9c503
407 ******************************************************
408 0093 _adjustX9c503:
409
410 0000 LF3 .set 0
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Thu Dec 8 11:06:32 2005
Copyright (c) 1987-1999 Texas Instruments Incorporated
x9c503a.asm PAGE 9
411
412 0093 8aa0 POPD *+
413 0094 80a0 SAR AR0,*+
414 0095 8180 SAR AR1,*
415 0096 b002 LARK AR0,2
416 0097 00ea LAR AR0,*0+,AR2
417
418 .sym _dir,-3+LF3,12,9,16
419 .sym _n,-4+LF3,14,9,16
420 .sym _i,1,14,1,16
421 .line 2
422 ;>>>> uint i;
423 .line 5
424 ;>>>> dpm_cs_0;
425 0098 bf80 LACK 65279
0099 feff
426 009a bc00! LDPK _MCRC
427 009b 6e00! AND _MCRC
428 009c 9000! SACL _MCRC
429 009d bf80 LACK 256
009e 0100
430 009f bc00! LDPK _PFDATDIR
431 00a0 6d00! OR _PFDATDIR
432 00a1 9000! SACL _PFDATDIR
433 00a2 bf80 LACK 65534
00a3 fffe
434 00a4 6e00! AND _PFDATDIR
435 00a5 9000! SACL _PFDATDIR
436 .line 6
437 ;>>>> if(dir)
438 00a6 bf0a LARK AR2,-3+LF3
00a7 fffd
439 00a8 8be0 MAR *0+
440 00a9 1080 LAC *
441 00aa e388 BZ L5
00ab 00ed'
442 .line 8
443 ;>>>> dpm_ud_1; //u/d=0,increase
444 00ac bf80 LACK 65407
00ad ff7f
445 00ae bc00! LDPK _MCRC
446 00af 6e00! AND _MCRC
447 00b0 9000! SACL _MCRC
448 00b1 bf80 LACK 32896
00b2 8080
449 00b3 bc00! LDPK _PEDATDIR
450 00b4 6d00! OR _PEDATDIR
451 00b5 9000! SACL _PEDATDIR
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