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📄 c2xx_bcx.lst

📁 本测试程序是针对TMS320LF2407 EVM的性能测试而设计开发的。程序运行时将按顺序对数据RAM空间、程序代码空间、片上异步串行通讯、ADC-DAC联合检测、双向数字I/O口、通用I/O和评估板
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     185 0011 e388                  bcnd  err2,eq
         0012 0017+ 
     186            
     187 0013 ae07+                 splk    #0,PRG_status   ;update algorithm status
         0014 0000  
     188 0015 7980                  b       PRG_stop        ;Branch to stop
         0016 006f+ 
     189                            
     190 0017 ae07+ err2:           splk    #1,PRG_status   ;Error in Program stage
         0018 0001  
     191 0019 7980                  b       PRG_stop
         001a 006f+ 
     192            ; 
     193            ;**************************************************************************
     194            ; Name: PRG_erase
     195            ; 
     196            ; Description
     197            ;   Erase a programmed device. This module will be executed if the PRG2xxw
     198            ;   command line option specified is -e.
     199            ; Inputs
     200            ;   None:
     201            ;
     202            ; Outputs
     203            ;   int PRG_status      Pass =0; Fail = 1;
     204            ;
     205            ; Notes:
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Sat May  5 23:58:43 2001
Copyright (c) 1987-1999  Texas Instruments Incorporated 
F10 'LF240x FLASH MEMORY PRECONDITION ROUTINE                        PAGE    5

     206            ;   The erase is device specific. 
     207            ;**************************************************************************
     208             
     209 001b       PRG_erase:    
     210            
     211 001b bce0          LDP     #0E0h                   ;SET DATA PAGE POINTER
     212 001c ae18          SPLK    #PLL_RATIO_CONST,7018h            ;SET UP CLOCKS
         001d 0200  
     213 001e ae19          SPLK    #000bh,7019h            ;SET UP SCSR2. BRL=0,MC/=0,PON=1,DON=1
         001f 000b  
     214 0020 ae29          SPLK    #6fh,7029h              ;SHUT OFF WATCHDOG.
         0021 006f  
     215            
     216 0022       SECTOR_0:
     217 0022 bc00+         LDP     #PRG_options            ;GET THE SECTOR MASK
     218 0023 1003+         LACC    PRG_options             ;
     219 0024 bfb0          AND     #000Fh                  ;MASK OUT UNWANTED BITS.
         0025 000f  
     220 0026 be0a          SFR                             ;GET BIT0
     221 0027 9003+         SACL    PRG_options             ;STORE OTHER BITS BACK.
     222 0028 e301          BCND    SECTOR_1,NC             ;IF BIT0 IS SET, THEN CLEAR SECTOR0.
         0029 0033+ 
     223            
     224 002a bc00          LDP     #0                      ;SET DP
     225 002b ae68          SPLK    #0000h,FL_SECST         ;FIRST ADDRESS OF FLASH SEGMENT
         002c 0000  
     226 002d ae69          SPLK    #0FFFh,FL_SECEND        ;LAST ADDRESS IN FLASH SEGMENT
         002e 0fff  
     227 002f ae70          SPLK    #0001h,SECTOR           ;SECTOR KEY
         0030 0001  
     228 0031 7a80          CALL    CLEAR                   ;CLEAR SECTOR 0
         0032 0000+ 
     229            
     230 0033       SECTOR_1:
     231 0033 bc00+         LDP     #PRG_options            ;GET THE SECTOR MASK
     232 0034 1003+         LACC    PRG_options             ;
     233 0035 be0a          SFR                             ;GET BIT0
     234 0036 9003+         SACL    PRG_options             ;STORE OTHER BITS BACK.
     235 0037 e301          BCND    SECTOR_2,NC             ;IF BIT0 IS SET, THEN CLEAR SECTOR0.
         0038 0042+ 
     236            
     237 0039 bc00          LDP     #0                      ;SET DP
     238 003a ae68          SPLK    #1000h,FL_SECST         ;FIRST ADDRESS OF FLASH SEGMENT
         003b 1000  
     239 003c ae69          SPLK    #3FFFh,FL_SECEND        ;LAST ADDRESS IN FLASH SEGMENT
         003d 3fff  
     240 003e ae70          SPLK    #0002h,SECTOR           ;SECTOR KEY
         003f 0002  
     241 0040 7a80          CALL    CLEAR                   ;CLEAR SECTOR 1
         0041 0000+ 
     242            
     243 0042       SECTOR_2:
     244 0042 bc00+         LDP     #PRG_options            ;GET THE SECTOR MASK
     245 0043 1003+         LACC    PRG_options             ;
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Sat May  5 23:58:43 2001
Copyright (c) 1987-1999  Texas Instruments Incorporated 
F10 'LF240x FLASH MEMORY PRECONDITION ROUTINE                        PAGE    6

     246 0044 be0a          SFR                             ;GET BIT0
     247 0045 9003+         SACL    PRG_options             ;STORE OTHER BITS BACK.
     248 0046 e301          BCND    SECTOR_3,NC             ;IF BIT0 IS SET, THEN CLEAR SECTOR0.
         0047 0051+ 
     249            
     250 0048 bc00          LDP     #0                      ;SET DP
     251 0049 ae68          SPLK    #4000h,FL_SECST         ;FIRST ADDRESS OF FLASH SEGMENT
         004a 4000  
     252 004b ae69          SPLK    #6FFFh,FL_SECEND        ;LAST ADDRESS IN FLASH SEGMENT
         004c 6fff  
     253 004d ae70          SPLK    #0004h,SECTOR           ;SECTOR KEY
         004e 0004  
     254 004f 7a80          CALL    CLEAR                   ;CLEAR SECTOR 2
         0050 0000+ 
     255            
     256 0051       SECTOR_3:
     257 0051 bc00+         LDP     #PRG_options            ;GET THE SECTOR MASK
     258 0052 1003+         LACC    PRG_options             ;
     259 0053 be0a          SFR                             ;GET BIT0
     260 0054 9003+         SACL    PRG_options             ;STORE OTHER BITS BACK.
     261 0055 e301          BCND    NO_SECTORS,NC            ;IF BIT0 IS SET, THEN CLEAR SECTOR0.
         0056 0060+ 
     262            
     263 0057 bc00          LDP     #0                      ;SET DP
     264 0058 ae68          SPLK    #7000h,FL_SECST         ;FIRST ADDRESS OF FLASH SEGMENT
         0059 7000  
     265 005a ae69          SPLK    #7FFFh,FL_SECEND        ;LAST ADDRESS IN FLASH SEGMENT
         005b 7fff  
     266 005c ae70          SPLK    #0008h,SECTOR           ;SECTOR KEY
         005d 0008  
     267 005e 7a80          CALL    CLEAR                   ;CLEAR SECTOR 3
         005f 0000+ 
     268            
     269 0060       NO_SECTORS:
     270 0060 bc00+         ldp     #PARMS
     271 0061 ae07+         splk    #0,PRG_status           ; Error in CLEAR or Erase
         0062 0000  
     272 0063 7980          b       PRG_stop
         0064 006f+ 
     273            
     274            
     275 0065 bc00+ err1:           ldp     #PARMS
     276 0066 ae07+                 splk    #1,PRG_status; Error in CLEAR or Erase
         0067 0001  
     277 0068 7980                  b       PRG_stop
         0069 006f+ 
     278            
     279            
     280            
     281            
     282            ; 
     283            ; F**************************************************************************
     284            ; Name: PRG_verify
     285            ; 
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Sat May  5 23:58:43 2001
Copyright (c) 1987-1999  Texas Instruments Incorporated 
F10 'LF240x FLASH MEMORY PRECONDITION ROUTINE                        PAGE    7

     286            ; Description
     287            ;   Verify a block of programmed data. This module will be excuted if the
     288            ;   command line option in PRG2xxw is -v.
     289            ; s
     290            ; Inputs                        Defined by host
     291            ;   unsigned *PRG_paddr         Pointer to first address to verify
     292            ;   unsigned  PRG_page          Page to verify, Program == 0, Data == 1
     293            ;   unsigned  PRG_length        Number of words to verify
     294            ;   unsigned *PRG_bufaddr       Pointer to verify data buffer
     295            ;
     296            ; Outputs
     297            ;   int PRG_status      Pass =0; Fail = 1;
     298            ;
     299            ; Notes:
     300            ;   The PRG_page value is setup by the host but not used in this case.
     301            ;   The assumption is that the programmable device is in program space.
     302            ; F**************************************************************************
     303             
     304 006a       PRG_verify:
     305 006a bc00+                 ldp     #PARMS
     306 006b ae07+ error:          splk    #1,PRG_status   ;
         006c 0001  
     307 006d 7980                  b       PRG_stop        ;Generate a breakpoint
         006e 006f+ 
     308            
     309            ; 
     310            ; F**************************************************************************
     311            ; Name: PRG_stop
     312            ; 
     313            ; Description
     314            ;       Exit routine for all programming functions.
     315            ; 
     316            ; Inputs
     317            ;       None
     318            ;
     319            ;
     320            ; Outputs
     321            ;       None
     322            ;
     323            ; Notes:
     324            ;       Exit point for all programming functions
     325            ;       The ESTOP opcode gets executed as a NOP when not in emulation
     326            ;       mode.  The "b $" will keep the program from running off if
     327            ;       not in emulation mode.
     328            ;
     329            ; F**************************************************************************
     330 006f       PRG_stop:
     331            
     332 006f 8b00          nop
     333 0070 be90          .word   0BE90h                  ;SWI instruction
     334 0071 8b00          nop
     335 0072 7980          b $
         0073 0072+ 
     336                            .end
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00  Sat May  5 23:58:43 2001
Copyright (c) 1987-1999  Texas Instruments Incorporated 
F10 'LF240x FLASH MEMORY PRECONDITION ROUTINE                        PAGE    8


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