📄 c2xx_bpx.lst
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C 189 0040 7980 B PGVERON ;verify word programmed
0041 0014+
C 190 ********************************************************************************
C 191 ** SUBROUTINE: PROG **
C 192 ** - CALLED BY LOBYTE OR HIBYTE **
C 193 ** - APPLIES PROGRAM PULSE TO (REQUIRED) BITS **
C 194 ** - "DATA" CONTAINS BITS TO BE PROG **
C 195 ** - WILL PROGRAM BITS IN MAIN ARRAY OR REDUNDANT ROWS **
C 196 ** DEPENTING ON THE STATUS OF "FL_CMD" **
C 197 ** - FL_CMD = 0080h (NOROWRED) **
C 198 ** - FL_CMD = 0100h THEN PROGRAMS ROWREDs **
C 199 ********************************************************************************
C 200 0042 bf80 PROG LACC #WDATA ;Load data to be prog
0043 0003
C 201 0044 a764 TBLW DATA
C 202 *
C 203 0045 106a LACC FL_CMD
C 204 0046 bfd0 XOR #0003h ;PROG CMND
0047 0003
C 205 0048 9061 SACL PAD
C 206 *
C 207 0049 bf80 LACC #CTRL ;Init prog mode
004a 0001
C 208 004b a761 TBLW PAD
C 209 004c SDELAY #T_psu_p ;Wait T_psu(P)
1C 004c bb0a RPT #T_psu_p
1C 004d 8b00 NOP
C 210 *
C 211 004e bf80 LACC #PMPC ;Turn on prog voltages
004f 0000
C 212 0050 ae61 SPLK #0005h,PAD
0051 0005
C 213 0052 a761 TBLW PAD
C 214 *
C 215 0053 PPW SDELAY #T_prog_e1 ;PROG PULSE WIDTH PART 1
1C 0053 bb1c RPT #T_prog_e1
1C 0054 8b00 NOP
C 216 0055 SDELAY #T_prog_e2 ;PROG PULSE WIDTH PART 2
1C 0055 bb1c RPT #T_prog_e2
1C 0056 8b00 NOP
C 217
C 218 ;T_prog(E)=10,000 nsec
C 219
C 220
C 221 0057 ae61 SPLK #0000h,PAD ;TURN OFF PROG VOLTAGES
0058 0000
C 222 0059 a761 TBLW PAD
C 223 *
C 224 005a SDELAY #Tph_P ;Wait T_ph(P) (HOLD TIME).
1C 005a bb12 RPT #Tph_P
1C 005b 8b00 NOP
C 225 *
C 226 005c ae65 SPLK #0001h,PAD1 ;CLEAR PMPC AND CNTL
005d 0001
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sun May 6 00:03:29 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
c2xx_bpx.asm PAGE 6
C 227 005e 7a80 CALL CLRCMD
005f 0090+
C 228 0060 ef00 RET
C 229 ********************************************************************************
C 230 ** SUBROUTINE: NEXTWORD **
C 231 ** -CHECKS IF ADDR IS AT LAST ADDR IN SECTOR **
C 232 ** -INCREMENTS ADDRESS **
C 233 ** -REINITIALIZES PROGRAM PULSE COUNT, FOR **
C 234 ** PROGRAMMING OF NEXT WORD **
C 235 ********************************************************************************
C 236 0061 NEXTWORD
C 237 0061 1069 LACC FL_SECEND
C 238 0062 ba01 SUB #1
C 239 0063 9069 SACL FL_SECEND
C 240 ; LACC ADDR ;ACC=>ADDR OF CURRENT WORD
C 241 ; SUB FL_SECEND ;IF CURRENT WORD END OF DATA, DONE
C 242 ; SUB FL_SECST ;START OF FLASH
C 243 0064 e308 BCND NW,NEQ ; WITH THIS DATA BLOCK
0065 0068+
C 244 0066 7980 B END1 ;ELSE NEXT WORD
0067 0081+
C 245
C 246 0068 1060 NW LACC ADDR
C 247 0069 b801 ADD #1 ;INCREMENT ADDR
C 248 006a 9060 SACL ADDR ;STORE ADDR OF NEXT WORD
C 249
C 250 006b ae66 SPLK #MX_PCNT,PLS_CNT ;Initialize PROGRAM PULSE COUNT
006c 00fa
C 251
C 252 006d 107a LACC DATA0
C 253 006e b801 ADD #1
C 254 006f 907a SACL DATA0
C 255 0070 a97a BLDD DATA0,#0064h ;LOAD NEXT DATA VALUE TO BE PROG
0071 0064
C 256 0072 7980 B PGVERON ;begin prog of next word
0073 0014+
C 257 0074 ERROR
C 258 0074 ae65 SPLK #0005h,PAD1
0075 0005
C 259 0076 7a80 CALL CLRCMD
0077 0090+
C 260 0078 7980 ERROR1 B err1 ;failed due to exceeding max prgm pulses
0079 002b+
C 261 *
C 262 ********************************************************************************
C 263 ** SUBROUTINE: READWORD **
C 264 ** - READS WORD AT LOCATION "ADDR" **
C 265 ** - STORES WORD AT "READ" **
C 266 ** - RETURNS TO CALLING ROUTINE IN REGISTER MODE **
C 267 ** **
C 268 ********************************************************************************
C 269 007a READWORD
C 270
C 271 007a ACCESS_ARRAY
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sun May 6 00:03:29 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
c2xx_bpx.asm PAGE 7
1C 007a af7f IN 07fh,0ff0fh
007b ff0f
C 272
C 273 007c 1060 LACC ADDR ;Read word flash
C 274 007d a662 TBLR READ ;-store word in READ (data space)
C 275
C 276 007e ACCESS_REGS
1C 007e 0c7f OUT 07fh,0ff0fh
007f ff0f
C 277 0080 ef00 RET
C 278 0081 END1
C 279 0081 1060 LACC ADDR
C 280 0082 b801 ADD #1 ;INCREMENT ADDR
C 281 0083 9060 SACL ADDR ;STORE ADDR OF NEXT WORD
C 282 0084 ae65 SPLK #0006h,PAD1 ;CLEAR ALL SIX
0085 0006
C 283 0086 7a80 CALL CLRCMD
0087 0090+
C 284
C 285 0088 ACCESS_ARRAY
1C 0088 af7f IN 07fh,0ff0fh
0089 ff0f
C 286
C 287 008a ef00 RET
C 288
C 289
C 290 ;
C 291 ;------------------------------------------------------------------------------
C 292 ; SUBROUTINE: Delay
C 293 ;
C 294 ; DESCRIPTION:
C 295 ; This routine executes a delay approximately
C 296 ; (DLOOP + 8) + AR7 * (DLOOP + 6) * 1/freq = nsec
C 297 ; if AR7 = 0 Delay = 108 cycles
C 298 ; if AR7 != 0 Delay = 108 + AR6 * 106 cycles
C 299 ;
C 300 ; A typical call to this subroutine is as follow:
C 301 ;
C 302 ; lar ar7,delay_param 1 cycles reg/#k, 2 cycles if #lk
C 303 ; call Delay,*,ar7 4 cycles
C 304 ;
C 305 ; minimum delay is when delay_parm=0
C 306 ; minimum delay = 113 cycles ( 108 + 5 )
C 307 ; for a cycle time of 50 nsec,
C 308 ; minimum delay = 5.65 usec ( 113 cycles * 50 nsec)
C 309 ; delay time = 5.65 usec + AR7 * 106 * 50 nsec
C 310 ; = 5.65 usec + AR7 * 5.3 usec
C 311 ;
C 312 ; INPUTS:
C 313 ; AR7 = Passed on to this routine to set delay time as required
C 314 ; ARP => AR7
C 315 ; OUTPUTS:
C 316 ; none
C 317 ;------------------------------------------------------------------------------
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sun May 6 00:03:29 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
c2xx_bpx.asm PAGE 8
C 318
C 319 008b DELAY
C 320 008b bb64 RPT #DLOOP ;1 cycles
C 321 008c 8b00 NOP ;1+DLOOP = 101 CYCLES (FOR DLOOP = 100)
C 322 008d 7b9f BANZ DELAY,*-,ar7 ; 4/2 (True/False)
008e 008b+
C 323 008f ef00 RET ; 4 cycles
C 324 ; for delay_parm = 0
C 325 ; (1+101+2+4 = 108) cycles
C 326 ; for delay_parm != 0
C 327 ; 108 + AR7 * (1+101+4 = 106) cycles
C 328 ;
C 329 ********************************************************************************
C 330 ** SUBROUTINE: CLRCMD **
C 331 ** - PLACES FLASH IN NORMAL READ MODE BY: **
C 332 ** - WRITING 0000 TO THE FIRST TWO LOCATIONS OF **
C 333 ** THE FLASH CONTROL REGISTER (0X00040) **
C 334 ** (PMPC,CNTL=>0000) **
C 335 ** - RETURNS TO CALLING ROUTINE IN REGISTER MODE **
C 336 ********************************************************************************
C 337
C 338 0090 CLRCMD
C 339
C 340 0090 ACCESS_REGS
1C 0090 0c7f OUT 07fh,0ff0fh
0091 ff0f
C 341
C 342 0092 ae61 SPLK #0,PAD
0093 0000
C 343 0094 bf80 LACC #0
0095 0000
C 344 0096 0b65 RPT PAD1
C 345 0097 a761 TBLW PAD
C 346
C 347 0098 ef00 RET
C 348
C 349
C 350 0000 .sect "SPL_text"
C 351 0000 SETWADDR:
C 352 0000 a760 TBLW ADDR
C 353 0001 ef00 RET
C 354
C 355
C 356
C 357
C 358
C 359
70
71
72 ;*******************************************************************************
73 ; PUBLIC DECLARATIONS
74 ;*******************************************************************************
75 .global PRG_init, PRG_program, PRG_erase, PRG_verify, PRG_stop
76 .global PRG_bufaddr, PRG_bufsize, PRG_devsize, PRG_paddr, PRG_page
TMS320C1x/C2x/C2xx/C5x COFF Assembler Version 7.00 Sun May 6 00:03:29 2001
Copyright (c) 1987-1999 Texas Instruments Incorporated
c2xx_bpx.asm PAGE 9
77 .global PRG_length, PRG_status,PARMS
78 .global PROTECT,SEG_ST,SEG_END
79
80 ;*******************************************************************************
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