eeprom.c

本测试程序是针对TMS320LF2407 EVM的性能测试而设计开发的。程序运行时将按顺序对数据RAM空间、程序代码空间、片上异步串行通讯、ADC-DAC联合检测、双向数字I/O口、通用I/O和评估板

/*--------------------------------------------------------*/
/*  SPECTRUM DIGITAL INC.				                  */
/*--------------------------------------------------------*/
/*  Writes and reads back data to serial eeprom           */
/*--------------------------------------------------------*/
/*  file name:	 eeprom.c				                  */
/*  Started on:  02/18/2000    by rrp for 2407	     	  */
/*--------------------------------------------------------*/



void bad_trap(void);
void eeprom_error(void);

int eeprom_wait( void );
void eeprom_cs_off( void );
void eeprom_cs_on( void );
void config_spi_eeprom( void );


int txmt_spi_byte( unsigned short tx_data, unsigned short *rcv_data );
int rd_eeprom_byte( unsigned short  address, unsigned short *rd_data );
int rd_eeprom_status( unsigned short *status );
int wr_eeprom_status( unsigned short *status );
int wr_eeprom_byte( unsigned short address, unsigned short *data );
int wr_eeprom_we_latch( void );

void config_spi4eeprom( void );
void set_spi_clken(void);



#define WREN_EE_INSTR	 0x06
#define WRDI_EE_INSTR	 0x04
#define RDSR_EE_INSTR	 0x05
#define WRSR_EE_INSTR	 0x01
#define READ_EE_INSTR	 0x03
#define WRITE_EE_INSTR	 0x02

#define EE_WPEN 	 0x80
#define EE_RSVD3	 0x40
#define EE_RSVD2	 0x20
#define EE_RSVD1	 0x10
#define EE_BL1		 0x08
#define EE_BL0		 0x04
#define EE_WEL		 0x02
#define EE_WIP		 0x01


#define SR_WPEN 	 0x80
#define SR_RSVD2	 0x40
#define SR_RSVD1	 0x20
#define SR_RSVD0	 0x10
#define SR_BL1		 0x08
#define SR_BL0		 0x04
#define SR_WEL		 0x02
#define SR_WIP		 0x01







#define SPI_CLKEN    0x0020

#define SCSR1				   0x7018
#define SCSR1_PTR	(unsigned short *) SCSR1



#define OCRB				   0x7092
#define OCRB_PTR	(unsigned short *) OCRB


#define PCDATDIR			   0x709C
#define PCDATDIR_PTR	(unsigned short *) PCDATDIR


#define SPICCR				   0x7040
#define SPICCR_PTR	(unsigned short *) SPICCR

#define SPICTL				   0x7041
#define SPICTL_PTR	(unsigned short *) SPICTL


#define SPISTS				   0x7042
#define SPISTS_PTR	(unsigned short *) SPISTS

#define SPIBRR				   0x7044
#define SPIBRR_PTR	(unsigned short *) SPIBRR


#define SPIRXEMU			   0x7046
#define SPIRXEMU_PTR	(unsigned short *) SPIRXEMU

#define SPIRXBUF			   0x7047
#define SPIRXBUF_PTR	(unsigned short *) SPIRXBUF

#define SPITXBUF			   0x7048
#define SPITXBUF_PTR	(unsigned short *) SPITXBUF

#define SPIDAT				   0x7049
#define SPIDAT_PTR	(unsigned short *) SPIDAT


#define SPIPRI				   0x704F
#define SPIPRI_PTR	(unsigned short *) SPIPRI





#define SPI_INT 	0x0040

#define SPISUSP_SOFT	0x0020
#define SPISUSP_FREE	0x0010



#define SPI_ERROR	0x0001
#define SPI_GOOD	0x0000
#define EEPROM_GOOD	0x0000


#define DUMMY_WRITE	0




void bad_trap(void)
{
  while(1);                     /* a place to hang if illegal trap */
}

#define EE_TEST_BUFF_SIZE	32

unsigned short write_buff[EE_TEST_BUFF_SIZE];

unsigned short read_buff[EE_TEST_BUFF_SIZE];


void main( void )
{
     unsigned short i;
     unsigned short eedata;
     unsigned short write_data;


     config_spi4eeprom();

     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {
	 read_buff[i] = 0;
	 write_buff[i] = (4*i) +i;

     }


     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {

	 wr_eeprom_byte( i, &write_buff[i] );
     }


     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {

	 rd_eeprom_byte( i, &read_buff[i] );
     }



     for ( i = 0; i < EE_TEST_BUFF_SIZE; i++ )
     {

	 if ( read_buff[i] != write_buff[i] )
	 {
	     eeprom_error();

	 }
     }

     while ( 1 )
     {
       i++;
     }

}

void eeprom_error(void)
{
  while(1);
}


void eeprom_cs_on( void )
{

  asm("     clrc xf ");

}

void eeprom_cs_off( void )
{

  asm("     setc xf ");

}


int eeprom_wait( void )
{
   int i;
   int j;

   j = 0;

   for( i = 0; i < 10; i++ )
   {
       j+=i;
   }

   return( j );
}



void set_spi_clken(void)
{
  unsigned short SCSR1_Data;

  SCSR1_Data = *SCSR1_PTR;

  SCSR1_Data |=  SPI_CLKEN;

  *SCSR1_PTR = SCSR1_Data;

}






void config_spi4eeprom( void )
{

    unsigned short temp;

    *PCDATDIR_PTR = 0x0000;



    eeprom_cs_off();


    /* Enable spi clock module */

    set_spi_clken();


    /* Set SPI as PRIMARY PINS	*/
    *OCRB_PTR	|= 0x001C;


    /* 8 bit mode  */
    *SPICCR_PTR = 0x00007;

    /* Master mode  */
    *SPICTL_PTR = 0x0000E;

    /* Slow as possible */
    *SPIBRR_PTR = 0x0007F;


    /* Release set up soft emu */
    temp = *SPIPRI_PTR;
    temp |=  SPISUSP_SOFT;
    temp &= (~SPISUSP_FREE);
    *SPIPRI_PTR = temp;



    /* Release SPI from Reset */
    *SPICCR_PTR = 0x00087;

}






int rd_eeprom_byte( unsigned short address, unsigned short *rd_data )
{
     unsigned short dummy;


     eeprom_cs_on();


    /* Send Read Command to SPI*/

    txmt_spi_byte( READ_EE_INSTR, &dummy );

    /* Send Read Address to SPI */

    txmt_spi_byte( (address >> 8  ), &dummy );
    txmt_spi_byte( (address & 0xff), &dummy );

    /* Get Word from SPI */

    txmt_spi_byte( DUMMY_WRITE, &dummy );

    *rd_data = dummy;


    eeprom_cs_off();

    return( EEPROM_GOOD );

}



int rd_eeprom_status( unsigned short *status )
{
     unsigned short dummy;


     eeprom_cs_on();


    /* Send Read Command to SPI*/

    txmt_spi_byte( RDSR_EE_INSTR, &dummy );

    /* Read Status from SPI */

    txmt_spi_byte( DUMMY_WRITE, &dummy );

    *status = dummy;


    eeprom_cs_off();

    return( EEPROM_GOOD );


}


int wr_eeprom_status( unsigned short *status )
{
     unsigned short dummy;


     eeprom_cs_on();


    /* Send Read Command to SPI*/

    txmt_spi_byte( WRSR_EE_INSTR, &dummy );

    /* Read Status from SPI */

    dummy = *status;

    txmt_spi_byte( DUMMY_WRITE, &dummy );


    eeprom_cs_off();

    return( EEPROM_GOOD );


}



int wr_eeprom_we_latch( void )
{
    unsigned short dummy;



    /* Send Read Command to SPI*/
    eeprom_cs_on();

    txmt_spi_byte( WREN_EE_INSTR, &dummy );

    eeprom_cs_off();

    return( EEPROM_GOOD );


}





int wr_eeprom_byte( unsigned short address, unsigned short *data )
{

     unsigned short dummy;
     unsigned short write_data;
     unsigned short status_reg;
     unsigned short status_data;




    /* Send Write Latch Enable to SPI*/

    wr_eeprom_we_latch();

    eeprom_wait();


    eeprom_cs_on();


    /* Send Write Command to SPI*/

    txmt_spi_byte( WRITE_EE_INSTR, &dummy );

    /* Send Read Address to SPI */

    txmt_spi_byte( (address >> 8  ), &dummy );
    txmt_spi_byte( (address & 0xff), &dummy );

    /* Write Byte from SPI */

    write_data = *data;

    txmt_spi_byte( write_data, &dummy );


    eeprom_cs_off();



    /* WIP not ready?? Then Wait */

    do
    {
	rd_eeprom_status( &status_reg );
	eeprom_wait();

    }while( status_reg & EE_WIP );


    return( EEPROM_GOOD );


}


int txmt_spi_byte( unsigned short tx_data, unsigned short *rcv_data )
{
    int timer;
    int spi_status;
    unsigned short txmt_buf;

    txmt_buf = tx_data << 8;


    *SPITXBUF_PTR = txmt_buf;

    timer = 0x7fff;

    while( timer-- )
    {

	spi_status = *SPISTS_PTR;

	/* Check for SPI INT for completion */

	if( spi_status & SPI_INT )
	{
	     break;
	}
    }



    if( timer )
    {
	 *rcv_data = *SPIRXBUF_PTR;

	 return ( SPI_GOOD );
    }
    else
    {
	return( SPI_ERROR );
    }
}