jdt.vhd

很好用 因为本设计是交通灯的控制

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity jtkdz is
   port (clk,Sens_m,sens_f:in std_logic;
          Rm,Ym,Gm,rf,yf,gf:out std_logic);
end jtkdz;
architecture are of jtkdz is
   type state_type is (A,B,C,D);
  signal state:state_type;
 begin
cnt:process (clk)
       variable S: integer rang 0 to 19;
       variable nclr,en:bit;
begin
  if (clk'event and clk='1') then
      if nclr='0' then S: =0;
          elsif en='0' then S: =S;
          else S: =S+1;
      end if;
case state is
when A = >Rm< ='0';Ym< ='0';Gm< ='1';
     rf< ='1';yf< ='0';gf< ='0';
if (sens_f and Sens_m) ='1' then
  if S=19 then
     state< =B;nclr: ='0';en: ='0';
     else
     state< =A;nclr: ='1';en: ='1';
  end if;
  elsif (sens_f and (not Sens_m)) ='1' then
state< =B;nclr: ='0';en: ='0';
  else
state< =A;nclr: ='1';en: ='1';
  end if;
when B = >Rm< ='0';Ym< ='1';Gm< ='0';
     rf< ='1';yf< ='0';gf< ='0';
 if S=3 then
    state< =C;nclr: ='0';en: ='0';
  else
    state< =B;nclr: ='1';en: ='1';
  end if;
when C = >Rm< ='1';Ym< ='0';Gm< ='0';
     rf< ='0';yf< ='0';gf< ='1';
  if (sens_f and Sens_m) ='1' then
    if S=19 then
    state< =D;nclr: ='0';en: ='0';
       else
    state< =C;nclr: ='1';en: ='1';
    end if;
    elsif sens_f='0' then
    state< =D;nclr: ='0';en: ='0';
    else
    state< =C;nclr: ='1';en: ='1';
  end if;
when D = >Rm< ='1';Ym< ='0';Gm< ='0';
      rf< ='0';yf< ='1';gf< ='0';
   if S=3 then
      state< =A;nclr: ='0';en: ='0';
   else
   state< =D;nclr: ='1';en: ='1';
   end if;
  end case;
  end if;
 end process cnt;
 end arc;