scalarize.ref

来自「openaccess与verilog互相转化时所用的源代码」· REF 代码 · 共 26 行

// Verilog file for cell "top" view "netlist" 
// Language Version: 2001 

module leaf (
    BUS,
    SCALAR);

    inout [7:0] BUS;
    inout SCALAR;

endmodule // leaf


module top ();

    wire VSS;

    leaf I0 (
            .BUS({VSS,VSS,VSS,VSS,VSS,VSS,VSS,VSS}),
            .SCALAR(VSS));
    leaf I1 (
            .SCALAR(VSS));
endmodule // top