def_optimizeroutes.def.ref

openaccess读def,lef文件所用的源代码

VERSION 5.6 ;
NAMESCASESENSITIVE ON ;
DIVIDERCHAR "/" ;
BUSBITCHARS "[]" ;

DESIGN cell ;

TECHNOLOGY technology ;
UNITS DISTANCE MICRONS 1000 ;
PROPERTYDEFINITIONS
  DESIGN realrangeprop REAL RANGE 1.1 100.1 25.25 ;
  DESIGN intrangeprop INTEGER RANGE 1 100 25 ;
  DESIGN realprop REAL 1.1 ;
  DESIGN intprop INTEGER 1 ;
  DESIGN strprop STRING "aString" ;
  ROW strprop STRING ;
  ROW realrangeprop REAL RANGE 1.1 100.1 ;
  ROW intrangeprop INTEGER RANGE 1 100 ;
  ROW realprop REAL ;
  ROW intprop INTEGER ;
END PROPERTYDEFINITIONS

DIEAREA ( -190000 -120000 ) ( 190360 350000 ) ;
ROW ROW_1 CORE 1000 1000 N DO 100 BY 1 STEP 700 0
  + PROPERTY strprop "aString"
  + PROPERTY realrangeprop 25.25
  + PROPERTY intrangeprop 25
  + PROPERTY realprop 1.1
  + PROPERTY intprop 1 ;
ROW ROW_2 CORE 1000 2000 S DO 100 BY 1 STEP 700 0 ;
ROW ROW_3 CORE 1000 3000 E DO 100 BY 1 STEP 8400 0 ;
ROW ROW_4 CORE 1000 4000 W DO 100 BY 1 STEP 8400 0 ;
ROW ROW_5 CORE 1000 5000 FN DO 100 BY 1 STEP 700 0 ;
ROW ROW_6 CORE 1000 6000 FS DO 100 BY 1 STEP 700 0 ;
ROW ROW_7 CORE 1000 7000 FE DO 100 BY 1 STEP 8400 0 ;
ROW ROW_8 CORE 1000 8000 FW DO 100 BY 1 STEP 8400 0 ;
ROW ROW_VERT_1 CORE -10000 -10000 N DO 1 BY 10 STEP 0 8400 ;
ROW ROW_VERT_2 CORE -9000 -10000 S DO 1 BY 10 STEP 0 8400 ;
ROW ROW_VERT_3 CORE -8000 -10000 E DO 1 BY 10 STEP 0 700 ;
ROW ROW_VERT_4 CORE -7000 -10000 W DO 1 BY 10 STEP 0 700 ;
ROW ROW_VERT_5 CORE -6000 -10000 FN DO 1 BY 10 STEP 0 8400 ;
ROW ROW_VERT_6 CORE -5000 -10000 FS DO 1 BY 10 STEP 0 8400 ;
ROW ROW_VERT_7 CORE -4000 -10000 FE DO 1 BY 10 STEP 0 700 ;
ROW ROW_VERT_8 CORE -3000 -10000 FW DO 1 BY 10 STEP 0 700 ;
TRACKS Y 52 DO 857 STEP 104 LAYER M1 ;
TRACKS Y 52 DO 857 STEP 104 ;
TRACKS X 52 DO 1720 STEP 104 LAYER M2 ;
TRACKS X 52 DO 1720 STEP 104 ;
GCELLGRID X 0 DO 100 STEP 600 ;
GCELLGRID Y 10 DO 120 STEP 400 ;

VIAS 1 ;
- M1_M2
  + RECT M1 ( -600 -600 ) ( 600 600 )
  + RECT V1 ( -450 -450 ) ( 450 450 )
  + RECT M2 ( -450 -450 ) ( 450 450 ) ;
END VIAS

COMPONENTS 4 ;
- I1 B
  + EEQMASTER A ;
- I2 A ;
- I3 A ;
- I4 A ;
END COMPONENTS

PINS 1 ;
- P0 + NET N0
  + DIRECTION INOUT ;
END PINS

SPECIALNETS 1 ;
- SN1
  ( I2 Z )
  ( I1 Z )
  + ROUTED M2 300 ( 200 100 ) ( * 200 )
  NEW M1 120 ( 100 100 ) ( 200 * )
  NEW M1 0 ( 200 100 ) M1_M2 ;
END SPECIALNETS

NETS 2 ;
- N0
  ( PIN P0 ) ;
- N1
  ( I1 A )
  + ROUTED M1 ( 2400 282400 ) ( 240 * )
    NEW M2 ( 9600 282400 ) M1_M2 ( 2400 * )
    NEW M2 ( 14000 341440 ) ( 9600 * ) ;
END NETS

END DESIGN