lef_techonly.lef

openaccess读def,lef文件所用的源代码

#------------------------------------------------------------------------------
# all54Constructs01 testcase
# Definitions
# - "whole correct syntax covered" means all possible enum values for 
#   attributes are covered.
# - "one correct syntax covered" means NOT all enum values for attributes
#   are covered (usually means that construct can be used only once in a LEF)
#
# version : one correct syntax
# names case sensitive : one correct syntax
# no wire extension : one correct syntax
# bus bit characters : one correct syntax
# divider character : one correct syntax
# units : one correct syntax
# manufacturing grid : whole correct syntax
# use min spacing : two correct syntaxes
# clearance measure : one correct syntax
# property definitions : whole correct syntax covered
# antenna size : only 5.4 syntax covered
# layer masterslice : whole correct syntax covered
# layer overlap : whole correct syntax covered
# layer cut : several statements covering whole correct syntax
#             (all attributes values)
#             CUT01, CUT12, CA
#             other cut layer names used for via...
# layer routing : several statements covering whole correct syntax
#                 (all attributes values) except an old antenna attribute
#                 RX, PC, M1
#                 other routing layer names used for via...
# via : several statements covering whole correct syntax
# via rule : two statements covering whole correct syntax
# via rule generate : two statements covering whole correct syntax
# nondefault rule : whole correct syntax covered
# crosstalk : whole correct syntax covered
# same-net spacing : whole correct syntax covered
# min feature : whole correct syntax covered
# dielectric : whole correct syntax covered
# irdrop : whole correct syntax covered
# site : several statements covering whole syntax (all attributes values)
# array : whole correct syntax covered
# macro : several statements covering whole correct syntax (except class
#         attributes) INV, INV_B, INV_C, BADSITESYNTAX
# macro pin : whole correct syntax covered (except old antenna attributes)
#             in CHK3A macro
# macro obstruction : several statements covering whole correct syntax
#                     INV, INV_B, INV_C, RECTILINEAR
# macro timing : one correct syntax covered
# extension : whole correct syntax covered
#------------------------------------------------------------------------------

VERSION 5.4 ;
NAMESCASESENSITIVE ON ;
NOWIREEXTENSIONATPIN ON ;
BUSBITCHARS "[]" ;
DIVIDERCHAR ":" ;

MANUFACTURINGGRID 0.01 ;

USEMINSPACING OBS OFF ;
USEMINSPACING PIN ON ;

CLEARANCEMEASURE MAXXY ;

PROPERTYDEFINITIONS
  # only props for library can have values defined here
  LIBRARY NAME STRING "Cadence96" ;
  LIBRARY libintprop INTEGER 20 ;
  LIBRARY librealprop REAL 21.22 ;
  LIBRARY libintrangeprop INTEGER  RANGE 20 50 30 ;
  LIBRARY librealrangeprop REAL RANGE 21.0 51.0 25.0 ;
  LAYER lsp STRING ;
  LAYER lip INTEGER ;
  LAYER lrp REAL ;
  LAYER liprange INTEGER RANGE 1 100 ;
  LAYER lrprange REAL RANGE 1.0 100.0 ;
  VIA viasp STRING ;
  VIA viaip INTEGER ;
  VIA viarp REAL ;
  VIA COUNT INTEGER RANGE 1 100 ;
  VIA viarrangep REAL RANGE 1.0 100.0 ;
  VIARULE vrsp STRING ;
  VIARULE vrip INTEGER ;
  VIARULE vrrp REAL ;
  VIARULE vrirp INTEGER RANGE 1 100 ;
  VIARULE vrrrp REAL RANGE 1.0 100.0 ;
  NONDEFAULTRULE ndrsp STRING ;
  NONDEFAULTRULE ndrip INTEGER ;
  NONDEFAULTRULE ndrrp REAL ;
  NONDEFAULTRULE ndrirp INTEGER RANGE 1 100 ;
  NONDEFAULTRULE ndrfrp REAL RANGE 1.0 100.0 ;
  MACRO stringprop STRING ;
  MACRO integerprop INTEGER ;
  MACRO realprop REAL ;
  MACRO WEIGHT REAL RANGE 1.0 100.0 ;
  MACRO intrangeprop INTEGER RANGE 1 100 ;
  PIN strprop STRING ;
  PIN intprop INTEGER ;
  PIN realprop REAL ;
  PIN intrangeprop INTEGER RANGE 1 100 ;
  PIN realrangeprop REAL RANGE 1.0 100.0 ;
END PROPERTYDEFINITIONS

# 5.4 syntax
ANTENNAINPUTGATEAREA 45 ;
ANTENNAINOUTDIFFAREA 65 ;
ANTENNAOUTPUTDIFFAREA 55 ;

LAYER POLYS
  TYPE MASTERSLICE ;
  PROPERTY lsp "top" lip 1 lrp 2.0 liprange 3 lrprange 3.5 ;
END POLYS

LAYER CUT01
  TYPE CUT ;
  PROPERTY lsp "top" lip 1 lrp 2.3 liprange 2 lrprange 3.0 ;
  ACCURRENTDENSITY PEAK
    FREQUENCY 1E6 100E6 ;
    TABLEENTRIES 0.5E-6 0.4E-6 ;
  DCCURRENTDENSITY AVERAGE
    CUTAREA 2.0 5.0 ; 
    TABLEENTRIES 0.5E-6 0.4E-6 ;
  ANTENNAAREARATIO 5.6 ;
  ANTENNADIFFAREARATIO 6.5 ;
  ANTENNACUMAREARATIO 6.7 ;
  ANTENNACUMDIFFAREARATIO 5.4 ;
  ANTENNAAREAFACTOR 5.4 ;
END CUT01

LAYER RX
  TYPE ROUTING ;
  PITCH 1.8 ;
  OFFSET 0.9 ;
  WIDTH 0.05 ;
  SPACING 0.180 ;
  SPACING 0.18 LENGTHTHRESHOLD  1.0 ;
  SPACING 0.22 RANGE 0.3 10.0 USELENGTHTHRESHOLD ;
  SPACING 0.60 RANGE 10.005 100000.0 ;
  SPACING 0.32 RANGE 1.01 2000.0 INFLUENCE 1.01 ;
  SPACING 0.6 RANGE 4.5 6.12 INFLUENCE 3.81 RANGE 0.1 0.2 ;

  MINIMUMCUT 2 WIDTH 5.0 ;
  DIRECTION HORIZONTAL ;
  WIREEXTENSION 0.75 ;
  RESISTANCE RPERSQ 0.103 ;
  CAPACITANCE CPERSQDIST 0.000156 ;
  HEIGHT 9 ;
  THICKNESS 1 ;
  SHRINKAGE 0.1 ;
  CAPMULTIPLIER 1 ;
  EDGECAPACITANCE 0.00005 ;
  PROPERTY lsp "top" lip 1 lrp 2.3 liprange 2 lrprange 3.0 ;
  ACCURRENTDENSITY PEAK
    FREQUENCY 1E6 100E6 ;
    TABLEENTRIES 0.5E-6 0.4E-6 ;
  DCCURRENTDENSITY AVERAGE
    WIDTH 20.0 50.0 ;
    TABLEENTRIES 0.6E-6 0.5E-6 ;
  AREA 34.1 ;
  SLOTWIREWIDTH 3.5 ;
  SLOTWIRELENGTH 4.5 ;
  SLOTWIDTH 5.6 ;
  SLOTLENGTH 3.2 ;
  MAXADJACENTSLOTSPACING 5.5 ;
  MAXCOAXIALSLOTSPACING 6.5 ;
  MAXEDGESLOTSPACING 5.0 ;
  SPLITWIREWIDTH 3.3 ;
END RX

LAYER CUT12
  TYPE CUT ;
  SPACING 0.7 LAYER CUT01 ;
  ACCURRENTDENSITY AVERAGE 5.5 ;
  DCCURRENTDENSITY AVERAGE 0.45E-6 ;
  ANTENNADIFFAREARATIO PWL ( ( 5.4 5.4 ) ( 6.5 6.5 ) ( 7.5 7.5 ) ) ;
  ANTENNACUMDIFFAREARATIO PWL ( ( 5.4 5.4 ) ( 6.5 6.5 ) ( 7.5 7.5 ) ) ;
END CUT12

LAYER PC
  TYPE ROUTING ;
  PITCH 1.8 ;
  WIDTH 0.05 ;
  DIRECTION VERTICAL ;
  SPACING 0.6 ;
  SPACING 0.4 RANGE 0.1 0.12 ;
  SPACING 0.8 RANGE 6.01 7.0 RANGE 8.01 1000.0 ;
  ANTENNAAREARATIO 5.4 ;
  ANTENNADIFFAREARATIO 6.5 ;
  ANTENNACUMAREARATIO 7.5 ;
  ANTENNACUMDIFFAREARATIO 5.0 ;
  ANTENNAAREAFACTOR 4.5 DIFFUSEONLY ;
  ACCURRENTDENSITY AVERAGE 5.5 ;
  DCCURRENTDENSITY AVERAGE 0.45E-6 ;
  MINIMUMDENSITY 20.2 ;
  MAXIMUMDENSITY 80.0 ;
  DENSITYCHECKWINDOW 200.0 200.0 ;
  DENSITYCHECKSTEP 100 ;
  FILLACTIVESPACING 3.0 ;
END PC

LAYER CA
  TYPE CUT ;
  ACCURRENTDENSITY RMS
    FREQUENCY 100E6 400E6 800E6 ;
    CUTAREA 0.4 0.8 10.0 50.0 100.0 ;
    TABLEENTRIES
      2.0E-6 1.9E-6 1.8E-6 1.7E-6 1.5E-6
      1.4E-6 1.3E-6 1.2E-6 1.1E-6 1.0E-6
      0.9E-6 0.8E-6 0.7E-6 0.6E-6 0.4E-6 ;
END CA

LAYER M1
  TYPE ROUTING ;
  PITCH 1.8 ;
  WIDTH 1 ;
  DIRECTION HORIZONTAL ;
  ANTENNADIFFAREARATIO PWL ( ( 4.0 4.1 ) ( 4.5 4.6 ) ) ;
  ANTENNACUMDIFFAREARATIO PWL ( ( 5.0 5.1 ) ( 6.0 6.1 ) ) ;
  ANTENNAAREAFACTOR 4.5 ;
  ACCURRENTDENSITY RMS
    FREQUENCY 100E6 400E6 800E6 ;
    WIDTH  0.4 0.8 10.0 50.0 100.0 ;
    TABLEENTRIES
      2.0E-6 1.9E-6 1.8E-6 1.7E-6 1.5E-6
      1.4E-6 1.3E-6 1.2E-6 1.1E-6 1.0E-6
      0.9E-6 0.8E-6 0.7E-6 0.6E-6 0.4E-6 ;
END M1

# Layers from V1 to MT are only used for Vias; not needed for syntax coverage
LAYER V1
  TYPE CUT ;
  SPACING 0.6 LAYER CA ;
END V1

LAYER M2
  TYPE ROUTING ;
  WIDTH 0.9 ;
  WIREEXTENSION 8 ;
  PITCH 1.8 ;
  SPACING 0.9 ;
  DIRECTION VERTICAL ;
  RESISTANCE RPERSQ 0.0608 ;
  CAPACITANCE CPERSQDIST 0.000184 ;
END M2

LAYER V2
  TYPE CUT ;
END V2

LAYER M3
  TYPE ROUTING ;
  WIDTH 0.9 ;
  WIREEXTENSION 8 ;
  PITCH 1.8 ;
  SPACING 0.9 ;
  DIRECTION HORIZONTAL ;
  RESISTANCE RPERSQ 0.0608 ;
  CAPACITANCE CPERSQDIST 0.000184 ;
END M3

LAYER V3
  TYPE CUT ;
END V3

LAYER MT
  TYPE ROUTING ;
  WIDTH 0.9 ;
  PITCH 1.8 ;
  SPACING 0.9 ;
  DIRECTION VERTICAL ;
  RESISTANCE RPERSQ 0.0608 ;
  CAPACITANCE CPERSQDIST 0.000184 ;
END MT

LAYER OVERLAP
  TYPE OVERLAP ;
  PROPERTY lsp "top" lip 1 lrp 2.0 liprange 3 lrprange 3.5 ;
END OVERLAP

VIA RX_PC DEFAULT
  RESISTANCE 2 ;
  LAYER RX ;
    RECT -0.7 -0.7 0.7 0.7 ;
  LAYER CUT12 ;
    RECT -0.25 -0.25 0.25 0.25 ;
  LAYER PC ;
    RECT -0.6 -0.6 0.6 0.6 ;
  PROPERTY viasp "DEFAULT" viaip 1 viarp 1.0 COUNT 34 viarrangep 1.99 ;
END RX_PC

VIA PC_M1 DEFAULT
  RESISTANCE 1 ;
  LAYER PC ;
    RECT -0.6 -0.6 0.6 0.6 ;
  LAYER CA ;
    RECT -0.25 -0.25 0.25 0.25 ;
  LAYER M1 ;
    RECT -0.6 -0.6 0.6 0.6 ;
END PC_M1

VIA M1_M2 DEFAULT
  RESISTANCE 1.5 ;
  LAYER M1 ;
    RECT -0.6 -0.6 0.6 0.6 ;
  LAYER V1 ;
    RECT -0.45 -0.45 0.45 0.45 ;
  LAYER M2 ;
    RECT -0.45 -0.45 0.45 0.45 ;
END M1_M2

VIA M2_M3 DEFAULT
  RESISTANCE 1.5 ;
  LAYER M2 ;
    RECT -0.45 -0.9 0.45 0.9 ;
  LAYER V2 ;
    RECT -0.45 -0.45 0.45 0.45 ;
  LAYER M3 ;
    RECT -0.45 -0.45 0.45 0.45 ;
END M2_M3

VIA M2_M3_PWR 
  RESISTANCE 0.4 ;
  LAYER M2 ;
    RECT -1.35 -1.35 1.35 1.35 ;
  LAYER V2 ;
    RECT -1.35 -1.35 -0.45 1.35 ;
    RECT 0.45 -1.35 1.35 -0.45 ;
    RECT 0.45 0.45 1.35 1.35 ;
  LAYER M3 ;
    RECT -1.35 -1.35 1.35 1.35 ;
END M2_M3_PWR

VIA M3_MT DEFAULT TOPOFSTACKONLY
  RESISTANCE 1.5 ;
  LAYER M3 ;
    RECT -0.9 -0.45 0.9 0.45 ;
  LAYER V3 ;
    RECT -0.45 -0.45 0.45 0.45 ;
  LAYER MT ;
    RECT -0.45 -0.45 0.45 0.45 ;
END M3_MT

VIA VIACENTER12
  LAYER M1 ;
    RECT -4.6 -2.2 4.6 2.2 ;
  LAYER V1 ;
    RECT -3.1 -0.8 -1.9 0.8 ;
    RECT 1.9 -0.8 3.1 0.8 ;
  LAYER M2 ;
    RECT -4.4 -2.0 4.4 2.0 ;
  RESISTANCE 0.24 ;
END VIACENTER12

VIARULE VIALIST12
  LAYER M1 ;
    DIRECTION HORIZONTAL ;
    WIDTH 9.0 TO 9.6 ;
  LAYER M2 ;
    DIRECTION VERTICAL ;
    WIDTH 3.0 TO 3.0 ;
  VIA VIACENTER12 ;
  PROPERTY vrsp "vialist12" vrip 1 vrrp 4.5 vrirp 1 vrrrp 1.2 ;
END VIALIST12

VIARULE VIALISTDEF12
  LAYER M1 ;
    DIRECTION HORIZONTAL ;
  LAYER M2 ;
    DIRECTION VERTICAL ;
  VIA VIACENTER12 ;
END VIALISTDEF12

VIARULE VIALIST23
  LAYER M2 ;
    DIRECTION VERTICAL ;
    WIDTH 9.0 TO 9.6 ;
  LAYER M3 ;
    DIRECTION HORIZONTAL ;
    WIDTH 3.0 TO 3.0 ;
  VIA M2_M3 ;
END VIALIST23

VIARULE VIAGEN12 GENERATE
  LAYER M1 ;
    DIRECTION HORIZONTAL ;
    WIDTH 0.1 TO 19 ;
    OVERHANG 1.4 ;
    METALOVERHANG 0 ;
  LAYER M2 ;
    DIRECTION VERTICAL ;
    WIDTH 0.1 TO 19 ;
    OVERHANG 1.4 ;
    METALOVERHANG 0 ;
  LAYER V1 ;
    RECT -0.8 -0.8 0.8 0.8 ;
    SPACING 5.6 BY 6.0 ;
    RESISTANCE 0.2 ;
END VIAGEN12

VIARULE VIAGEN12_2 GENERATE
  LAYER M1 ;
    DIRECTION HORIZONTAL ;
  LAYER M2 ;
    DIRECTION VERTICAL ;
  LAYER V1 ;
    RECT -0.8 -0.8 0.8 0.8 ;
    SPACING 5.6 BY 6.0 ;
END VIAGEN12_2

VIARULE VIAGEN23 GENERATE
  LAYER M2 ;
    DIRECTION VERTICAL ;
    WIDTH 0.1 TO 19 ;
    OVERHANG 1.4 ;
    METALOVERHANG 0 ;
  LAYER M3 ;
    DIRECTION HORIZONTAL ;
    WIDTH 0.1 TO 19 ;
    OVERHANG 1.4 ;
    METALOVERHANG 0 ;
  LAYER V2 ;
    RECT -0.8 -0.8 0.8 0.8 ;
    SPACING 5.6 BY 6.0 ;
    RESISTANCE 0.2 ;
END VIAGEN23

VIARULE VIAGEN23_2 GENERATE
  LAYER M2 ;
    DIRECTION VERTICAL ;
  LAYER M3 ;
    DIRECTION VERTICAL ;
  LAYER V2 ;
    RECT -0.8 -0.8 0.8 0.8 ;
    SPACING 5.6 BY 6.0 ;
END VIAGEN23_2

NONDEFAULTRULE RULE1
  LAYER RX
    WIDTH 10.0 ;
    WIREEXTENSION 6 ;
    SPACING 2.2 ;
    RESISTANCE RPERSQ 3.4 ;
    CAPACITANCE CPERSQDIST 5.7 ;
    EDGECAPACITANCE 8.9 ;
  END RX
  LAYER PC
    WIDTH 10.0 ;
    SPACING 2.2 ;
  END PC
  LAYER M1
    WIDTH 10.0 ;
    SPACING 2.2 ;
  END M1
  LAYER M2
    WIDTH 10.0 ;
    SPACING 2.2 ;
  END M2
  LAYER M3
    WIDTH 11.0 ;
    SPACING 3.2 ;
  END M3
  LAYER  MT
    WIDTH 11.0 ;
    SPACING 3.2 ;
  END MT
  VIA nd1VIARX0
    RESISTANCE 0.2 ;
    LAYER RX ;
      RECT -3 -3 3 3 ;
    LAYER CUT12 ;
      RECT -1.0 -1.0 1.0 1.0 ;
    LAYER PC ;
      RECT -3 -3 3 3 ;
    PROPERTY viasp "NONDEFAULT" viaip 1 viarp 1.0 COUNT 34 viarrangep 1.99 ;
  END nd1VIARX0
  VIA nd1VIA01
    RESISTANCE 0.2 ;
    LAYER PC ;
      RECT -3 -3 3 3 ;
    LAYER CA ;
      RECT -1.0 -1.0 1.0 1.0 ;
    LAYER M1 ;
      RECT -3 -3 3 3 ;