def56_01.def.ref

openaccess读def,lef文件所用的源代码

PINPROPERTIES 2 ;
- PIN P0
  + PROPERTY strprop "aString"
  + PROPERTY realrangeprop 25.25
  + PROPERTY intrangeprop 25
  + PROPERTY realprop 1.1
  + PROPERTY intprop 1 ;
- I1 A
  + PROPERTY strprop "aString"
  + PROPERTY realrangeprop 25.25
  + PROPERTY intrangeprop 25
  + PROPERTY realprop 1.1
  + PROPERTY intprop 1 ;
END PINPROPERTIES

BLOCKAGES 20 ;
- LAYER M1
  RECT ( 60 70 ) ( 80 90 ) ;
- LAYER M2 + COMPONENT I1
  POLYGON ( 100 100 ) ( 100 200 ) ( 150 200 ) ( 150 150 ) ( 200 150 ) ( 200 100 ) ;
- LAYER M2 + SLOTS
  RECT ( 10 20 ) ( 40 50 ) ;
- LAYER M1 + FILLS
  RECT ( -10 20 ) ( 30 40 ) ;
- LAYER M1 + PUSHDOWN
  RECT ( 50 30 ) ( 55 40 ) ;
- LAYER M1
  RECT ( 200 282340 ) ( 2000 282460 ) ;
- PLACEMENT
  RECT ( -15 0 ) ( 0 20 )
  RECT ( -15 20 ) ( 30 40 )
  RECT ( 30 5 ) ( 50 40 )
  RECT ( -10 -15 ) ( 50 0 ) ;
- PLACEMENT + COMPONENT I1
  RECT ( -10 0 ) ( 0 20 )
  RECT ( -10 20 ) ( 30 40 )
  RECT ( 30 0 ) ( 50 40 )
  RECT ( -10 -5 ) ( 50 0 ) ;
- PLACEMENT + PUSHDOWN
  RECT ( -5 0 ) ( 0 20 )
  RECT ( -5 20 ) ( 30 40 )
  RECT ( 25 0 ) ( 30 40 )
  RECT ( -5 0 ) ( 50 10 ) ;
- PLACEMENT
  RECT ( 0 0 ) ( 100 100 )
  RECT ( 0 100 ) ( 100 200 )
  RECT ( 100 100 ) ( 200 200 )
  RECT ( 200 100 ) ( 300 200 )
  RECT ( 200 200 ) ( 300 300 ) ;
END BLOCKAGES

SPECIALNETS 3 ;
- SN1
  ( I4 Z )
  ( I5 Z )
  ( I6 Z )
  ( I7 Z )
  ( I8 Z )
  ( I9 Z )
  ( I10 Z )
  ( I11 Z )
  ( I12[0] Z )
  ( I12[1] Z )
  ( I13[0][10] Z )
  ( I14\[1\] Z )
  ( nobrackets Z )
  ( somethingwith[1] Z )
  ( more[]brackets Z )
  ( more[1]brackets Z )
  ( more[1][2] Z )
  ( more[1]\[2\] Z )
  ( more\[2\] Z )
  ( I3 Z )
  ( I2 Z )
  ( I1 Z )
  ( foo[6][7]bar/haha[8][9] Z )
  ( foo[5][6]bar/haha[7]\[8\] Z )
  ( foo[4][5]/haha[6]\[7\] Z )
  ( foo[3]\[4\]/haha[5][6] Z )
  ( foo[2][3]/haha[4][5] Z )
  ( foo[1]\[2\]/haha[3]\[4\] Z )
  ( vectormodule[1]/scalarname Z )
  ( vectormodule[1]/vectorname[1] Z )
  + ORIGINAL VDD
  + WEIGHT 30
  + VOLTAGE 3200
  + FIXEDBUMP
  + SHIELD N1 M2 90 ( 8160 301600 ) ( 2400 * )
  NEW M1 90 ( 8160 340440 ) ( * 301600 )
  NEW M2 90 ( 14100 340440 ) ( 8160 * )
  + ROUTED M1 120 + SHAPE DRCFILL ( 8000 8200 ) ( 8400 * )
  NEW M1 120 + SHAPE DRCFILL ( 8000 8000 ) ( * 8200 )
  + FIXED M1 100 ( 200 200 ) ( 300 * )
  + COVER M1 100 ( 100 100 ) ( * 200 )
  + ROUTED M1 200 ( 700 700 ) ( * 800 )
  NEW M2 200 ( 3400 3300 ) ( * 3600 )
  NEW M2 120 ( 3300 3300 ) ( 3500 * )
  NEW M2 200 ( 3300 3300 ) ( 3400 * )
  NEW M2 120 ( 3100 3100 ) ( 3300 * )
  NEW M2 200 ( 3100 3100 ) ( 3200 * )
  NEW M1 120 ( 2900 3000 ) ( 3100 * )
  NEW M1 120 + SHAPE PADRING ( 2200 282400 ) ( 220 * )
  NEW M1 120 + SHAPE BLOCKRING ( 2100 282400 ) ( 210 * )
  NEW M1 120 + SHAPE FILLWIRE ( 2900 282400 ) ( 290 * )
  NEW M1 120 + SHAPE BLOCKWIRE ( 2800 282400 ) ( 280 * )
  NEW M1 120 + SHAPE COREWIRE ( 2700 282400 ) ( 270 * )
  NEW M1 120 + SHAPE IOWIRE ( 2600 282400 ) ( 260 * )
  NEW M1 120 + SHAPE FOLLOWPIN ( 2500 282400 ) ( 250 * )
  NEW M1 120 + SHAPE STRIPE ( 2400 282400 ) ( 240 * )
  NEW M2 120 + SHAPE RING ( 9600 282400 ) ( 2400 * )
  NEW M1 120 + SHAPE RING ( 9600 341440 ) ( * 282400 )
  NEW M1 120 + SHAPE RING ( 14000 341440 ) ( 9600 * )
  + SHIELD N1 M1 0 ( 8360 301800 ) M1_M2
  NEW M1 0 ( 8360 301600 ) M1_M2
  NEW M1 0 ( 8160 301800 ) M1_M2
  NEW M1 0 ( 8160 301600 ) M1_M2
  NEW M1 0 ( 8160 340440 ) M1_M2
  + ROUTED M1 0 ( 700 700 ) M1_M2
  NEW M1 0 ( 500 500 ) M1_M2
  NEW M1 0 ( 500 500 ) M1_M2
  NEW M1 0 ( 400 400 ) M1_M2
  NEW M1 0 ( 290 282400 ) VIAGEN12_7
  NEW M1 0 + SHAPE BLOCKWIRE ( 280 282400 ) CUSTOMVIA
  NEW M1 0 + SHAPE COREWIRE ( 270 282400 ) VIAGEN12_3
  NEW M1 0 + SHAPE IOWIRE ( 260 282400 ) VIAGEN12_2
  NEW M1 0 + SHAPE FOLLOWPIN ( 250 282400 ) VIAGEN12_1
  NEW M1 0 + SHAPE STRIPE ( 240 282400 ) M1_M2
  NEW M1 0 + SHAPE RING ( 9800 282600 ) M1_M2
  NEW M1 0 + SHAPE RING ( 9800 282400 ) M1_M2
  NEW M1 0 + SHAPE RING ( 9600 282600 ) M1_M2
  NEW M1 0 + SHAPE RING ( 9600 282400 ) M1_M2
  + PROPERTY strprop "aString"
  + PROPERTY realrangeprop 25.25
  + PROPERTY intrangeprop 25
  + PROPERTY realprop 1.1
  + PROPERTY intprop 1 ;
- VDD
  + VOLTAGE 5000
  + ROUTED M1 50 ( 0 0 10 ) ( 100 0 ) ( 100 100 40 )
  NEW M1 50 ( 0 0 25 ) ( 100 0 ) ( 100 100 25 )
  NEW M1 50 ( 0 0 ) ( 100 0 ) ( 100 100 )
  + POLYGON M2 ( 100 100 ) ( 100 200 ) ( 200 200 ) ( 300 300 ) ( 300 100 )
  + POLYGON M1 ( 0 0 ) ( 0 100 ) ( 100 100 ) ( 200 200 ) ( 200 0 )
  + RECT M1 ( 0 0 ) ( 100 200 )
  + ROUTED M1 50 ( 150 150 ) ( 300 300 )
  NEW M2 100 + STYLE 2 ( 0 0 ) ( 600 * )
  NEW M2 60 + SHAPE RING + STYLE 0 ( 100 100 ) ( 200 * )
  NEW M2 56 + SHAPE RING + STYLE 0 ( 0 0 ) ( 100 100 )
  NEW M1 50 + STYLE 1 ( 300 0 ) ( 400 * )
  NEW M1 70 + STYLE 1 ( 150 150 ) ( 300 0 )
  NEW M1 56 + STYLE 0 ( 0 150 ) ( 150 0 )
  NEW M1 56 + STYLE 0 ( 150 0 ) ( 0 150 )
  NEW M1 56 + STYLE 0 ( 150 150 ) ( 0 0 )
  NEW M1 56 + STYLE 0 ( 0 0 ) ( 150 150 )
  NEW M2 100 ( 100 0 50 ) ( * 100 50 )
  NEW M1 100 ( 0 0 50 ) ( 100 * 50 )
  NEW M1 0 ( 600 0 ) M1_M2
  NEW M1 0 ( 0 0 ) M1_M2
  NEW M1 0 ( 100 0 ) M1_M2 ;
- SN2
  + ROUTED M1 100 ( 300 0 ) ( 400 * )
  NEW M1 100 ( 150 150 ) ( 300 0 )
  NEW M1 100 ( 0 0 ) ( 150 150 )
  NEW M2 100 ( 300 0 ) ( 400 * )
  NEW M2 100 ( 150 150 ) ( 300 0 )
  NEW M2 100 ( 0 0 ) ( 150 150 ) ;
END SPECIALNETS

NETS 15 ;
- N0 ;
- N1
  ( PIN P1 )
  ( I2 A )
  ( I1 A )
  + ORIGINAL N2
  + ESTCAP 1500000
  + WEIGHT 100
  + FREQUENCY 100
  + SHIELDNET SN1
  + SHIELDNET VDD
  + XTALK 2
  + NONDEFAULTRULE RULE1
  + ROUTED M1 ( 168280 63300 700 ) ( * 64500 ) M1_M2 ( 169400 * 800 ) M2_M3
    NEW M1 TAPER ( 2400 282400 ) ( 240 * )
    NEW M2 ( 14000 341440 ) ( 9600 * ) ( * 282400 ) nd1VIA12 ( 2400 * )
    NEW M2 ( 14100 341440 ) ( 14000 * ) M1_M2
  + PROPERTY realrangeprop 25.25
  + PROPERTY intrangeprop 25
  + PROPERTY realprop 1.1
  + PROPERTY intprop 1
  + PROPERTY strprop "aString" ;
- N2
  ( PIN P2 )
  ( I3 A )
  + SOURCE DIST
  + USE GROUND
  + PATTERN BALANCED
  + WEIGHT 129
  + FIXED M1 TAPERRULE RULE1 ( 2400 282400 ) ( 240 * )
    NEW M2 ( 14000 341440 ) ( 9600 * ) ( * 282400 ) M1_M2 ( 2400 * ) ;
- N3
  ( PIN P3 )
  ( I4 A )
  + SOURCE USER
  + USE CLOCK
  + PATTERN TRUNK
  + COVER M3 ( 0 0 ) M2_M3 M1_M2
    NEW M1 ( 0 0 ) M1_M2 M2_M3
    NEW M2 ( 700 700 ) M1_M2 ( * 800 )
    NEW M2 ( 600 600 ) M1_M2 ( * * 30 ) ( * 800 )
    NEW M2 ( 500 500 ) M1_M2 M1_M2
    NEW M1 ( 400 400 ) M1_M2
    NEW M1 ( 2400 282400 ) ( 240 * )
    NEW M2 ( 14000 341440 ) ( 9600 * ) ( * 282400 ) M1_M2 ( 2400 * )
     VIAGEN12_1 ;
- N4
  ( PIN P4 )
  ( I5 A )
  + SOURCE TEST
  + USE GROUND
  + ROUTED M1 STYLE 1 ( 150 150 ) ( 300 0 ) ( 400 * )
    NEW M1 STYLE 0 ( 0 0 ) ( 150 150 )
    NEW M1 ( 150 150 30 ) ( * 300 30 )
    NEW M1 ( 150 150 ) ( 300 300 )
    NEW M2 STYLE 1 ( 0 0 ) ( 150 150 ) ( 300 0 ) ( 400 * ) ;
- N5
  ( PIN P5 )
  ( I6 A )
  + SOURCE TIMING
  + USE ANALOG
  + ROUTED M1 ( 0 1000 ) ( 150 1150 ) ( 300 1000 ) ( 400 * )
    NEW M2 ( 0 1000 ) ( 150 1150 ) ( 300 1000 )
    NEW M2 STYLE 3 ( 300 1000 ) ( 400 * ) ;
- N6
  ( PIN P6 )
  + USE SCAN
  + NONDEFAULTRULE RULE2
  + ROUTED M1 STYLE 4 ( 1000 -100 ) ( 1300 * )
    NEW M1 STYLE 4 ( 1200 100 ) ( 1300 0 )
    NEW M1 STYLE 4 ( 1000 0 ) ( 1100 100 ) ;
- N7
  ( PIN P7 )
  + USE RESET ;
- ARRAYNET[0][10]
  ( PIN ARRAYPIN[0][10] ) ;
- SCAN
  ( PIN scanpin2 )
  ( PIN scanpin )
  ( scancell2 PA2 )
  ( scancell1 PA10 )
  + SOURCE TEST
  + USE SCAN ;
- INBUS<1>
  ( PIN INBUS[1] ) ;
- OUTBUS<1>
  ( PIN OUTBUS<1> ) ;
- MUSTJOIN_1
  ( I7 A ) ;
- vectormodule[1]/vectornet[0] ;
- vectormodule[1]/scalarnet ;
END NETS

SCANCHAINS 3 ;
- chain1
  + PARTITION clock1 MAXBITS 256
  + START I1 B
  + FLOATING
     scancell3 ( IN PA2 ) ( OUT PA2 )
     scancell4 ( IN PA1 ) ( OUT PA10 ) ( BITS 4 )
  + ORDERED
     scancell1 ( IN PA2 ) ( OUT PA2 )
     scancell2 ( IN PA1 ) ( OUT PA10 ) ( BITS 4 )
  + STOP I4 B ;
- chain2
  + PARTITION clock1 MAXBITS 256
  + START PIN scanpin
  + FLOATING
     scancell3 ( IN PA2 ) ( OUT PA2 )
     scancell4 ( IN PA1 ) ( OUT PA10 ) ( BITS 4 )
  + ORDERED
     scancell1 ( IN PA2 ) ( OUT PA2 )
     scancell2 ( IN PA1 ) ( OUT PA10 ) ( BITS 4 )
  + STOP PIN scanpin2 ;
- chain3
  + PARTITION clock1 MAXBITS 256
  + START I1 PA2
  + FLOATING
     scancell3 ( IN PA2 ) ( OUT PA2 )
     scancell4 ( IN PA1 ) ( OUT PA10 ) ( BITS 4 )
  + ORDERED
     scancell1 ( IN PA2 ) ( OUT PA2 )
     scancell2 ( IN PA1 ) ( OUT PA10 ) ( BITS 4 )
  + STOP I1 PA1 ;
END SCANCHAINS

GROUPS 3 ;
- group1 I2 I3 + REGION region1
  + PROPERTY strprop "aString"
  + PROPERTY realrangeprop 25.25
  + PROPERTY intrangeprop 25
  + PROPERTY realprop 1.1
  + PROPERTY intprop 1 ;
- group2 I4 ;
- region2_group I7 I8 + REGION region2 ;
END GROUPS

FILLS 3 ;
- LAYER M1
  RECT ( 0 2 ) ( 1 10 ) ;
- LAYER M2
  RECT ( 0 2 ) ( 1 10 ) ;
- LAYER M3
  RECT ( 0 2 ) ( 1 10 ) ;
END FILLS

END DESIGN