📄 elf.h
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a header of a fixed form. */typedef struct{ Elf32_Word n_namesz; /* Length of the note's name. */ Elf32_Word n_descsz; /* Length of the note's descriptor. */ Elf32_Word n_type; /* Type of the note. */} Elf32_Nhdr;typedef struct{ Elf64_Word n_namesz; /* Length of the note's name. */ Elf64_Word n_descsz; /* Length of the note's descriptor. */ Elf64_Word n_type; /* Type of the note. */} Elf64_Nhdr;/* Known names of notes. *//* Solaris entries in the note section have this name. */#define ELF_NOTE_SOLARIS "SUNW Solaris"/* Note entries for GNU systems have this name. */#define ELF_NOTE_GNU "GNU"/* Defined types of notes for Solaris. *//* Value of descriptor (one word) is desired pagesize for the binary. */#define ELF_NOTE_PAGESIZE_HINT 1/* Defined note types for GNU systems. *//* ABI information. The descriptor consists of words: word 0: OS descriptor word 1: major version of the ABI word 2: minor version of the ABI word 3: subminor version of the ABI*/#define ELF_NOTE_ABI 1/* Known OSes. These value can appear in word 0 of an ELF_NOTE_ABI note section entry. */#define ELF_NOTE_OS_LINUX 0#define ELF_NOTE_OS_GNU 1#define ELF_NOTE_OS_SOLARIS2 2/* Motorola 68k specific definitions. *//* m68k relocs. */#define R_68K_NONE 0 /* No reloc */#define R_68K_32 1 /* Direct 32 bit */#define R_68K_16 2 /* Direct 16 bit */#define R_68K_8 3 /* Direct 8 bit */#define R_68K_PC32 4 /* PC relative 32 bit */#define R_68K_PC16 5 /* PC relative 16 bit */#define R_68K_PC8 6 /* PC relative 8 bit */#define R_68K_GOT32 7 /* 32 bit PC relative GOT entry */#define R_68K_GOT16 8 /* 16 bit PC relative GOT entry */#define R_68K_GOT8 9 /* 8 bit PC relative GOT entry */#define R_68K_GOT32O 10 /* 32 bit GOT offset */#define R_68K_GOT16O 11 /* 16 bit GOT offset */#define R_68K_GOT8O 12 /* 8 bit GOT offset */#define R_68K_PLT32 13 /* 32 bit PC relative PLT address */#define R_68K_PLT16 14 /* 16 bit PC relative PLT address */#define R_68K_PLT8 15 /* 8 bit PC relative PLT address */#define R_68K_PLT32O 16 /* 32 bit PLT offset */#define R_68K_PLT16O 17 /* 16 bit PLT offset */#define R_68K_PLT8O 18 /* 8 bit PLT offset */#define R_68K_COPY 19 /* Copy symbol at runtime */#define R_68K_GLOB_DAT 20 /* Create GOT entry */#define R_68K_JMP_SLOT 21 /* Create PLT entry */#define R_68K_RELATIVE 22 /* Adjust by program base *//* Keep this the last entry. */#define R_68K_NUM 23/* Intel 80386 specific definitions. *//* i386 relocs. */#define R_386_NONE 0 /* No reloc */#define R_386_32 1 /* Direct 32 bit */#define R_386_PC32 2 /* PC relative 32 bit */#define R_386_GOT32 3 /* 32 bit GOT entry */#define R_386_PLT32 4 /* 32 bit PLT address */#define R_386_COPY 5 /* Copy symbol at runtime */#define R_386_GLOB_DAT 6 /* Create GOT entry */#define R_386_JMP_SLOT 7 /* Create PLT entry */#define R_386_RELATIVE 8 /* Adjust by program base */#define R_386_GOTOFF 9 /* 32 bit offset to GOT */#define R_386_GOTPC 10 /* 32 bit PC relative offset to GOT *//* Keep this the last entry. */#define R_386_NUM 11/* SUN SPARC specific definitions. *//* Values for Elf64_Ehdr.e_flags. */#define EF_SPARCV9_MM 3#define EF_SPARCV9_TSO 0#define EF_SPARCV9_PSO 1#define EF_SPARCV9_RMO 2#define EF_SPARC_EXT_MASK 0xFFFF00#define EF_SPARC_SUN_US1 0x000200#define EF_SPARC_HAL_R1 0x000400/* SPARC relocs. */#define R_SPARC_NONE 0 /* No reloc */#define R_SPARC_8 1 /* Direct 8 bit */#define R_SPARC_16 2 /* Direct 16 bit */#define R_SPARC_32 3 /* Direct 32 bit */#define R_SPARC_DISP8 4 /* PC relative 8 bit */#define R_SPARC_DISP16 5 /* PC relative 16 bit */#define R_SPARC_DISP32 6 /* PC relative 32 bit */#define R_SPARC_WDISP30 7 /* PC relative 30 bit shifted */#define R_SPARC_WDISP22 8 /* PC relative 22 bit shifted */#define R_SPARC_HI22 9 /* High 22 bit */#define R_SPARC_22 10 /* Direct 22 bit */#define R_SPARC_13 11 /* Direct 13 bit */#define R_SPARC_LO10 12 /* Truncated 10 bit */#define R_SPARC_GOT10 13 /* Truncated 10 bit GOT entry */#define R_SPARC_GOT13 14 /* 13 bit GOT entry */#define R_SPARC_GOT22 15 /* 22 bit GOT entry shifted */#define R_SPARC_PC10 16 /* PC relative 10 bit truncated */#define R_SPARC_PC22 17 /* PC relative 22 bit shifted */#define R_SPARC_WPLT30 18 /* 30 bit PC relative PLT address */#define R_SPARC_COPY 19 /* Copy symbol at runtime */#define R_SPARC_GLOB_DAT 20 /* Create GOT entry */#define R_SPARC_JMP_SLOT 21 /* Create PLT entry */#define R_SPARC_RELATIVE 22 /* Adjust by program base */#define R_SPARC_UA32 23 /* Direct 32 bit unaligned *//* Additional Sparc64 relocs. */#define R_SPARC_PLT32 24 /* Direct 32 bit ref to PLT entry */#define R_SPARC_HIPLT22 25 /* High 22 bit PLT entry */#define R_SPARC_LOPLT10 26 /* Truncated 10 bit PLT entry */#define R_SPARC_PCPLT32 27 /* PC rel 32 bit ref to PLT entry */#define R_SPARC_PCPLT22 28 /* PC rel high 22 bit PLT entry */#define R_SPARC_PCPLT10 29 /* PC rel trunc 10 bit PLT entry */#define R_SPARC_10 30 /* Direct 10 bit */#define R_SPARC_11 31 /* Direct 11 bit */#define R_SPARC_64 32 /* Direct 64 bit */#define R_SPARC_OLO10 33 /* ?? */#define R_SPARC_HH22 34 /* Top 22 bits of direct 64 bit */#define R_SPARC_HM10 35 /* High middle 10 bits of ... */#define R_SPARC_LM22 36 /* Low middle 22 bits of ... */#define R_SPARC_PC_HH22 37 /* Top 22 bits of pc rel 64 bit */#define R_SPARC_PC_HM10 38 /* High middle 10 bit of ... */#define R_SPARC_PC_LM22 39 /* Low miggle 22 bits of ... */#define R_SPARC_WDISP16 40 /* PC relative 16 bit shifted */#define R_SPARC_WDISP19 41 /* PC relative 19 bit shifted */#define R_SPARC_7 43 /* Direct 7 bit */#define R_SPARC_5 44 /* Direct 5 bit */#define R_SPARC_6 45 /* Direct 6 bit */#define R_SPARC_DISP64 46 /* PC relative 64 bit */#define R_SPARC_PLT64 47 /* Direct 64 bit ref to PLT entry */#define R_SPARC_HIX22 48 /* High 22 bit complemented */#define R_SPARC_LOX10 49 /* Truncated 11 bit complemented */#define R_SPARC_H44 50 /* Direct high 12 of 44 bit */#define R_SPARC_M44 51 /* Direct mid 22 of 44 bit */#define R_SPARC_L44 52 /* Direct low 10 of 44 bit */#define R_SPARC_REGISTER 53 /* Global register usage */#define R_SPARC_UA64 54 /* Direct 64 bit unaligned */#define R_SPARC_UA16 55 /* Direct 16 bit unaligned *//* Keep this the last entry. */#define R_SPARC_NUM 56/* For Sparc64, legal values for d_tag of Elf64_Dyn. */#define DT_SPARC_REGISTER 0x70000001#define DT_SPARC_NUM 2/* Bits present in AT_HWCAP, primarily for Sparc32. */#define HWCAP_SPARC_FLUSH 1 /* The cpu supports flush insn. */#define HWCAP_SPARC_STBAR 2#define HWCAP_SPARC_SWAP 4#define HWCAP_SPARC_MULDIV 8#define HWCAP_SPARC_V9 16 /* The cpu is v9, so v8plus is ok. *//* MIPS R3000 specific definitions. *//* Legal values for e_flags field of Elf32_Ehdr. */#define EF_MIPS_NOREORDER 1 /* A .noreorder directive was used */#define EF_MIPS_PIC 2 /* Contains PIC code */#define EF_MIPS_CPIC 4 /* Uses PIC calling sequence */#define EF_MIPS_XGOT 8#define EF_MIPS_64BIT_WHIRL 16#define EF_MIPS_ABI2 32#define EF_MIPS_ABI_ON32 64#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level *//* Legal values for MIPS architecture level. */#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. *//* The following are non-official names and should not be used. */#define E_MIPS_ARCH_1 0x00000000 /* -mips1 code. */#define E_MIPS_ARCH_2 0x10000000 /* -mips2 code. */#define E_MIPS_ARCH_3 0x20000000 /* -mips3 code. */#define E_MIPS_ARCH_4 0x30000000 /* -mips4 code. */#define E_MIPS_ARCH_5 0x40000000 /* -mips5 code. *//* Special section indices. */#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */#define SHN_MIPS_TEXT 0xff01 /* Allocated test symbols. */#define SHN_MIPS_DATA 0xff02 /* Allocated data symbols. */#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols *//* Legal values for sh_type field of Elf32_Shdr. */#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */#define SHT_MIPS_MSYM 0x70000001#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information*/#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */#define SHT_MIPS_PACKAGE 0x70000007#define SHT_MIPS_PACKSYM 0x70000008#define SHT_MIPS_RELD 0x70000009#define SHT_MIPS_IFACE 0x7000000b#define SHT_MIPS_CONTENT 0x7000000c#define SHT_MIPS_OPTIONS 0x7000000d /* Miscellaneous options. */#define SHT_MIPS_SHDR 0x70000010#define SHT_MIPS_FDESC 0x70000011#define SHT_MIPS_EXTSYM 0x70000012#define SHT_MIPS_DENSE 0x70000013#define SHT_MIPS_PDESC 0x70000014#define SHT_MIPS_LOCSYM 0x70000015#define SHT_MIPS_AUXSYM 0x70000016#define SHT_MIPS_OPTSYM 0x70000017#define SHT_MIPS_LOCSTR 0x70000018#define SHT_MIPS_LINE 0x70000019#define SHT_MIPS_RFDESC 0x7000001a#define SHT_MIPS_DELTASYM 0x7000001b#define SHT_MIPS_DELTAINST 0x7000001c#define SHT_MIPS_DELTACLASS 0x7000001d#define SHT_MIPS_DWARF 0x7000001e /* DWARF debugging information. */#define SHT_MIPS_DELTADECL 0x7000001f#define SHT_MIPS_SYMBOL_LIB 0x70000020#define SHT_MIPS_EVENTS 0x70000021 /* Event section. */#define SHT_MIPS_TRANSLATE 0x70000022#define SHT_MIPS_PIXIE 0x70000023#define SHT_MIPS_XLATE 0x70000024#define SHT_MIPS_XLATE_DEBUG 0x70000025#define SHT_MIPS_WHIRL 0x70000026#define SHT_MIPS_EH_REGION 0x70000027#define SHT_MIPS_XLATE_OLD 0x70000028#define SHT_MIPS_PDR_EXCEPTION 0x70000029/* Legal values for sh_flags field of Elf32_Shdr. */#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */#define SHF_MIPS_MERGE 0x20000000#define SHF_MIPS_ADDR 0x40000000#define SHF_MIPS_STRINGS 0x80000000#define SHF_MIPS_NOSTRIP 0x08000000#define SHF_MIPS_LOCAL 0x04000000#define SHF_MIPS_NAMES 0x02000000#define SHF_MIPS_NODUPE 0x01000000/* Symbol tables. *//* MIPS specific values for `st_other'. */#define STO_MIPS_DEFAULT 0x0#define STO_MIPS_INTERNAL 0x1#define STO_MIPS_HIDDEN 0x2#define STO_MIPS_PROTECTED 0x3#define STO_MIPS_SC_ALIGN_UNUSED 0xff/* MIPS specific values for `st_info'. */#define STB_MIPS_SPLIT_COMMON 13/* Entries found in sections of type SHT_MIPS_GPTAB. */typedef union{ struct { Elf32_Word gt_current_g_value; /* -G value used for compilation */ Elf32_Word gt_unused; /* Not used */ } gt_header; /* First entry in section */ struct { Elf32_Word gt_g_value; /* If this value were used for -G */ Elf32_Word gt_bytes; /* This many bytes would be used */ } gt_entry; /* Subsequent entries in section */} Elf32_gptab;/* Entry found in sections of type SHT_MIPS_REGINFO. */typedef struct{ Elf32_Word ri_gprmask; /* General registers used */ Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */ Elf32_Sword ri_gp_value; /* $gp register value */} Elf32_RegInfo;/* Entries found in sections of type SHT_MIPS_OPTIONS. */typedef struct{ unsigned char kind; /* Determines interpretation of the variable part of descriptor. */ unsigned char size; /* Size of descriptor, including header. */ Elf32_Section section; /* Section header index of section affected, 0 for global options. */ Elf32_Word info; /* Kind-specific information. */} Elf_Options;/* Values for `kind' field in Elf_Options. */#define ODK_NULL 0 /* Undefined. */#define ODK_REGINFO 1 /* Register usage information. */#define ODK_EXCEPTIONS 2 /* Exception processing options. */#define ODK_PAD 3 /* Section padding options. */#define ODK_HWPATCH 4 /* Hardware workarounds performed */#define ODK_FILL 5 /* record the fill value used by the linker. */#define ODK_TAGS 6 /* reserve space for desktop tools to write. */#define ODK_HWAND 7 /* HW workarounds. 'AND' bits when merging. */#define ODK_HWOR 8 /* HW workarounds. 'OR' bits when merging. *//* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries. */#define OEX_FPU_MIN 0x1f /* FPE's which MUST be enabled. */#define OEX_FPU_MAX 0x1f00 /* FPE's which MAY be enabled. */#define OEX_PAGE0 0x10000 /* page zero must be mapped. */#define OEX_SMM 0x20000 /* Force sequential memory mode? */#define OEX_FPDBUG 0x40000 /* Force floating point debug mode? */#define OEX_PRECISEFP OEX_FPDBUG#define OEX_DISMISS 0x80000 /* Dismiss invalid address faults? */#define OEX_FPU_INVAL 0x10#define OEX_FPU_DIV0 0x08#define OEX_FPU_OFLO 0x04#define OEX_FPU_UFLO 0x02#define OEX_FPU_INEX 0x01/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry. */#define OHW_R4KEOP 0x1 /* R4000 end-of-page patch. */#define OHW_R8KPFETCH 0x2 /* may need R8000 prefetch patch. */#define OHW_R5KEOP 0x4 /* R5000 end-of-page patch. */#define OHW_R5KCVTL 0x8 /* R5000 cvt.[ds].l bug. clean=1. */#define OPAD_PREFIX 0x1#define OPAD_POSTFIX 0x2#define OPAD_SYMBOL 0x4/* Entry found in `.options' section. */typedef struct{ Elf32_Word hwp_flags1; /* Extra flags. */ Elf32_Word hwp_flags2; /* Extra flags. */} Elf_Options_Hw;/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries. */#define OHWA0_R4KEOP_CHECKED 0x00000001#define OHWA1_R4KEOP_CLEAN 0x00000002/* MIPS relocs. */#define R_MIPS_NONE 0 /* No reloc */#define R_MIPS_16 1 /* Direct 16 bit */#define R_MIPS_32 2 /* Direct 32 bit */#define R_MIPS_REL32 3 /* PC relative 32 bit */#define R_MIPS_26 4 /* Direct 26 bit shifted */#define R_MIPS_HI16 5 /* High 16 bit */#define R_MIPS_LO16 6 /* Low 16 bit */#define R_MIPS_GPREL16 7 /* GP relative 16 bit */#define R_MIPS_LITERAL 8 /* 16 bit literal entry */#define R_MIPS_GOT16 9 /* 16 bit GOT entry */#define R_MIPS_PC16 10 /* PC relative 16 bit */#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */#define R_MIPS_GPREL32 12 /* GP relative 32 bit */#define R_MIPS_SHIFT5 16#define R_MIPS_SHIFT6 17#define R_MIPS_64 18#define R_MIPS_GOT_DISP 19#define R_MIPS_GOT_PAGE 20#define R_MIPS_GOT_OFST 21#define R_MIPS_GOT_HI16 22
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