📄 bdm.c
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CLRX /* clear X again */
BRN 0 /* wait 3 cycles */
/* bit 4 */
mov #0x10,0
//STX ,X /* drive BDM low */
//NOP /* wait 1 cycle */
STA ,X /* switch BDM to high impedance */
ROL i /* shift C into i (from the bottom) */
NOP /* wait 1 more cycle */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
CLRX /* clear X again */
BRN 0 /* wait 3 cycles */
/* bit 3 */
mov #0x10,0
//STX ,X /* drive BDM low */
//NOP /* wait 1 cycle */
STA ,X /* switch BDM to high impedance */
ROL i /* shift C into i (from the bottom) */
NOP /* wait 1 more cycle */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
CLRX /* clear X again */
BRN 0 /* wait 3 cycles */
/* bit 2 */
mov #0x10,0
//STX ,X /* drive BDM low */
//NOP /* wait 1 cycle */
STA ,X /* switch BDM to high impedance */
ROL i /* shift C into i (from the bottom) */
NOP /* wait 1 more cycle */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
CLRX /* clear X again */
BRN 0 /* wait 3 cycles */
/* bit 1 */
mov #0x10,0
//STX ,X /* drive BDM low */
//NOP /* wait 1 cycle */
STA ,X /* switch BDM to high impedance */
ROL i /* shift C into i (from the bottom) */
NOP /* wait 1 more cycle */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
CLRX /* clear X again */
BRN 0 /* wait 3 cycles */
/* bit 0 */
mov #0x10,0
//STX ,X /* drive BDM low */
//NOP /* wait 1 cycle */
STA ,X /* switch BDM to high impedance */
ROL i /* shift C into i (from the bottom) */
NOP /* wait 1 more cycle */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
LDA i /* load the result into A */
}
}
/* 2.25 - 3.25 MHz */
unsigned char bdm_rx7(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
/* the following construction is a bit awkward cause by the fact that there is time for loop iteration in the middle of the routine, but not at its end... */
/* this is the end of bit processing, it is done 1 extra time before bit 7 (but that does not matter) */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
NOP /* wait 1 cycle (5 in total with ROL) */
CLRX /* clear X for HX to point to PTA */
/* here the bit begins */
mov #0x10,0
//STX ,X /* drive BDM low */
//NOP /* wait 1 cycle */
STA ,X /* switch BDM to high impedance */
DEC j /* iterate the loop (this takes 7 cycles) */
BNE loop
/* finish processing of bit 0 (after exit from the loop) */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
LDA i /* load the result into A */
}
}
/* 1.8 - 2.6 MHz */
unsigned char bdm_rx8(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
//LDA #BDM_DIR1_MASK+RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//
//
STA ,X /* switch BDM to high impedance */
ROL i /* shift C into i (from the bottom) */
BRSET 0,DDRA,0 /* wait 5 cycles (9 in total with ROL) */
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
DEC j /* iterate the loop (this takes 7 cycles) */
BNE loop
ROL i /* shift C into i (from the bottom) */
LDA i /* load the result into A */
}
}
/* 1.5 - 2.166 MHz */
unsigned char bdm_rx9(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
//LDA #BDM_DIR1_MASK+RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//
STA ,X /* switch BDM to high impedance */
ROL i /* shift C into i (from the bottom) */
BIT ,X /* wait 8 cycles (12 in total with ROL) */
BIT ,X
BIT ,X
BIT ,X
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
BIT ,X /* wait 9 cycles, iterate the loop while waiting (7 cycles) */
LSLX /* shift BDM_IN into C */
LSLX /* LSLX needs to be after the BIT as it chages C */
DEC j
BNE loop
ROL i /* shift C into i (from the bottom) */
LDA i /* load the result into A */
}
}
/* 1.227 - 1.772 MHz */
unsigned char bdm_rx10(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//STX ,X /* drive BDM low */BRN 0 /* wait 3 cycles */
STA ,X /* switch BDM to high impedance */
BIT ,X /* wait 15 cycles */
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BRN 0
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
BIT ,X /* wait 13 cycles, iterate the loop while waiting (7 cycles), ROL takes 4 cycles */
DEC j
BNE loop
LDA i /* load the result into A */
}
}
/* 1 - 1.444 MHz */
unsigned char bdm_rx11(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//STX ,X /* drive BDM low */
BIT ,X /* wait 4 cycles */
BIT ,X
STA ,X /* switch BDM to high impedance */
BIT ,X /* wait 19 cycles */
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BRN 0
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
BIT ,X /* wait 16 cycles, iterate the loop while waiting (7 cycles), ROL takes 4 cycles */
BRN 0
DEC j
BNE loop
LDA i /* load the result into A */
}
}
/* 0.818 - 1.181 MHz */
unsigned char bdm_rx12(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//STX ,X /* drive BDM low */
BIT ,X /* wait 6 cycles */
BIT ,X
BIT ,X
STA ,X /* switch BDM to high impedance */
MOV #2,k /* wait 23 cycles (= 4 + 2*9 + 1) */
wait1:
BIT ,X
DEC k
BNE wait1
NOP
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
BIT ,X /* wait 21 cycles, iterate the loop while waiting (7 cycles), ROL takes 4 cycles */
BIT ,X
BIT ,X
BIT ,X
BIT ,X
DEC j
BNE loop
LDA i /* load the result into A */
}
}
/* 0.658 - 0.951 MHz */
unsigned char bdm_rx13(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
CLRH /* prepare H */
loop:
CLRX /* clear X to point to PTA, CLRX has been moved to the beginning of the algorithm here to prevent its execution for the last bit */
mov #0x10,0
//STX ,X /* drive BDM low */
BIT ,X /* wait 8 cycles */
BIT ,X
BIT ,X
BIT ,X
STA ,X /* switch BDM to high impedance */
MOV #3,k /* wait 29 cycles (= 4 + 3*8 + 1) */
wait1:
NOP
DEC k
BNE wait1
NOP
LDX ,X /* load X with value on the PTA port (including BDM_IN) */
LSLX /* shift BDM_IN into C */
LSLX
ROL i /* shift C into i (from the bottom) */
BIT ,X /* wait 27 cycles, iterate the loop while waiting (7 cycles), ROL takes 4 cycles */
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BIT ,X
BIT ,X
DEC j
BNE loop
LDA i /* load the result into A */
}
}
/* 0.529 - 0.764 MHz */
unsigned char bdm_rx14(void) {
asm {
LDA #RESET_OUT_MASK /* contents of A will be driven to PTA in order to switch the driver off */
MOV #8,j /* store number of iterations into j */
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