pems800v055.rpt

单片的得isp实现的全部资料。大家看看阿

89   -> - - - - - - - - - - | - - - - * - - * | <-- D0
94   -> * - * - * - * - * - | - - - * - - * - | <-- D2
98   -> - * - * - - - * - * | - - - * - * - - | <-- D4
2    -> * * * * * * * * * * | - - * * * * * * | <-- WR
LC116-> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:12
LC114-> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:13
LC98 -> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:14
LC95 -> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:15


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'E':

                             Logic cells placed in LAB 'E'
        +------------------- LC69 BEER
        | +----------------- LC75 EA0
        | | +--------------- LC65 EA1
        | | | +------------- LC70 EA8
        | | | | +----------- LC72 EA9
        | | | | | +--------- LC73 EA16
        | | | | | | +------- LC77 EA17
        | | | | | | | +----- LC80 PX11
        | | | | | | | | +--- LC78 PX12
        | | | | | | | | | +- LC67 SMOG
        | | | | | | | | | | 
        | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | |   that feed LAB 'E'
LC      | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'E':
LC69 -> * - - - - - - - - - | - - - - * - - - | <-- BEER
LC75 -> - * - - - - - - - - | - - - - * - - - | <-- EA0
LC65 -> - - * - - - - - - - | - - - - * - - - | <-- EA1
LC70 -> - - - * - - - - - - | - - - - * - - - | <-- EA8
LC72 -> - - - - * - - - - - | - - - - * - - - | <-- EA9
LC73 -> - - - - - * - - - - | - - - - * - - - | <-- EA16
LC77 -> - - - - - - * - - - | - - - - * - - - | <-- EA17
LC80 -> - - - - - - - * - - | - - - - * - - - | <-- PX11
LC78 -> - - - - - - - - * - | - - - - * - - - | <-- PX12
LC67 -> - - - - - - - - - * | - - - - * - - - | <-- SMOG

Pin
3    -> * * * * * * * * * * | - - * * * * * * | <-- A14
4    -> * * * * * * * * * * | - - * * * * * * | <-- A15
89   -> - * - * - * - * - * | - - - - * - - * | <-- D0
99   -> * - * - * - * - * - | - - - - * - * * | <-- D1
2    -> * * * * * * * * * * | - - * * * * * * | <-- WR
LC116-> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:12
LC114-> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:13
LC98 -> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:14
LC95 -> * * * * * * * * * * | - - * * * * * * | <-- |74373:3|:15


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                                         Logic cells placed in LAB 'F'
        +------------------------------- LC86 AD_C
        | +----------------------------- LC85 EA3
        | | +--------------------------- LC94 EA7
        | | | +------------------------- LC81 EA11
        | | | | +----------------------- LC83 EA15
        | | | | | +--------------------- LC91 RLC7
        | | | | | | +------------------- LC89 RLC11
        | | | | | | | +----------------- LC88 RLC12
        | | | | | | | | +--------------- LC93 RLC15
        | | | | | | | | | +------------- LC95 |74373:3|:15
        | | | | | | | | | | +----------- LC84 |74373:17|:15
        | | | | | | | | | | | +--------- LC82 |74373:17|:16
        | | | | | | | | | | | | +------- LC87 |74373:17|:19
        | | | | | | | | | | | | | +----- LC90 |74373:18|:15
        | | | | | | | | | | | | | | +--- LC92 |74373:18|:16
        | | | | | | | | | | | | | | | +- LC96 |74373:18|:19
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'F'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'F':
LC86 -> * - - - - - - - - - - - - - - - | - - - - - * - - | <-- AD_C
LC85 -> - * - - - - - - - - - - - - - - | - - - - - * - - | <-- EA3
LC94 -> - - * - - - - - - - - - - - - - | - - - - - * - - | <-- EA7
LC81 -> - - - * - - - - - - - - - - - - | - - - - - * - - | <-- EA11
LC83 -> - - - - * - - - - - - - - - - - | - - - - - * - - | <-- EA15
LC95 -> * * * * * - - - - * * * * * * * | - - * * * * * * | <-- |74373:3|:15
LC84 -> - - - - - - - - - - * - - - - - | - * - - - * - - | <-- |74373:17|:15
LC82 -> - - - - - - - - - - - * - - - - | - * - - - * - - | <-- |74373:17|:16
LC87 -> - - - - - * - - - - - - * - - - | - - - - - * - - | <-- |74373:17|:19
LC90 -> - - - - - - * - - - - - - * - - | - - - - - * - - | <-- |74373:18|:15
LC92 -> - - - - - - - * - - - - - - * - | - - - - - * - - | <-- |74373:18|:16
LC96 -> - - - - - - - - * - - - - - - * | - - - - - * - - | <-- |74373:18|:19

Pin
100  -> - - - - - - - - - * - - - - - - | - - - - - * * * | <-- ALE
3    -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- A14
4    -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- A15
89   -> - - - - - - - - - - - - - - - - | - - - - * - - * | <-- D0
96   -> - * - * - - - - - * * - - * - - | - - * - - * - - | <-- D3
98   -> - - - - - - - - - - - * - - * - | - - - * - * - - | <-- D4
12   -> * - * - * - - - - - - - * - - * | - - - - - * - - | <-- D7
1    -> - - - - - * * * * - - - - - - - | - * - - - * * * | <-- RESET
2    -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- WR
LC116-> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- |74373:3|:12
LC114-> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- |74373:3|:13
LC98 -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- |74373:3|:14


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'G':

                                         Logic cells placed in LAB 'G'
        +------------------------------- LC109 AD_B
        | +----------------------------- LC107 /CS_T
        | | +--------------------------- LC105 EA6
        | | | +------------------------- LC97 EA14
        | | | | +----------------------- LC99 EM0
        | | | | | +--------------------- LC104 RLC6
        | | | | | | +------------------- LC102 RLC9
        | | | | | | | +----------------- LC101 RLC10
        | | | | | | | | +--------------- LC110 RLC14
        | | | | | | | | | +------------- LC98 |74373:3|:14
        | | | | | | | | | | +----------- LC106 |74373:17|:13
        | | | | | | | | | | | +--------- LC100 |74373:17|:14
        | | | | | | | | | | | | +------- LC103 |74373:17|:18
        | | | | | | | | | | | | | +----- LC111 |74373:18|:13
        | | | | | | | | | | | | | | +--- LC112 |74373:18|:14
        | | | | | | | | | | | | | | | +- LC108 |74373:18|:18
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'G'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'G':
LC109-> * - - - - - - - - - - - - - - - | - - - - - - * - | <-- AD_B
LC105-> - - * - - - - - - - - - - - - - | - - - - - - * - | <-- EA6
LC97 -> - - - * - - - - - - - - - - - - | - - - - - - * - | <-- EA14
LC98 -> * * * * * - - - - * * * * * * * | - - * * * * * * | <-- |74373:3|:14
LC106-> - - - - - - - - - - * - - - - - | - * - - - - * - | <-- |74373:17|:13
LC100-> - - - - - - - - - - - * - - - - | - * - - - - * - | <-- |74373:17|:14
LC103-> - - - - - * - - - - - - * - - - | - - - - - - * - | <-- |74373:17|:18
LC111-> - - - - - - * - - - - - - * - - | - - - - - - * - | <-- |74373:18|:13
LC112-> - - - - - - - * - - - - - - * - | - - - - - - * - | <-- |74373:18|:14
LC108-> - - - - - - - - * - - - - - - * | - - - - - - * - | <-- |74373:18|:18

Pin
100  -> - - - - - - - - - * - - - - - - | - - - - - * * * | <-- ALE
3    -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- A14
4    -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- A15
89   -> - - - - - - - - - - - - - - - - | - - - - * - - * | <-- D0
99   -> - - - - - - - - - - * - - * - - | - - - - * - * * | <-- D1
94   -> - - - - - - - - - * - * - - * - | - - - * - - * - | <-- D2
11   -> * - * * - - - - - - - - * - - * | - - - - - - * - | <-- D6
95   -> - * - - * - - - - - - - - - - - | - - * - - - * - | <-- RD
1    -> - * - - * * * * * - - - - - - - | - * - - - * * * | <-- RESET
2    -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- WR
LC116-> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- |74373:3|:12
LC114-> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- |74373:3|:13
LC95 -> * * * * * - - - - - * * * * * * | - - * * * * * * | <-- |74373:3|:15


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'H':

                                         Logic cells placed in LAB 'H'
        +------------------------------- LC125 AD_A
        | +----------------------------- LC121 EA5
        | | +--------------------------- LC123 EA13
        | | | +------------------------- LC115 E2
        | | | | +----------------------- LC117 LED_COM3
        | | | | | +--------------------- LC118 PX23
        | | | | | | +------------------- LC126 RLC0
        | | | | | | | +----------------- LC113 RLC5
        | | | | | | | | +--------------- LC128 RLC8
        | | | | | | | | | +------------- LC120 RLC13
        | | | | | | | | | | +----------- LC116 |74373:3|:12
        | | | | | | | | | | | +--------- LC114 |74373:3|:13
        | | | | | | | | | | | | +------- LC119 |74373:17|:12
        | | | | | | | | | | | | | +----- LC124 |74373:17|:17
        | | | | | | | | | | | | | | +--- LC127 |74373:18|:12
        | | | | | | | | | | | | | | | +- LC122 |74373:18|:17
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'H'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'H':
LC125-> * - - - - - - - - - - - - - - - | - - - - - - - * | <-- AD_A
LC121-> - * - - - - - - - - - - - - - - | - - - - - - - * | <-- EA5
LC123-> - - * - - - - - - - - - - - - - | - - - - - - - * | <-- EA13
LC117-> - - - - * - - - - - - - - - - - | - - - - - - - * | <-- LED_COM3
LC118-> - - - - - * - - - - - - - - - - | - - - - - - - * | <-- PX23
LC116-> * * * * * * - - - - * - * * * * | - - * * * * * * | <-- |74373:3|:12
LC114-> * * * * * * - - - - - * * * * * | - - * * * * * * | <-- |74373:3|:13
LC119-> - - - - - - * - - - - - * - - - | - - - - - - - * | <-- |74373:17|:12
LC124-> - - - - - - - * - - - - - * - - | - - - - - - - * | <-- |74373:17|:17
LC127-> - - - - - - - - * - - - - - * - | - - - - - - - * | <-- |74373:18|:12
LC122-> - - - - - - - - - * - - - - - * | - - - - - - - * | <-- |74373:18|:17

Pin
100  -> - - - - - - - - - - * * - - - - | - - - - - * * * | <-- ALE
3    -> * * * * * * - - - - - - * * * * | - - * * * * * * | <-- A14
4    -> * * * * * * - - - - - - * * * * | - - * * * * * * | <-- A15
89   -> - - - - - - - - - - * - * - * - | - - - - * - - * | <-- D0
99   -> - - - - - - - - - - - * - - - - | - - - - * - * * | <-- D1
9    -> * * * - * * - - - - - - - * - * | - - - - - - - * | <-- D5
1    -> - - - - - - * * * * - - - - - - | - * - - - * * * | <-- RESET
2    -> * * * * * * - - - - - - * * * * | - - * * * * * * | <-- WR
LC98 -> * * * * * * - - - - - - * * * * | - - * * * * * * | <-- |74373:3|:14
LC95 -> * * * * * * - - - - - - * * * * | - - * * * * * * | <-- |74373:3|:15


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                 e:\yp\cpld\dongli\pems800v055.rpt
pems800v055

** EQUATIONS **

ALE      : INPUT;
A14      : INPUT;
A15      : INPUT;
D0       : INPUT;
D1       : INPUT;
D2       : INPUT;
D3       : INPUT;
D4       : INPUT;
D5       : INPUT;
D6       : INPUT;
D7       : INPUT;
INT_COMI : INPUT;
RD       : INPUT;
RESET    : INPUT;
T/R      : INPUT;
WR       : INPUT;

-- Node name is 'AD_A' = '|74373:65|:17' 
-- Equation name is 'AD_A', type is output 
 AD_A    = LCELL( _EQ001 $  GND);
  _EQ001 =  A14 & !A15 &  D5 & !_LC095 &  _LC098 & !_LC114 &  _LC116 & !WR
         #  AD_A &  _X001;
  _X001  = EXP( A14 & !A15 & !D5 & !_LC095 &  _LC098 & !_LC114 &  _LC116 & !WR);

-- Node name is 'AD_B' = '|74373:65|:18' 
-- Equation name is 'AD_B', type is output 
 AD_B    = LCELL( _EQ002 $  GND);
  _EQ002 =  A14 & !A15 &  D6 & !_LC095 &  _LC098 & !_LC114 &  _LC116 & !WR
         #  AD_B &  _X002;
  _X002  = EXP( A14 & !A15 & !D6 & !_LC095 &  _LC098 & !_LC114 &  _LC116 & !WR);

-- Node name is 'AD_C' = '|74373:65|:19' 
-- Equation name is 'AD_C', type is output 
 AD_C    = LCELL( _EQ003 $  GND);
  _EQ003 =  A14 & !A15 &  D7 & !_LC095 &  _LC098 & !_LC114 &  _LC116 & !WR
         #  AD_C &  _X003;
  _X003  = EXP( A14 & !A15 & !D7 & !_LC095 &  _LC098 & !_LC114 &  _LC116 & !WR);

-- Node name is 'BEER' = '|74373:86|:13' 
-- Equation name is 'BEER', type is output 
 BEER    = LCELL( _EQ004 $  GND);
  _EQ004 =  A14 & !A15 &  D1 & !_LC095 &  _LC098 &  _LC114 & !_LC116 & !WR
         #  BEER &  _X004;
  _X004  = EXP( A14 & !A15 & !D1 & !_LC095 &  _LC098 &  _LC114 & !_LC116 & !WR);

-- Node name is 'EA0' = '|74373:54|:12' 
-- Equation name is 'EA0', type is output 
 EA0     = LCELL( _EQ005 $  GND);